JPH05336017A - Receiver in frequency division multiple access communication system - Google Patents

Abstract

PURPOSE:To allow a receiver to use an inexpensive frequency synthesizer of the receiver with a rough frequency step even when the frequency separation on a satellite is minimized in an FDMA/SCPC communication system. CONSTITUTION:A channel number inherent in each channel is imparted to an SCPC signal. The channel number identification device 5 of a reception side detects the channel number, and when the channel number is discordant with a desired channel signal, a sweeping instruction is issued to a sweeping controller 6. In a variable oscillator 7 a variable control voltage is mode variable by the sweep control and output frequency is changed. A frequency synthesizer 2 is a PLL phase locked with the output frequency and the output of the PLL is used for the local oscillation signal of a mixer 1. Then the desired channel is acquired quickly and accurately by the frequency sweep. Thus, since the fine-adjustment is implemented by frequency sweep, a rough adjustment frequency synthesizer is used at a high frequency band even when its frequency step is rough.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD This invention relates to frequency division multiple access (FDMA).
The present invention relates to a receiving device in a communication system, and in particular, an SCPC (Single Channel P) that modulates a carrier assigned to each of a plurality of channels with transmission data of a corresponding channel and transmits the modulated carrier.
er carrier) communication system is adopted for the receiving device used in the FDMA communication system.

[0002]

2. Description of the Related Art An FDMA / SCPC communication system frequency-divides and transmits a communication signal of a plurality of channels. By minimizing a frequency difference (channel separation) between channel signals, a limited frequency band can be obtained. Effective use becomes possible. Generally, in the case of the PSK (Phase Shift Keying) modulation method, the limit value of the transmission band is the roll-off rate of 40% as the separation value.
Therefore, it is often set to 1.3 to 1.4 times the modulation rate of the transmission signal.

For example, in the Intelsat system, which is a system having a modulation speed of 32 Kbps, a separation of 45 KHz is adopted.

The receiving side receives a desired channel signal corresponding to this separation. A schematic block diagram of the receiving side is shown in FIG. The received FDMA signal is mixed with the local oscillation frequency F1 from the frequency synthesizer 2 in the mixer 1 and frequency converted. A bandpass filter 3 is provided to extract only a specific frequency F2 from the mixed output, and the demodulator 4 demodulates the passed signal.

If the mixer 1 outputs a frequency difference, the demodulator 4 selectively demodulates the received signal of the frequency F1 + F2 of the FDMA signal.

To demodulate the desired channel signal,
F1 which is the local oscillation frequency by the frequency synthesizer 2
Is variably controlled. Therefore, the variable frequency step of the frequency synthesizer 2 has a value corresponding to the frequency separation of the FDMA signal.

Due to the recent development of satellite communication systems, FD
The value of the frequency step of the MA signal is variously selected and a wide range of values are being adopted. For example, in a mobile satellite communication system, a frequency separation of 2.5 KHz or 5 KHz is used because the communication speed is several Kbps. Therefore, the variable frequency step of the frequency synthesizer 2 needs to be small, control is difficult, and the cost is increased.

Further, in a system having a frequency separation of about 50 KHz, a frequency band of 70 to 140 MHz is used in order to reduce the phase noise and spurious generated in the synthesizer. In this case, it is necessary to perform signal selection processing after converting a microwave band signal generally used in satellite communication into a VHF band using a plurality of frequency converters, which also causes a cost increase. .

Therefore, it is possible to use a frequency synthesizer in the microwave band for cost reduction. In this case, the frequency step of the synthesizer is large, so that the frequency acquisition operation is slowed and the satellite is further delayed. It is necessary to increase the frequency separation of the FDMA signals arranged above, and this leads to a decrease in frequency use efficiency.

[0010]

SUMMARY OF THE INVENTION An object of the present invention is to provide an FDMA communication type receiver capable of quickly and reliably capturing a desired channel frequency.

Another object of the present invention is to provide a receiving apparatus of the FDMA communication system which can use a frequency synthesizer having a large low cost frequency step even if the frequency separation is minimized in order to effectively use the frequency. .

[0012]

A receiver according to the present invention is a frequency division multiple access communication system in which a carrier wave assigned to each of a plurality of channels is modulated by transmission data of a corresponding channel and its channel identification signal and transmitted. A receiver, which is a frequency synthesizer for generating a local oscillation frequency, mixing means for mixing the local oscillation frequency and the reception frequency, demodulation means for demodulating a reception signal from the mixed output, and the channel from the demodulation output. Sweep control means for performing variable frequency control of the frequency synthesizer until an identification signal is detected and a desired channel signal is received.

In another receiving device according to the present invention, the sweep control means detects a mismatch between the channel identification signal detected from the demodulation output and the desired channel signal and generates a predetermined control voltage. Means, and a voltage controlled oscillation means whose oscillation frequency is controlled according to this control voltage, wherein the frequency synthesizer has a variable frequency step equal to or greater than the frequency separation interval of the transmission signal by the frequency division multiple access communication system Further, it is characterized in that the oscillation frequency is used as a reference frequency input.

[0014]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, and the same portions as those in FIG. 6 are designated by the same reference numerals. Receive F
The DMA signal is mixed with the local oscillation frequency from the frequency synthesizer 2 in the mixer 1 and frequency converted. This mixed output is input to the demodulator 4 via the band pass filter 3 and demodulated.

As an example of the demodulated signal format, as shown in FIG. 2, it has a channel number and channel data which are periodically inserted at the beginning of the frame for channel identification. Such a signal format is generated by the transmission side circuit shown in FIG. That is, the channel identification number from the channel identification number generator 9 and the transmission data are multiplexed by the multiplexing circuit 8 and output in the signal format shown in FIG.

The channel number discriminator 5 detects the channel number in the demodulated signal demodulated by the demodulator 4 and detects whether this channel number matches the channel number originally intended to be received. . If the channel signal is not the intended intended channel signal, a sweep instruction is output to the sweep controller 6. If it is the target channel signal, no sweep instruction is issued.

The sweep controller 6 receives the sweep instruction and outputs a control voltage to the variable oscillator 7. The following is an example of a general method of giving the control voltage.

When the control voltage currently output to the variable oscillator 7 is V1, V1 is received in response to the sweep instruction.
The control voltage is + ΔV. This ΔV is a very small voltage compared with V1. By this control voltage V1 + ΔV, the oscillation frequency of the variable oscillator 7 changes from Fr to Fr + ΔF.

Here, by setting the reference frequency of the frequency synthesizer 2 as the oscillation frequency of the variable oscillator 7,
When the frequency multiplication number of the synthesizer 2 is K, the output frequency of the synthesizer 2 is K (Fr + ΔF). Since this output frequency is the local oscillation frequency of the mixer 1, the frequency sweep will be executed.

FIG. 4 shows an example of the configuration of this frequency synthesizer 2.
Shown in. The oscillation frequency of the variable oscillator 7 in FIG. 1 is used as a reference frequency input, and this is divided into 1 / L by the frequency divider 21. L is generally set to a value equal to or smaller than the step frequency of the synthesizer.

The phase comparator 22 detects a phase difference between the frequency-divided output of the frequency divider 24 and the phase difference of the 1 / L frequency-divided reference signal. The voltage corresponding to this phase difference is passed through the LPF (low pass filter) 25 to the VCO (voltage controlled oscillator).
It becomes the control voltage of 23, the oscillation output of this VCO 23 becomes the synthesizer output, and it is 1 / M by the frequency divider 24 and becomes 1 input of the phase comparator 22.

This synthesizer uses a PLL (Phase Locked
Loop) circuit, which is phase-locked to 1 / L of the reference signal frequency. Therefore, the formula Fv / M = Fr / L holds. Here, Fv is the oscillation frequency of the VCO 23, and Fr is the reference frequency.

Therefore, Fv = (M / L) Fr, and if M / L is an integer K (frequency multiplier of the synthesizer), the fluctuation of the reference frequency Fr becomes K times and becomes the synthesizer output. Will appear.

By doing so, the frequency step Fs of the synthesizer 2 itself can be made coarse, and the cost of the synthesizer becomes inexpensive. However, since the frequency separation of the FDMA signal is smaller than Fs, it cannot be demodulated as it is. Therefore, in order to receive a desired signal, a frequency sweep method for frequency acquisition is used to detect a signal having a minute frequency separation.

For this detection, a channel number for channel identification is added to the transmission data in advance and transmitted, and it is judged from this channel number whether the demodulated signal is the desired channel signal. Performs a frequency sweep to make fine adjustments.

FIG. 5 is a block diagram of another embodiment of the present invention, in which the same parts as in FIG. 1 are designated by the same reference numerals. The difference from FIG. 1 is that a frequency difference detector 10 is added before the sweep controller 6.

The frequency difference detector 10 compares the demodulation channel number detected by the channel number discriminator 5 with the desired channel number, and if there is a difference, calculates the frequency difference between both channels based on the difference. The sweep controller 6 executes the frequency sweep stepwise by this frequency difference,
We are trying to get a quick and reliable signal acquisition.

An example of the method of calculating the frequency difference will be described below. Now, the channel numbers are 1, 2, 3, 4, ..., M
(M is an arbitrary integer, the FDMA that the system accommodates
(Equal to the wave number of the signal). Further, the frequency separation of the FDMA / SCPC signal is Fds.

When the channel number of the currently received signal is i and the desired channel number is j (1 ≦
i, j ≦ M), and the frequency difference Fdiff between both channels is Fdiff = (j−i) Fds.

This calculation may be performed by a general-purpose CPU,
It is also possible to calculate Fdiff for all pairs of i and j in advance and create a table, and store this in a ROM (Read Only Memory) or the like.

Using the frequency error information thus obtained, a sweep instruction is issued to the frequency sweep controller 6. If it is the target channel signal, the sweep instruction is not issued and the signal is captured.

The sweep controller 6 outputs a control voltage to the variable oscillator 7 using the frequency error information input from the frequency difference detector 10. An example of a general method of giving the control voltage will be described below.

At present, the voltage output to the variable oscillator 7 is V1, and the modulation sensitivity (frequency variation amount vs. control voltage variation amount; Hz / V) Kv of the variable oscillator 7 is Kv. Further, the variable oscillator 7 is used in the frequency synthesizer 2 as described later.
Vc becomes Vc = V1 + Fdiff / (K.Kv) using the multiplier K of the frequency of the synthesizer.

By inputting this voltage Vc, when the current frequency of the variable oscillator 7 is Fr, the output frequency thereof changes from Fr to Fr + ΔF. Where ΔF = Fdi
ff / K.

Further, since the variable oscillator 7 serves as a reference source for the frequency synthesizer 2, the synthesizer output signal frequency Fv is Fv = K (Fr + ΔF) = KFr + Fdiff, where K is the multiplication number.

In this way, the frequency sweep is executed. The configuration of the frequency synthesizer is the same as in the example of FIG. Also in this example, Fv = (M / L) Fr, and if M / L is an integer K, the fluctuation of the reference frequency is multiplied by K and appears as a synthesizer output.

As shown in FIG. 2, by inserting the channel number for identifying the channel in the signal frame, an insertion loss occurs, but the insertion rate (the original signal rate and the signal rate after the channel number is inserted are different from each other). If the ratio is suppressed to about 0.99, the loss is about ₁₀ log ₁₀ (0.99) = 0.04 dB, and the effect on the line can be ignored. It is easy and feasible to set the insertion rate to this level.

[0039]

According to the present invention, coarse adjustment is performed by a frequency synthesizer which is a local oscillator, and fine adjustment is performed by acquisition control by frequency sweep. In addition to being usable, there is an effect that frequency separation can be made small in a high frequency band to enable effective use of frequencies.

Further, there is an effect that the frequency can be captured quickly and surely, and furthermore, the circuit can be easily formed into an LSI, so that the cost increase can be suppressed.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a signal frame format diagram used in an embodiment of the present invention.

FIG. 3 is a block diagram of a transmitting side for obtaining the signal format of FIG.

FIG. 4 is a diagram showing a specific example of a frequency synthesizer.

FIG. 5 is a block diagram of another embodiment of the present invention.

FIG. 6 is a block diagram of a receiving device in a conventional FDMA communication system.

[Explanation of symbols]

 1 Mixer 2 Frequency Synthesizer 3 BPF 4 Demodulator 5 Channel Number Discriminator 6 Sweep Controller 7 Variable Oscillator 8 Multiplex Circuit 9 Channel Identification Number Generator 10 Frequency Difference Detector 21, 24 Divider 22 Phase Comparator 23 VCO 25 LPF

Claims (3)

[Claims] 1. A receiver in a frequency division multiple access communication system, wherein a carrier assigned to each of a plurality of channels is modulated by transmission data of a corresponding channel and its channel identification signal and transmitted, the local unit A frequency synthesizer for generating an oscillation frequency, a mixing means for mixing the local oscillation frequency and the reception frequency, a demodulation means for demodulating a reception signal from the mixed output, and a desired channel detection signal detected from the demodulation output. And a sweep control means for performing variable frequency control of the frequency synthesizer until a channel signal is received. 2. The sweep control means detects a mismatch between the channel identification signal detected from the demodulation output and the desired channel signal and generates a predetermined control voltage, and the control voltage generating means. The frequency synthesizer has a variable frequency step equal to or greater than a frequency separation interval of a transmission signal by a frequency division multiple access communication method, and the oscillation frequency is a reference frequency. The receiving apparatus according to claim 1, wherein the receiving apparatus is configured to receive an input. 3. The control voltage generating means detects the channel identification signal from the demodulation output, and a frequency for calculating a frequency difference between both channels from the detected channel identification signal and the desired channel identification signal. The receiving apparatus according to claim 2, further comprising a difference detecting means and a means for generating the control voltage according to the frequency difference.