JPH05335332A - Thin-film transistor and manufacture thereof - Google Patents

Abstract

PURPOSE:To provide a semiconductor process for separate source and drain regions a given distance from a gate electrode in a simple manner. CONSTITUTION:A window 20 is opened in a passivation film 19, and through this window an impurity is implanted at a high doping concentration to form source and drain regions 21 and 22 in the area to be in contact with source and drain electrodes in a polysilicon layer 14. According to this process, the source and drain regions are put away a given distance from the gate electrode 16a; therefore, no special masking is necessary for this purpose, thus simplifying the manufacturing process.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor and its manufacturing method.

[0002]

2. Description of the Related Art Among thin film transistors, there is one called an LDD (Lighty Doped Drain) structure as a highly reliable device in which the breakdown voltage is improved as compared with an ordinary MOS structure device. This LDD structure thin film transistor is conventionally manufactured as shown in FIG.

First, a base insulating film 2 is formed on an insulating substrate 1 made of glass or the like, and a polysilicon film 3 is formed thereon as a semiconductor film. Next, the gate insulating film 4 and the gate electrode 5 are formed on the portion of the polysilicon film 3 on the channel region 3a. Next, low-concentration impurity regions 6 are formed in portions of the polysilicon film 3 other than under the gate electrodes 5 by ion-implanting impurities at a low concentration using the gate electrode 5 as a mask. After that, a photoresist pattern 7 is formed around the gate electrode 5 and the gate insulating film 4, and by using this as a mask, impurities are ion-implanted at a high concentration, so that the polysilicon film 3 outside the photoresist pattern 7 is sourced. A region 8a and a drain region 8b are formed. After that, after removing the photoresist pattern 7, a passivation film (not shown) is formed on the entire surface, contact holes are opened, and a source electrode and a drain electrode are formed to complete a thin film transistor having an LDD structure.

In the above manufacturing method, the photoresist pattern 7 formed around the gate electrode 5 and the gate insulating film 4 is wider than the gate electrode 5 so that the source region 8a and the drain region 8b are separated from the gate electrode 5. It can be formed separately. Then, a low-concentration impurity region 6 can be left between the source region 8a and the drain region 8b and the channel region 3a below the gate electrode 5, and the low-concentration impurity region 6 can alleviate a high electric field to increase the breakdown voltage. An improved device can be obtained.

[0005]

However, in the conventional manufacturing method as described above, the photoresist pattern 7 which is not finally used as a mask for separating the source region 8a and the drain region 8b from the gate electrode 5 by a predetermined distance is formed. Therefore, there is a problem in that the entire manufacturing process becomes long, resulting in an increase in cost and a decrease in yield.

An object of the present invention is to provide a thin film transistor in which a structure in which a source region and a drain region are separated from a gate electrode by a predetermined distance can be formed by a simple process, and a manufacturing method thereof.

[0007]

The invention according to claim 1 is
The semiconductor film is covered with a passivation film, an opening is formed in the passivation film, a source electrode and a drain electrode are formed in the opening, and a source region is formed only in a portion of the semiconductor film in contact with the source electrode and the drain electrode. And a drain region is formed.

According to a second aspect of the present invention, a gate insulating film and a gate electrode are formed on a semiconductor film, the entire surface is covered with a passivation film, and a source region and a drain of the passivation film formed on the semiconductor film are formed. An opening is provided in a portion corresponding to the region, a high concentration of impurities is injected through the opening to form a source region and a drain region in the semiconductor film, and a conductive layer is deposited in the opening to form the source electrode and the drain. An electrode is formed.

[0009]

According to the present invention, the impurity is implanted through the opening formed in the passivation film to form the source region and the drain region only in the portion of the semiconductor film which is in contact with the source electrode and the drain electrode. , The source and drain regions can be separated from the gate electrode by the distance from the side wall of the gate electrode to the source and drain electrodes, and a special mask forming process for separating them is unnecessary, and the process is simplified accordingly. You can

[0010]

1 to 8 are sectional views showing an embodiment of the present invention in the order of manufacturing steps. Hereinafter, a manufacturing method according to an embodiment of the present invention will be described with reference to the drawings, and a structure of a thin film transistor according to the embodiment will also be described.

First, as shown in FIG. 1, a base insulating film 12 is formed on a glass substrate 11 as an insulating substrate. The base insulating film 12 is formed so that the substance in the glass substrate 11 does not enter the semiconductor film described later. Specifically, a silicon oxide film is formed by a sputtering method. next,
An amorphous silicon film 13 is formed on the base insulating film 12 by the plasma CVD method. Next, as shown in FIG. 2, the amorphous silicon film 13 is irradiated with an excimer laser to convert the amorphous silicon film 13 into a polysilicon film 14. Then, a silicon oxide film 15 having a thickness of about 100 nm is formed on the polysilicon film 14 by a sputtering method as shown in FIG. 3, and then a gate electrode metal layer 16 of chromium or the like is formed thereon by a sputtering method. It is formed to have a thickness of about 100 nm. Then, the gate electrode metal layer 16 and the silicon oxide film 15 are patterned by the photolithography method, so that the gate insulating film 1 is formed only on the channel region 17 of the polysilicon film 14.
5a and the gate electrode 16a are formed.

Next, as shown in FIG. 4, phosphorus and hydrogen hydride are implanted into the polysilicon film 14 by using an ion doping apparatus with the gate electrode 16a as a mask to form a polysilicon film 14 of about 3 × 10 ¹³ pieces / cm ^2. Silicon film 14
The low-concentration impurity region 18 is formed in a portion other than under the gate electrode 16a. Thereafter, as shown in FIG. 5, a passivation film 19 made of a silicon nitride film is formed on the entire surface of the polysilicon film 14 including the upper surface of the gate electrode 16a by a plasma CVD method to a thickness of about 300 nm. Then, in the passivation film 19, an opening 20 is formed by photolithography in a portion corresponding to a source region and a drain region which will be described later, as shown in FIG.

Next, as shown in FIG. 7, using an ion doping apparatus, with the passivation film 19 as a mask, 3 × 10 ¹⁵ phosphorus / hydrogen phosphide and phosphorus hydride are passed through the opening 20 formed in the passivation film 19. By implanting approximately cm ² into the polysilicon film 14, a source region 21 and a drain region 22 are formed in a portion of the polysilicon film 14 corresponding to the opening 20. afterwards,
Irradiating the excimer laser, the low concentration impurity region 18,
The source region 21 and the drain region 22 are activated. After that, an electrode metal such as aluminum is formed on the entire surface by a sputtering method and is patterned by a photolithography method to form a source electrode 23 and a drain electrode 24 in the opening 20, as shown in FIG. Thus,
The thin film transistor having the LDD structure is completed.

In this thin film transistor, as a result of performing impurity implantation for forming the source region 21 and the drain region 22 through the opening 20 formed in the passivation film 19, the polysilicon film 14 is in contact with the source electrode 23 and the drain electrode 24. The source region 21 and the drain region 22 are formed only in the gate electrode 1.
Source electrode 23 and drain electrode 24 from the side wall of 6a
Up to the distance from the gate electrode 16a. Then, the source region 21 and the drain region 22 and the channel region 17 under the gate electrode 16a.
The low-concentration impurity regions 18 are left in between, and the low-concentration impurity regions 18 can alleviate a high electric field to obtain a high breakdown voltage element. Further, the source region 21 and the drain region 22 are formed at a certain distance from the gate electrode 16a as described above. According to the manufacturing method as described above, the mask for keeping the passivation film 19 at a certain distance. Therefore, no special mask forming step is required, and the step can be simplified accordingly.

Although the above-mentioned embodiment is a case of manufacturing a thin film transistor having an LDD structure, if the low-concentration impurity implantation performed in FIG. 4 is omitted, the gate electrode is formed smaller than the channel region and the gate voltage is reduced. It is possible to manufacture an offset gate structure thin film transistor in which a leak current at the time of reverse bias is reduced.

Further, in FIG. 3, the gate insulating film 15 is not etched, and the gate electrode 16a and the gate insulating film 15 are not etched.
The passivation film 19 may be formed thereon, and then the passivation film 19 and the gate insulating film 15 may be etched to form the opening 20.

[0017]

As described above, according to the present invention, high-concentration impurity implantation is performed through the opening formed in the passivation film, and only the portion of the semiconductor film that is in contact with the source electrode and the drain electrode is source region. Since the drain region is formed, the structure in which the source region and the drain region are separated from the gate electrode by a certain distance can be formed without a special mask forming step, and the step can be simplified. As a result, the cost can be reduced and the yield can be improved.

[Brief description of drawings]

FIG. 1 is a sectional view showing an amorphous silicon film forming step in an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a step that follows FIG. 1 in one embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a step that follows FIG. 2 in one embodiment of the present invention.

FIG. 4 is a cross-sectional view showing a step that follows FIG. 3 in one embodiment of the present invention.

5 is a cross-sectional view showing a step that follows FIG. 4 in an embodiment of the present invention. FIG.

FIG. 6 is a cross-sectional view showing a step that follows FIG. 5 in one embodiment of the present invention.

FIG. 7 is a cross-sectional view showing a step that follows the step of FIG. 6 in one embodiment of the present invention.

FIG. 8 is a cross-sectional view showing a step that follows the step of FIG. 7 in one embodiment of the present invention.

FIG. 9 is a cross-sectional view showing a conventional manufacturing method.

[Explanation of symbols]

 14 Polysilicon Film 15a Gate Insulating Film 16a Gate Electrode 18 Low Concentration Impurity Region 19 Passivation 20 Opening 21 Source Region 22 Drain Region 23 Source Electrode 24 Drain Electrode

Claims (3)

[Claims] 1. A semiconductor film is covered with a passivation film, an opening is formed in the passivation film, and a source electrode and a drain electrode are formed in the opening.
A thin film transistor, wherein a source region and a drain region are formed only in a portion of the semiconductor film which is in contact with the source electrode and the drain electrode. 2. A gate insulating film and a gate electrode are formed on a semiconductor film, the entire surface is covered with a passivation film, and a portion of the passivation film corresponding to a source region and a drain region formed in the semiconductor film is formed. With an opening,
Impurity is injected at a high concentration through the opening to form a source region and a drain region in the semiconductor film, and a conductive layer is deposited in the opening to form a source electrode and a drain electrode. Production method. 3. After forming a gate insulating film and a gate electrode on the semiconductor film and before covering the whole with a passivation film,
3. The method of manufacturing a thin film transistor according to claim 2, wherein impurities are implanted into the semiconductor film outside the region corresponding to the gate electrode at a low concentration.