JPH05328226A - Solid-state image pickup device and its driving method - Google Patents

Abstract

PURPOSE:To improve the S/N by storing the charge of a picture element to a storage region by a 1st vertical scanning section and transferring the charge from the storage region to a storage section by a 2nd vertical scanning section. CONSTITUTION:When a 1st switching element 43 is turned on by a drive signal phi21 of a 1st shift register 32, the charge generated by each photodiode 42 of picture elements (1, 1)-(4, 1) is started to be read. In this case, the charge read from each photo diode 42 is stored in each storage region 44. When a drive signal phi11 is set by a 2nd shift register 32 in this state, the charge stored in a storage region 44 of each picture element 41 is transferred respectively to storage sections 35A1-35A4 of each column respectively and stored. Then, drive signals phi21, phi11 are turned off and the charge stored in the storage sections 35A1-35A4 is read and transferred by a horizontal read section 35 and outputted external sequentially via an amplifier 37 as a picture signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device in which pixels are two-dimensionally arranged.

In recent years, in the fields of industry and medicine, there is a method of detecting infrared rays radiated from an object or the like by an infrared sensor when the temperature of the surface of the earth, an object or a human body is known in a non-contact manner. Is required to increase.

Therefore, it is necessary to improve noise resistance and performance.

[0004]

2. Description of the Related Art FIG. 7 is a block diagram of a conventional solid-state image pickup device. 7A shows an interline solid-state imaging device, and FIG. 7B shows a line address solid-state imaging device.

The solid-state image pickup device 11 shown in FIG.
A predetermined number (three pixels in the figure) of pixels 12 each including a photodiode 12a, a storage gate 12b, and a transfer gate 12c are provided in the vertical readout CCD 13 in the vertical direction. Vertical readout CCD provided with this pixel 12
13 is a predetermined number (three in the figure), horizontal readout CCD 14
Is installed horizontally. That is, the pixels 12 are arranged in a matrix. Then, the CCD 14 for horizontal reading
Is output via the amplifier 15.

In this solid-state image pickup device 11, the CCD 13 and 14 perform vertical signal reading and horizontal signal reading.

That is, when the photodiode 12a of any one of the pixels 12 receives the light, the charge is accumulated in the accumulation gate 12b, and the charge is transferred to the vertical readout CCD 13 via the transfer gate 12c. After that, the horizontal read CCD 14 is sequentially read line by line from the vertical read CCD 13.
The electric charges are transferred to and the signals are sequentially taken out from the amplifier 15 to the outside.

Further, the solid-state image pickup device 1 shown in FIG.
In FIG. 6, photodiodes 17a and switching elements (for example, MOSFETs) 17b forming pixels 17 are arranged in a matrix (3 × 3 pixels in the figure).
Of these, the shift register 18 vertically shifts each pixel 17
Are scanned, and the charges from the photodiode 17a due to the light reception are temporarily stored in the parallel storage section 19 for each column. Then, the data is transferred from each parallel storage unit 19 to the horizontal reading unit 20 and output via the amplifier 21.

Such a solid-state image pickup device 16 is designed to access only one row, output a signal to the outside, and then read the next one row to the outside in the same manner.

That is, the shift register 18 reads charges from each pixel 17 in one row into a predetermined parallel storage unit 19 one column at a time, and then a horizontal reading unit 20 reads out electric charges in the horizontal direction. The signal is output to the outside via 21. Then, when the reading of the signal for one row is completed, the signal from the pixel 17 of the next another row is similarly read out to the outside, and the accumulation and the reading are sequentially performed for each row. ..

[0011]

However, in the interline type solid-state image pickup device 11 shown in FIG.
Since each pixel has the storage gate 12b, if the pixel (cell) area is reduced, the area of the storage gate is also reduced and the maximum accumulated charge amount is reduced.
There is a problem that the N ratio decreases.

On the other hand, since the line address type solid-state image pickup device 16 shown in FIG. 7B has the storage section 19 for each column, the cell area reduction has little effect. But,
When the number of pixels in the column direction increases, the access time for one row becomes shorter. That is, when the frame period is T _F and the pixels are N rows, the maximum integration time is T _F / N, and the access time is shortened. This reduces the maximum accumulated charge,
There is a problem that the SN ratio decreases.

Therefore, the present invention has been made in view of the above problems, and an object of the present invention is to provide a solid-state image pickup device capable of improving the SN ratio by preventing a decrease in the maximum accumulated charge amount due to an increase in the number of pixels.

[0014]

Means for Solving the Problems The above-mentioned problem is to provide a first switching element for reading out an electric charge generated in a light receiving element, an accumulation area for accumulating the electric charge read out by the first switching element, and the accumulation area. A pixel section in which pixels each composed of a second switching element that transfers the electric charges of the pixel section are two-dimensionally arranged, and a first vertical element that drives the first switching element of each pixel of the pixel section in the row direction. A scanning unit, a second vertical scanning unit that drives the second swinging element of each pixel of the pixel unit in the row direction, and the charges transferred by the second switching element are accumulated in the column direction. The problem can be solved by including a predetermined number of storage units and a horizontal scanning unit that reads out the electric charges of the storage units and outputs a signal.

In the driving method, the charges generated in the light receiving elements in the pixels arranged two-dimensionally and the charges generated in the light receiving elements are read out in the vertical direction and accumulated in the accumulation region, and accumulated in the accumulation region. The charges and the charges generated in the light receiving element are transferred in the vertical direction, the charges are accumulated in the accumulating unit for each column, and the charges accumulated in the accumulating units are read out in the horizontal direction and output as a signal.

[0016]

As described above, the charge is stored in the storage region of each pixel in the column direction by the first vertical scanning unit, and the transfer of the charge from the storage region to the storage unit is performed by the second scanning unit. .. Then, the electric charge in the storage section is read out by the horizontal scanning section to output a signal.

As a result, it is possible to lengthen the charge storage time in the storage section, and even if the storage area of each pixel becomes smaller as the number of pixels increases, the maximum stored charge amount is prevented from decreasing and the SN ratio is reduced. Can be improved.

[0018]

FIG. 1 is a block diagram of the first embodiment of the present invention. The solid-state imaging device 31 _A in FIG.
First and second shift registers 3 which are vertical scanning units of
2, 33, a pixel section 34 _A , storage sections 35 _{A1 to} 35 _A4 , a horizontal reading section 36 which is a horizontal scanning section, and an amplifier 37.

The pixel section 34 _A has pixels 41 arranged two-dimensionally, for example, 4 rows × 4 columns. The pixel 41 is
The charges generated in the photodiode 42, which is a light receiving element, are accumulated in the accumulation region 44 via the first switching element (for example, MOSFET) 43, and the charges in the accumulation region 44 are transferred by the second switching element (for example, MOSFET) 45. To be done.

The first switching element 43 of each pixel 41 has the same address lines 46 _{1 to} 46 in the row direction.
Is driven by _4, it is driven by the same address lines 47 ₁ to 47 ₄ in the second switching element 44 in the row direction. In addition, the charge transferred by the second switching element 45 is
It is sent via the data lines 48 _{1 to} 48 ₄ to the storage units 35 _{A1 to} 35 _A4 provided for each column.

The horizontal reading section 36 includes storage sections 35 _{A1 to} 35 _A3.
The charge accumulated in _A4 is read out, and an image signal is output via the amplifier 37.

The area of each storage unit 35 _{A1 to} 35 _A4 is
It is formed to be larger than the area of the storage region 44 in each pixel 41.

Here, FIG. 2 shows an operation time chart of FIG. The pixels in FIG. 1 are positioned in 4 rows × 4 columns and are displayed in a matrix. The drive signals of the first shift register 32 are φ21 to φ24, and the drive signals of the second shift register 33 are φ11 to φ14.

In this case, the drive signals φ11 to φ14 output from the second shift register 33 are pulses for sequentially reading the pixels 41 in the vertical direction of the pixel portion 34 _A , and a plurality of them are simultaneously turned on. There is no such thing. On the other hand, the drive signal φ21 output from the first shift register 32
.Phi.24 is a pulse for determining the time for reading out the charges from the photodiode 42, and a plurality of pulses may be in the ON state at the same time.

Now, when the first switching element 43 is turned on by the drive signal φ21 of the first shift register 32, the pixels (1, 1), (2, 1), (3, 1),
The reading of the charge generated in each photodiode 42 of (4, 1) is started. At this time, the drive signal φ11 from the second shift register 33 is still in the off state, and therefore the charge read from each photodiode 42 is
It is accumulated in each accumulation area 44.

Therefore, in this state, the second shift register
When the drive signal φ11 is turned on by 33, each pixel
The charge accumulated in the accumulation region 44 of 41 is accumulated in each column.
35 _A1~ 35_A4Are transferred to and accumulated in each. this
In this case, all the charges accumulated in the accumulation region 44 are transferred.
Drive signal φ21 remains on,
The charge from the ion 42 is directly accumulated in the storage unit 35._A1~ 35_A4
Be transferred to. That is, both drive signals φ11 and φ21 are
When in the ON state, the storage area 44 serves as a channel.
It will work.

Then, the drive signals φ21 and φ11 are turned off, and the charges accumulated in the accumulators 35 _{A1 to} 35 _A4 are
The image data is read out by the horizontal reading section 36 and transferred, and is sequentially output as an image signal to the outside via the amplifier 37.

During storage of the storage units 35 _{A1 to} 35 _A4 , the drive signal φ22 from the first shift register 32 is in the ON state, and the pixels (1, 2), (2, 2),
The charges are read out to the storage regions 44 of (3, 2) and (4, 2). Then, in the same manner, the horizontal reading section 36 outputs the image signal.

These operations are sequentially repeated up to the drive signals .phi.24 and .phi.14 for the first and second shift registers 32 and 33.

In the horizontal reading section 36, the pixel (1, 1)
To (4, 1) while the charges of the photodiode 42 are being read out horizontally, the pixels (1, 2) to (4,
The charge of the photodiode 42 of 2) is accumulated in the storage sections 35 _A1 to 35 _A3.
5 _A4 may be made to flow in the same manner as pixel (1, 3) to
You may read the electric charge of the photodiode in (4, 3).

Thus, the effective storage area is
Since the area is the area of the storage parts 35 _{A1 to} 35 _A4 , a large storage area can be set. Further, the effective integration time is determined by the output pulse (φ2
The pulse width is 1 to φ24), and a value larger than the above T _F / N can be obtained.

That is, it is possible to prevent the decrease of the maximum accumulated charge amount by taking advantage of the accumulation time of the interline type and the accumulation area of the line address type.
Therefore, even if the number of pixels increases and the storage region 44 of the pixel 41 shrinks, the maximum amount of accumulated charge does not decrease, and the SN ratio can be improved.

Next, FIG. 3 shows a block diagram of a second embodiment of the present invention. In the solid-state imaging device 31 _B shown in FIG. 3, the pixel portion 34 _B is provided with a single storage region 51 shared by two adjacent pixels 41 in the column direction.

In this case, the drive signal φ21 of the first shift register 32 drives the pixels 41 in the first and second rows,
The drive signal φ22 drives the pixels 41 in the third and fourth rows. Then, the drive signals φ21 and φ22 are supplied to each pixel 41 via a gate (for example, MOSFET) 52 provided in each row, and the gates 52 in the first and third rows are controlled by the first interlaced signal φf1. Gate 5 in the second and fourth rows
2 is controlled by the second interlaced signal φf2.

The drive signals φ11 and φ12 of the second shift register 33 drive one second switching element 45 corresponding to each storage region 51. That is, the second switching element 45 of any one of the two pixels 41 sharing the storage region 51 can be omitted.

The other structure is similar to that of FIG.

FIG. 4 shows the operation time chart of FIG.
Indicates the The solid-state imaging device 31 of FIG. _BRead out charge
The principle is the same as in Fig. 1 (Fig. 2), but the driving order is different.
Only to do so. That is, the first shift register 32
The charge read from the photodiode 42 by
Every other row by field switching signals φf1 and φf2
What to do and what to read with column-wise interlace
Is.

As shown in FIG. 4, while the first field switching signal φf1 is on, the first and third odd-numbered rows are driven, and when the second field switching signal φf2 is on, two rows are driven. It drives the even numbered rows of the fourth and fourth rows.

Therefore, two pixels adjacent to each other in the column direction of the pixel 41 can share the storage region 51.

Next, FIG. 5 shows a block diagram of a third embodiment of the present invention. In the solid-state imaging device 31 _C shown in FIG. 5, a single storage region 61 is shared by two pixels 41 adjacent to each other in the row direction in the pixel section 34 _C.

In this case, each of the drive signals φ21 to φ24 from the first shift register 32 is supplied to the first switching element 43 of the pixel 41 in the odd column of each row via the gate (for example, MOSFET) 62a. At the same time, the first switching elements 43 of the pixels 41 in the even columns of each row are supplied via the gate (for example, MOSFET) 62b.

The gate 62b is controlled by the first field switching signal φf1 and the gate 62a is controlled by the second field switching signal φf2.

The drive signals φ11 to φ14 of the second shift register 33 drive one second switching element 45 corresponding to each storage area 61. That is, the second switching element 45 of any one of the two pixels 41 sharing the storage region 61 can be omitted.

In this case, the data is the storage area 61 of each column.
The electric charges are stored in the two storage units 35 _B1 and 35 _B2 via the two data lines 63 ₁ and 63 _{2 because} they are transmitted from the storage unit 35 _B1 and 35 _B2 .

The other structure is the same as that of FIG.

Here, FIG. 6 shows an operation time chart of FIG. In FIG. 3, the signal charges are read by interlacing in the column direction, and in FIG. 5, the signal charges are read by interlacing in the row direction.

That is, the charge read from the photodiode 42 by the first shift register 32 is performed every other column by the field switching signals φf1 and φf2, and the signal output by the horizontal read section 36 is shown in FIGS. Same as 3.

As shown in FIG. 6, while the first field switching signal φf1 is on, the first and third odd columns are driven, and the second field switching signal φf2 is on, The even-numbered columns of the second and fourth columns are driven.

As described above, two pixels adjacent to each other in the row direction of the pixel 41 can be shared by the storage region 61.

In the first to third embodiments, the pixel 41 is used.
Shows the case where the two-dimensional arrangement of 4 rows × 4 columns is
The number is not limited.

[0051]

As described above, according to the present invention, the charge is accumulated in the accumulation region of the pixel by the first vertical scanning unit, and the charge is transferred from the accumulation region to the accumulation unit in the second vertical scanning unit. By performing the scanning unit, it is possible to prevent the maximum accumulated charge amount from decreasing due to the increase in the number of pixels, and it is possible to improve the SN ratio.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a first embodiment of the present invention.

FIG. 2 is an operation time chart of FIG.

FIG. 3 is a configuration diagram of a second embodiment of the present invention.

FIG. 4 is an operation time chart of FIG.

FIG. 5 is a configuration diagram of a third embodiment of the present invention.

6 is an operation time chart of FIG.

FIG. 7 is a configuration diagram of a conventional solid-state imaging device.

[Explanation of symbols]

31 _{A to} 31 _C Solid-state imaging device 32 First shift register 33 Second shift register 34 _{A to} 34 _C Pixel unit 35 _{A1 to} 35 _A4 , 35 _B1 , 35 _B2 storage unit 36 Horizontal readout unit 37 Amplifier 41 Pixel 42 Photo Diode 43 First switching element 44, 51, 61 Storage area 45 Second switching element

Claims (6)

[Claims] 1. A first switching element (43) for reading out an electric charge generated by a light receiving element (42), and an accumulation region (44, 51) for accumulating the electric charge read out by the first switching element (43). , 61) and the storage area (4
4, 51, 61) and a pixel portion (34 _{A to} 34 _c ) in which pixels (41) each composed of a second switching element (45) for transferring charges are arranged two-dimensionally, and the pixel portion (34 Of the first vertical scanning unit (32) for driving the first switching element (43) of each of the pixels (41) of _{A to} 34 _C ) in the row direction, and the pixel unit (34 _{A to} 34 _C ). A second vertical scanning unit (33) for driving the second swinging element (45) of each pixel (41) in the row direction, and a column for transferring the charges transferred by the second switching element (45). a predetermined number of storage section for storing in a direction (35 _A1 to 3
5 _A4 , 35 _B1 , 35 _B2 ) and a horizontal scanning section (36) for reading out the electric charges of the respective storage sections (35 _{A1 to} 35 _A4 , 35 _B1 , 35 _B2 ) and outputting the signals. Solid-state image sensor. 2. The pixel (4) of the pixel section (34 _B )
In 1), the storage areas (51) of two pixels adjacent in the column direction are shared, and the second one of the two pixels of the two storage pixels is shared.
2. The solid-state image pickup device according to claim 1, wherein the switching element (45) is omitted. 3. The pixel (4) of the pixel section (34 _C ).
In 1), the storage areas (61) of two pixels adjacent in the row direction are shared, and the second of any one of the two pixels is shared.
2. The solid-state image pickup device according to claim 1, wherein the switching element (45) is omitted. 4. A step of vertically reading out electric charges generated in a light receiving element (42) in a pixel (41) arranged two-dimensionally and accumulating them in an accumulating area (44, 51, 61), and the accumulating area. The charges accumulated in (44, 51, 61) and the charges generated in the light receiving element (42) are vertically transferred, and the charges are accumulated for each column (35 _{A1 to} 35 _A4 , 3).
5 _B1 , 35 _B2 ) and a step of reading out the electric charges accumulated in the respective accumulating sections (35 _{A1 to} 35 _A4 , 35 _B1 , 35 _B2 ) in the horizontal direction and outputting a signal. A method of driving a characteristic solid-state imaging device. 5. The two pixels (4
The storage region (51) of 1) is shared, and the charge generated in the light receiving element (42) is stored every other row in the storage region (5).
1), and at the same time, the charges accumulated in the accumulation region (51) and the charges generated in the light receiving element (42) are transferred every other row and accumulated in the accumulation units (35 _{A1 to} 35 _A4 ). The method for driving a solid-state imaging device according to claim 4, further comprising: 6. The two pixels (4
The storage region (61) of 1) is shared, and the charge generated in the light receiving element (42) is stored every other column in the storage region (6).
1), and at the same time, the charges accumulated in the accumulation region (61) and the charges generated in the light receiving element (42) are transferred every other column and accumulated in the accumulation parts (35 _B1 , 35 _B2 ). The method for driving a solid-state imaging device according to claim 4, further comprising: