JPH0532771B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a virtual computer control method, and more particularly to a virtual computer control method for controlling allocation of real processors and virtual computers in a virtual computer system.

In general, a virtual computer system is a technology that virtually creates multiple computer systems on one computer system, and in this virtual computer system, the virtual processors of each virtual computer on the system are sequentially A real processor is allocated.

Therefore, the virtual machine can actually execute processing only when a real processor is assigned.

The following processing is required to switch virtual machines, that is, to switch assignments of virtual processors on virtual machines to real processors.

In other words, since the processor state of the virtual machine to which a real processor is currently assigned, that is, which is currently being executed, is on the real processor, this is saved as the state of the virtual processor to the save area corresponding to the virtual machine, and then , the saved processor information of the virtual machine to which a new real processor is to be allocated, that is, the state of the virtual processor, is loaded onto the real processor, and the virtual machine becomes executable for the first time.

In this way, in a virtual computer system,
Since a relatively large overhead is required when switching the assignment of a virtual processor to a real processor, it is undesirable to unnecessarily increase the number of times this virtual machine is switched.

On the other hand, even if there is no process to be executed for a long time on a virtual machine, it is not desirable to allocate a real processor to the virtual machine from the viewpoint of effective use of the real processor.

Conventional virtual machine control methods include a virtual machine control table that stores time slice values for each virtual machine, and a process switching control mechanism that detects the idle state of the virtual machine running on a real processor and outputs an idle detection signal. and a time slice timer that outputs a time slice expiry signal after a specified time indicated by the corresponding time slice value has elapsed since the real processor was assigned to the virtual machine, and when the idle detection signal is supplied. and a virtual machine switching control mechanism for determining and switching a virtual machine to be assigned to the real processor when the time slice expiry signal is supplied.

In other words, in conventional virtual machine control methods, there are two methods for switching a virtual machine: a method for switching to another virtual machine when there is no more processing to be executed on the virtual machine, that is, when an idle state is detected; A method is known in which a real processor is assigned to a virtual machine at regular intervals, regardless of whether there is a process to be executed by the virtual machine.

However, the method of switching to another executable virtual machine upon detecting an idle state has the following drawbacks.

In other words, when multiple programs are running within a single virtual machine, other programs often become executable after a short period of time, and when the virtual machine becomes temporarily idle, It is often not a good idea to switch between the two.

On the other hand, in a method that mechanically allocates a real processor to each virtual machine for a fixed period of time, if only a single program is running on the virtual machine, once an input/output request is received from the program on that virtual machine, When this program enters the wait state, the virtual machine remains idle until this input/output operation is completed.

That is, since input/output operations are generally extremely slow compared to the operating time of a processor, assigning a real processor to this virtual machine as is would result in needlessly monopolizing the real processor.

That is, the conventional virtual machine control method has the drawbacks of large overhead and low utilization efficiency of the real processor.

An object of the present invention is to provide a virtual machine control method that can reduce overhead and improve the efficiency of using real processors.

That is, an object of the present invention has been made in view of the above points, and it is an object of the present invention to provide a virtual machine control method that reduces switching of virtual machines and increases the efficiency of using real processors.

That is, an object of the present invention is, for example, to set virtual machine switching as instruction information for a virtual machine running with a single program, and to set virtual machine switching as instruction information for a virtual machine running with multiple programs. By instructing continuation of allocation, the number of times virtual machines are switched is reduced, and the wasted time of real processors is also reduced.The virtual machine system reduces the overhead of switching virtual machines and makes effective use of real processors. The objective is to provide a virtual computer control method that can be implemented.

The virtual machine control method of the present invention includes a virtual machine control table that stores a time slice value and instruction information indicating whether to switch or continue for each virtual machine, and detects the idle state of the virtual machine running on a real processor. and a time slice timer that outputs a time slice expiration signal after a specified time specified by the corresponding time slice value has elapsed since the virtual machine was assigned the real processor. and determining and switching a virtual machine to be assigned to the real processor when the idle detection signal is supplied, the corresponding instruction information instructs to continue, and when the time slice expiration signal is supplied. and a virtual machine switching control mechanism.

That is, in a virtual computer system implementing a plurality of virtual computers, the virtual computer control method of the present invention includes: a virtual computer switching control means that determines a virtual computer to be assigned to a real processor and switches the virtual computer based on this determination; a time slice timer that generates a time slice expiry signal to the virtual machine switching control means when a specified time has elapsed since the virtual machine was assigned a real processor; and a time slice timer that detects an idle state in the virtual machine running on the real processor. It has a process switching control means, a virtual machine control table that stores state information of each virtual machine and save information as a processor state, and also stores instruction information for specifying an operation when an idle state is detected. When an idle state is detected in a running virtual machine that is assigned a processor, the instruction information on the virtual machine control table corresponding to the virtual machine that has been assigned a real processor is referred to, and the instruction information is executed according to its contents. If the instruction information specifies switching, the real processor is switched to another virtual machine by activating the virtual machine switching control mechanism, and if the instruction information specifies continuation, the real processor is switched to another virtual computer. does not switch the allocation of real processors to other virtual machines,
The virtual machine is configured to be switched in response to a time slice expiration signal generated by the time slice timer.

In other words, the virtual machine control method of the present invention determines whether to switch virtual machines when an idle state of a running virtual machine is detected, or to continue assigning virtual machines until a certain period of time elapses without switching. The configuration is configured such that instruction information indicating whether the virtual machine should be used is maintained for each virtual machine, and when an idle state is detected in a virtual machine, switching to another virtual machine or continuation of the virtual machine is controlled according to this instruction information. be done.

Next, the configuration and operation of an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

In the virtual machine control method shown in Figure 1,
The virtual machine control table 1 has entries corresponding to each virtual machine, and each entry contains status information 1 indicating whether the corresponding virtual machine is operable.
2 and the corresponding virtual machine time slice value 1
3, in addition to the saved information 14 which is the processor state at the time when the real processor was taken away from the virtual processor of the virtual machine last time, that is, when the assignment of the real processor to the virtual processor of the virtual machine was cancelled. , for storing instruction information 11 indicating processing when an idle state is detected.

When the value "1" is set as the instruction information 11, it indicates that the virtual machine should be switched when an idle state is detected. In addition, the value “0” is specified as the instruction information 11.
If set, it indicates that even if an idle state is detected, the allocation should continue without switching the virtual machine and processing should continue.

Furthermore, at the time of switching each virtual machine, the virtual machine switching control mechanism 2 determines the next virtual machine to which a real processor should be assigned, and based on this decision, changes the processor state of the virtual machine to which the real processor was assigned until just before. is read from the processor status register group 3 and saved as the save information 14 in the virtual machine control table 1, and the save information 14 corresponding to the virtual machine to which a new real processor is to be allocated is retrieved from the virtual machine control table 1 and executed. By storing the information in the processor status register group 3 of the processor, switching between virtual machines is also performed. At the same time, the virtual machine identification number VMID indicating the virtual machine to which the real processor has been newly assigned is set in the virtual machine identification number register 5, and the state of the virtual machine is also updated to "running".

At this time, the time slice timer 7 is also initialized. That is, the virtual machine switching control mechanism 2 sets the time slice value 13 corresponding to the virtual machine identification number VMID on the virtual machine control table 1 in the time slice timer 7 by supplying the time slice value setting signal 72. The time slice timer 7 is a timer that counts down based on a clock signal, and when a specified time has elapsed, it generates a time slice expiration signal 71 and notifies the virtual machine switching control mechanism 2.

A time slice expiration signal 71 from the time slice timer 7 is applied to the virtual machine switching control mechanism 2, and is used as a trigger for switching the virtual machine. That is, when the time slice expires, the real processor is taken away from the virtual machine to which the real processor has been assigned so far, and is assigned to another executable virtual machine.

In addition, in the embodiment shown in FIG. 1, all input/output operations generated by programs on the virtual machine are performed by firmware. It is said that processing such as loading the operating environment of the control program for processing the output operation is not necessary.

In other words, an input/output request issued by a program on a virtual machine to a virtual input/output device is converted by firmware into an input/output request to a corresponding real device without saving the processor state of the virtual machine. The input/output interrupt that is executed and applied to the real processor upon completion of the input/output is also converted to the input/output interrupt of the virtual input/output device by the firmware without saving the state of the virtual machine, and the input/output interrupt is sent to the virtual machine. It is also reflected in the state of That is, a process is performed to change the state of the virtual machine to an executable state, and it is also used as a trigger for switching the virtual machine.

The virtual machine switching control mechanism 2 started with this opportunity will allocate a real processor to this virtual machine if there is no other executable virtual machine.

Further, as a matter of course, the virtual machine switching control mechanism 2 itself is realized by hardware or firmware, and there is no need to use the real processor provided to the virtual machine for this to operate.

The process switching control mechanism 4 controls the allocation of processors to each process within the virtual machine, and when there are no executable processes within the virtual machine, that is, the processors within the virtual machine become idle. When the idle time is reached, this is detected and an idle detection signal 41 is output. This idle detection signal 41 is applied to one input of the AND gate 6, and the instruction information 11 from the virtual machine control table 1 is applied to the other input, and its output is used as the virtual machine switching signal 61 to control virtual machine switching. is applied to mechanism 2.

When a certain virtual machine is currently being executed (at this time, the virtual machine identification number VMID for identifying this virtual machine is stored in the virtual machine identification number register 5, and this virtual machine identification number VMID
Virtual machine control table 1 addressed by
The value of the instruction information 11 stored in is applied to the AND gate 6. ) The process switching control mechanism 4 detects the idle state and outputs the idle detection signal 4.
When 1 is output, this idle detection signal 41 is applied to the AND gate 6.

At this time, when the instruction information 11 of the entry corresponding to the running virtual machine among the instruction information 11 stored in the virtual machine control table 1 has the value "1", that is, when the virtual machine's idle state is detected, If switching is being instructed, the AND gate 6 outputs the value "1" as the virtual machine switching signal 61, and thereby the virtual machine switching control mechanism 2 is activated.

The activated virtual machine switching control mechanism 2 changes the state of the virtual machine to which the real processor is currently assigned to the waiting state.

Next, state information 1 of virtual machine control table 1
2 and determines an executable virtual machine. After this, the processor state of the virtual machine to which the real processor has been assigned up to now is saved as the save information 14 of the virtual machine control table 1, and then the saved information 14 of the determined virtual machine is saved.
The switch to the selected virtual machine is completed by returning the virtual machine to the real processor.

When the process switching control mechanism 4 detects an idle state, the instruction information 11 corresponding to the virtual machine that is being executed, that is, to which a real processor has been assigned in the virtual machine control table 1, indicates that the virtual machine allocation should continue. In other words, when the value of the corresponding instruction information 11 is "0", the AND gate 6 outputs "0", so the state of the virtual machine is changed and the virtual machine is switched accordingly. Instead, this virtual machine remains assigned a real processor and waits for the idle state to be released.

If the instruction information 11 instructs to continue the allocation of the virtual machine, when the time slice value 13 allocated to this virtual machine is used up even though the real processor is taken away from this virtual machine, that is, When the time slice timer 7, which was set when this virtual machine was assigned a real processor, generates the time slice expiry signal 71, or when a virtual machine with a higher priority than this virtual machine becomes executable. This will be limited to cases where the child has grown old.

The embodiments of the present invention have been described above, but as is clear from the above description, the gist of the present invention is to determine a virtual machine to be assigned to a real processor in a virtual computer system that implements a plurality of virtual machines, Based on this determination, a virtual machine switching control means for switching virtual machines; and when a specified time has elapsed since the virtual machine was assigned a real processor, a virtual machine switching signal is generated to the virtual machine switching control means. A time slice timer, a process switching control means that detects an idle state in a virtual machine running on a real processor, and a process switching control means that stores state information of each virtual machine and save information as a processor state, and performs operations when an idle state is detected. A virtual machine control table that stores instruction information for specifying the
The instruction information on the virtual machine control table corresponding to the virtual machine to which a real processor is assigned is referred to, and according to the contents, if the instruction information specifies switching, the virtual machine switching control is performed. By starting the mechanism, the real processor is switched to another virtual machine, and if the instruction information specifies to continue, the real processor is not switched to the other virtual machine, and the above To realize a virtual machine switching control method that reduces the overhead of virtual machine switching and improves the efficiency of using a real processor by switching virtual machines using a time slice expiration signal generated by a time slice timer as a trigger. Regarding the specific implementation method of each method,
Although not directly related to the gist of the present invention, it has been omitted for the sake of brevity, but it will be obvious to those skilled in the art that it can be implemented in various ways.

The virtual machine control method of the present invention stores instruction information in a virtual machine control table, so that even if an idle state is detected, if the instruction information instructs to continue, the virtual machine will not be switched. As a result, the number of times virtual machines are switched can be reduced, which has the effect of reducing overhead and improving the efficiency of using real processors.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Virtual machine control table, 2... Virtual machine switching control mechanism, 3... Processor status register, 4... Process switching control mechanism, 5... Virtual machine identification number register, 6... AND gate, 7
...Time slice timer, 11...Instruction information,
12...Status information, 13...Time slice value,
14... Evacuation information, 41... Idle detection signal,
61...Virtual computer switching signal, 71...Time slice expiry signal, 72...Time slice value setting signal.

Claims (1)

[Claims] 1. A virtual machine control table that stores time slice values and instruction information for switching or continuing for each virtual machine, and a process that detects the idle state of the virtual machine running on a real processor and outputs an idle detection signal. a switching control mechanism; a time slice timer that outputs a time slice expiration signal after a specified time indicated by the corresponding time slice value has elapsed since the virtual computer was assigned the real processor; and the idle detection signal is supplied. a virtual machine switching control mechanism for determining and switching a virtual machine to be assigned to the real processor when the corresponding instruction information instructs switching when the time slice expiration signal is supplied; A virtual computer control method characterized by comprising: