JPH05322983A - Connection board for test device of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a connection board for testing capable of using commonly to semiconductor devices with the same packages and different pin arrangement by forming signal lines with relatively large number of pins and contact terminals for signals on the common board side and a power source lines with relatively small number and connection terminals for the power source on a special board side. CONSTITUTION:A connection board for testing is separated into a common board 1 and a special base plate 2 and all the external terminals 7, 8, 9 of a tested semiconductor device 6 is connected to contact terminals 3, 4, 5 and capable of connecting to the signal lines of the common board 1. The contact terminal 3 is connected to the power source line of the special board 2 and is connected to a specific external terminal 7 of the tested semiconductor device 6 by way of the common board 1. The cable electrical connection is cut from the test device 10 on the common board 1 connecting to the contact terminal 3. By forming signal lines with relatively large number of pins and contact terminals for signals on the common board 1 side and a power source lines with relatively small number and connection terminals for the power source on a special base plate 2 side, the common board 1 can be used in any kinds of semiconductor device and the change in the kind of signal pin signal is easily tread by changing the program in the test device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a test connection board for connecting a test device for a semiconductor device having a large number of external terminals such as an integrated circuit device and an external terminal of a semiconductor device under test.

[0002]

2. Description of the Related Art In a semiconductor integrated circuit device, in many cases, an integrated circuit board is hermetically packaged with resin, ceramic, metal or the like, and terminals connected to an internal board are exposed to the outside of the package. The pins are connected to external circuits and wiring on the printed circuit board.

In recent years, the types of semiconductor devices have been diversified with the development thereof, and the semiconductor integrated circuit devices have diversified outer dimensions and packages, and the number of external connection terminals of one semiconductor integrated circuit device has increased. At the same time, various integrated circuit devices with different pin arrangements have appeared in the same package.

A semiconductor device undergoes a product inspection in the process of manufacturing a product. A test device for various electrical characteristics of a semiconductor device is connected to a semiconductor device under test via a test substrate that fixedly connects the semiconductor device under test.

On the test substrate, signal lines for supplying and extracting signals from the test device to the semiconductor device under test and power supply lines for supplying power supply voltage are formed in a multi-layered structure composed of, for example, a dozen layers. The signal lines and the power supply lines are connected to the contact terminals that are compatible with the pin arrangement of the semiconductor device under test. The type of test signal can be easily output to any pin by changing the program inside the test apparatus.

An example of a recent semiconductor device has an external terminal of about 500 pins, of which about 50 power pins and the rest are signal pins. Some power supply lines connected from the test apparatus to the semiconductor device under test require three to four types of power supply lines including a ground line. There are various types of semiconductor devices at present, and the number of pins is also various, but there are many types having different pin arrangements in the same package.

[0007]

Conventionally, a test substrate for connecting such a test device and a semiconductor device under test is individually dedicated so as to suit the pin arrangement of the semiconductor device for each type of the semiconductor device under test. Board was designed and developed and manufactured. Therefore, a test substrate manufactured for one type of semiconductor device cannot be used for testing another type of semiconductor device.

Since such a test board is for testing, it is necessary to accurately align the wiring impedances of a huge number of signal lines connected to each pin, and to prevent noise from being caused by the plurality of lines. It is necessary to make full use of such sophisticated wiring technology, and the design and development cost is such an amount that the cost of the semiconductor device is considerably affected. In addition, the fact that a test substrate has to be individually developed and designed for each type of semiconductor device greatly affects the price of the entire semiconductor device.

If the test substrates of such a semiconductor device can be used in common for any type of semiconductor device regardless of the layout if the test substrate is in the same package, the burden on the price of the semiconductor device will be greatly reduced. Would be inferred.

An object of the present invention is a test connection board for electrically connecting a semiconductor device test apparatus and a semiconductor device under test, which is commonly used for semiconductor devices having different pin arrangements in the same package. It is to provide a possible test connection board.

[0011]

A test connection board according to the present invention is a test connection board for electrically connecting a test device for a semiconductor device and a semiconductor device under test. A common signal substrate that can be electrically connected to a signal terminal and has a signal line connectable to an external terminal of the semiconductor device under test; and an electric connection to a power supply terminal of the test device, wherein A dedicated power supply board having a power supply line connectable to a predetermined external terminal of the semiconductor device under test,
Connection means for connecting a corresponding one of the signal lines to a signal terminal of the semiconductor device under test and connecting the power supply line to a power supply terminal of the semiconductor device under test.

[0012] Preferably, the connection means defines a common contact terminal for connecting all of the signal lines of the common signal board to all external terminals of the semiconductor device under test, and the power supply line of the dedicated power supply board. A dedicated contact terminal for connecting to the common contact terminal, the dedicated contact terminal is connected to the predetermined external terminal of the semiconductor device under test via the common contact terminal, and is electrically connected to the dedicated contact terminal. The common contact terminal is electrically disconnected from the test device via the signal line.

The principle of the present invention will be described in detail with reference to FIGS. FIG. 1 is a side view showing the concept of a test connection board according to the present invention. FIG. 2 is a plan view of an example of a wiring pattern on the signal board of FIG.

In FIG. 1, a common substrate 1 on which signal lines (not shown) are formed and a dedicated substrate 2 on which power lines are formed.
And the contact terminals 3, 4, which pass through through holes provided on the substrate.
5, the contact terminals 3, 4, 5 are in contact with the external terminals 7, 8, 9 of the semiconductor device under test 6 at their one ends. For simplification, the semiconductor device under test 5 has three external terminals, the inner terminal 7 is a power supply terminal, and the other terminals 8 and 9 are signal terminals.

A test signal is supplied to the signal line of the common substrate 1 from a semiconductor device testing apparatus 10 through a signal line 11. A power supply voltage is supplied to the power supply line of the dedicated substrate 2 from the power supply inside the test apparatus 10 through the power supply line 12.

The contact terminals 3, 4, 5 passing through the common substrate 1 are connected to all the external terminals 7, 8, 9 of the semiconductor device under test 6, and the signal lines formed on the common substrate 1 are all the contact terminals 7, 8. 8 and 9 can be electrically connected.

Further, the contact terminals 3, which pass through the dedicated substrate 2,
Among the four and five, only the contact terminal 3 is connected to the power supply line (not shown) as indicated by the circle on the dedicated substrate 2, and the power supply of the semiconductor device 6 under test is connected via the contact terminal 3. A voltage is supplied to the terminal 7. Further, the contact terminals 4 and 5 passing through the dedicated substrate 2 are either electrically disconnected or not connected from the beginning at the portions indicated by X in the figure.

Further, the contact terminals 3, 4 passing through the common substrate 1
Of the 5, the contact terminal 3 to which a power supply voltage is applied is disconnected from the signal line at the portion marked with X in the figure. The contact terminals 4, 5 and the signal line are connected at the circled portions in the figure.

In FIG. 2, the common substrate 1 and the contact terminals 3, 4, 5 are shown.
An example of connection (circle) or non-connection (x) with is shown.
Through holes 14 and 15 are provided in a part of the signal line 13 formed on the common substrate 1 in FIG. 2 at a position corresponding to the external terminal position of the semiconductor device under test 6.

Although the same number of through-holes as the number of external terminals of the semiconductor device to be measured are provided, only two through-holes are shown in FIG. 2 for simplicity. An annular electrode portion 16 protruding from the signal line 13 and a thin bridge portion 17 connecting the signal line 13 and the annular portion 16 are formed of the same conductive material around the through hole 14.

Around the other through hole 15, an annular portion 18 made of a conductive material as shown in the figure, a bridge portion 19 connecting the annular portion 18 and the signal line 13 and an insulating portion 20 around the annular portion 18 are provided. Are formed.

By passing the contact terminals 3, 4 or 5 of a conductive material through the respective through holes 14 and 15, an electrical connection between the annular portions 16 and 18 and the contact terminals 3, 4 or 5 is formed, and the signal line 13 is formed. And the contact terminals 3, 4 or 5 are electrically connected (circled in FIG. 1).

Further, if the bridge portion 17 or 19 is cut at the position shown by the arrow in the figure, the electrical connection between the signal line 13 and the contact terminals 3, 4 or 5 is cut (X in FIG. 1).
(Mark)

[0024]

The test connection board of the present invention is divided into the common board 1 and the dedicated board 2, and all the external terminals 7, 8, 9 of the semiconductor device under test 6 are connected to the contact terminals 3, 4, 5. Therefore, it can be connected to the signal line of the common substrate 1.

Taking the configuration of FIG. 1 as an example, the contact terminals 3 are connected to the power supply line of the dedicated substrate, and the common substrate 1
And is connected to a specific external terminal 7 of the semiconductor device 6 under test. The wiring on the common substrate that is electrically connected to the contact terminal 3 is electrically disconnected from the test apparatus 10.

Therefore, by forming the signal lines and the signal contact terminals having a relatively large number of pins on the common substrate side and the power supply lines and the power contact terminals having a relatively small number on the dedicated substrate side, the common substrate can be formed. It can be commonly used for any type of semiconductor device. The change of the signal type of the signal pin can be easily dealt with by changing the program of the test device.

The common contact terminal, which is in contact with the contact terminal to which the power is supplied, is disconnected from the test device on the common substrate, so that the signal line and the power line do not come into contact with each other.

[0028]

Embodiments of the test connecting board of the semiconductor integrated circuit device according to the present invention will be described below with reference to FIGS.

FIG. 3 is a side view of the test connecting board according to the first embodiment of the present invention. In FIG. 3, a test apparatus 30, a signal board 31, a power board 32, and a semiconductor device 3 under test 3
6 are separated from each other for convenience of explanation.

On the signal board 31, which is a common board, contact terminals 31a and 31 are connected to signal lines (not shown), respectively.
31f ... 31f are formed at positions corresponding to the external pins 36a, 36b, 36c ... 36f of the semiconductor device 36 under test.

Further, the power supply board 32, which is a dedicated board, is provided with contact terminals 32 for connecting to respective power supply lines (not shown).
b, 32d and 32e are formed at positions corresponding to the power supply pins 36b, 36d and 36e of the semiconductor device 36 to be tested.
The contact terminals 32b, 32d, 32e are the contact terminals 31b, 3
It is connected to the power supply pin of the semiconductor device under test 36 via 1d and 31e.

Further, the contact terminals 31b of the signal board 31,
The electrical connections of the signal lines 31d and 31e are cut off from the signal lines (not shown) by the method shown in FIG. In addition, signal line terminals 34 and 35 are formed at the end of the signal board 31, and power line terminals 37 and 35 are formed at the end of the power supply board 32.
38 is formed. The test apparatus 30 is provided with a signal supply terminal 30s connected to the signal line terminal and a power supply terminal 30v connected to the power line terminal.

When the signal board 31, the power supply board 32, the semiconductor device under test 36 and the test device 30 are brought close to each other and brought into contact with each other at their terminals in the above state, the power supply pins 36b and 36d of the semiconductor device under test 36 are contacted. , 36e are supplied with power via the power supply board 32, and the signal pins 36a, 36e
A signal is supplied to c and 36f through the signal board 31.

The signal board 31 can be compatible with a semiconductor device having another power supply pin arrangement by replacing the power supply board 32 in common. The change of the signal type of the signal pin can be easily dealt with by changing the program of the test device without changing the signal board. The disconnection of the signal line on the signal board 31 is changed as necessary.

Next, a test connecting board according to a second embodiment of the present invention will be described with reference to the side view of FIG. In FIG. 4, the signal board 41, the first power supply board 42, the second power supply board 43, and the semiconductor device under test 46 are connected by bar-shaped contact terminals 45a, 45b, ...

The contact terminals 45a to 45f pass through through holes provided in each substrate. In FIG. 4, thick black lines at the intersections of the respective boards and the contact terminals 45a, 45b, ..., 45f indicate electrical connection by soldering or the like between the signal lines or power supply lines of the respective boards and the contact terminals. Other intersections not shown represent electrical non-contact.

45f on the signal board 41 which is a common board, the contact terminals 45a, 45b, 45c ... 45f are external pins 46a, 46b, 46c of the semiconductor device 46 under test.
... Heads to the position corresponding to 46f.

The signal lines on the signal substrate 41 are connected to the signal line pads 49 and 50 formed at the ends. At the end of the signal board 41, a power line pad 47,
48 are also formed, and as shown in the drawing, the first power supply board 42 and the second power supply board 43 and the lead wires 51,
Connected at 52.

Therefore, the contact terminals 45b and 45e are connected to the power line pad 48. In addition, the contact terminal 45c,
45d is connected to the power supply line pad 47. Further, signal line pads 49 and 50 connected to the contact terminals 45a and 45f are also formed at the end portions of the signal substrate 41.

The test apparatus 40 is provided with a signal supply terminal 40s that engages with the signal pads 49 and 50 and a power supply terminal 40v that engages with the power supply line pads 47 and 48.

When the signal board 41, the first and second power supply boards 42 and 43, the semiconductor device under test 46, and the test apparatus 40 are brought close to each other in the above state to bring the terminals into contact with the pads and terminals, Power is supplied to the power supply pins 46b, 46c, 46d, 46e of the semiconductor device under test 46, and signals are supplied to the signal pins 46a, 46f.

The signal board 41 is commonly used as a power board 42,
By replacing 43, it is possible to deal with a semiconductor device having another power pin arrangement. The change of the signal type of the signal pin can be easily dealt with by changing the program of the test device without changing the signal board. Moreover, the connection between the contact terminal and the substrate is changed as necessary.

The connection between the contact terminal and the basic line is made by insertion contact as shown in FIG. 2, pressing contact as shown in FIG. 3, or soldering as shown in FIG. It may be performed or another format may be adopted. The dedicated substrate and the semiconductor device under test may be connected indirectly as shown in FIG. 3 or directly as shown in FIG.

Although the embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and various modifications and applications can be considered by those skilled in the art from the disclosure of the embodiments.

[0045]

As described above, the test board is divided into the common board and the dedicated board, and the signal lines and the signal contact terminals having a relatively large number of pins are formed on the common board side. By arranging the power supply line and the power supply contact terminal on the dedicated board side, the common board can be commonly used for semiconductor devices having any power supply pin arrangement.

The change of the signal type of the signal pin can be easily dealt with by changing the program of the test apparatus. In addition,
The common contact terminal, which is in contact with the dedicated contact terminal to which power is supplied, is electrically disconnected from the test apparatus, so that the signal line and the power supply line do not come into contact with each other. Therefore, the design and development cost of the test connection board can be reduced, and the mass production cost of the semiconductor device can be reduced.

[Brief description of drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is a diagram for explaining a method of connecting and disconnecting the contact terminal and the signal line in FIG.

FIG. 3 is a side view of the test connecting board according to the first embodiment of the present invention.

FIG. 4 is a side view of a test connecting board according to a second embodiment of the present invention.

[Explanation of symbols]

1-common substrate 2-dedicated substrate 3,4,5-contact terminal 6-semiconductor device 7,8,9-external terminal 10,30,40- ..Test equipment 13 .... Signal lines 14,15 ... Through holes 31,41 ... Signal boards 32,42,43 ... Power supply boards 31a, 31b, 31c, 31d, 31e, 31f・ ・
・ Contact terminals 32b, 32d, 32e ... Contact terminals 36a, 36b, 36c, 36d, 36e, 36f ...
・ External terminals 45a, 45b, 45c, 45d, 45e, 45f ...
・ Contact terminals

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tokuyuki Goto 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited (72) Inventor Toru Ozawa 1015, Kamedotachu, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited

Claims (4)

[Claims] 1. A test connection board for electrically connecting a semiconductor device test device (10) and a semiconductor device under test (6), wherein the test device (10) is electrically connected to a signal terminal of the test device (10). External connection (7, 7) of the semiconductor device under test (6)
A common signal board (1) having a signal line connectable to the semiconductor device (6), which is electrically connectable to the power supply terminal of the test device (10). A dedicated power supply board (2) having a power supply line connectable to an external terminal (7) and a signal terminal of the semiconductor device under test corresponding to the signal line are connected to the power supply terminal of the semiconductor device under test. A test connection board having connection means (3, 4, 5) for connecting the power supply lines. 2. The common signal board (1) for the connection means.
Common contact terminals (3, 4, 5) for connecting all of the signal lines of to all external terminals of the semiconductor device under test
And a dedicated contact terminal (3) for connecting the power supply line of the dedicated power supply board (2) to a predetermined common contact terminal, the dedicated contact terminal (3) including the common contact terminal (3). The common contact terminal, which is connected to the predetermined external terminal (7) of the semiconductor device under test (6) via the signal line and is electrically connected to the dedicated contact terminal through the signal line with the test apparatus (10). The test connection board according to claim 1, wherein the physical connection is broken. 3. The connection means has connection terminals penetrating the common signal board (1) and the dedicated power supply board (2) and connectable to all external terminals of the semiconductor device under test,
The test connection board according to claim 1, which is selectively connected to the signal line in the common signal board (1) and the power supply line in the dedicated power supply board (2). 4. The test connection according to claim 1, wherein the dedicated power supply board (2) can be electrically connected to a power supply terminal of the test apparatus (10) through the common signal board (1). substrate.