JPH053179B2 - - Google Patents
Info
- Publication number
- JPH053179B2 JPH053179B2 JP58185551A JP18555183A JPH053179B2 JP H053179 B2 JPH053179 B2 JP H053179B2 JP 58185551 A JP58185551 A JP 58185551A JP 18555183 A JP18555183 A JP 18555183A JP H053179 B2 JPH053179 B2 JP H053179B2
- Authority
- JP
- Japan
- Prior art keywords
- processor
- packet
- control
- slave
- system bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000872 buffer Substances 0.000 claims description 24
- 230000005540 biological transmission Effects 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 5
- 239000006185 dispersion Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
- G06F13/128—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine for dedicated transfers to a network
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Information Transfer Systems (AREA)
- Small-Scale Networks (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18555183A JPS6076839A (ja) | 1983-10-04 | 1983-10-04 | プロセツサ制御方式 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18555183A JPS6076839A (ja) | 1983-10-04 | 1983-10-04 | プロセツサ制御方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6076839A JPS6076839A (ja) | 1985-05-01 |
JPH053179B2 true JPH053179B2 (ko) | 1993-01-14 |
Family
ID=16172785
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18555183A Granted JPS6076839A (ja) | 1983-10-04 | 1983-10-04 | プロセツサ制御方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6076839A (ko) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2855326B2 (ja) * | 1987-04-09 | 1999-02-10 | 東洋通信機株式会社 | コンピユータ・システム |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS575141A (en) * | 1980-06-10 | 1982-01-11 | Toshiba Corp | Bus control system |
-
1983
- 1983-10-04 JP JP18555183A patent/JPS6076839A/ja active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS575141A (en) * | 1980-06-10 | 1982-01-11 | Toshiba Corp | Bus control system |
Also Published As
Publication number | Publication date |
---|---|
JPS6076839A (ja) | 1985-05-01 |
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