JPH05316445A - Screen display device - Google Patents

Abstract

PURPOSE:To respectively and individually set the horizontal display starting position of the respective lines of a display screen by data indicated by CPU. CONSTITUTION:Each line of the display is provided with a comparator 13 comparing data of horizontal registers 11 (1) to 11 (3) corresponding to each line and the counter value of a counter 12 counting a display clock 5. When both of them are coincident in the comparator 13, an image signal output circuit 7 starts character display in a horizontal direction. Thus, the display starting point in a horizontal direction can individually be set by each line, the degree of the freedom of screen display can be improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television screen display device, and more particularly to a screen display device for controlling a display position of image data such as a character font on a display screen.

[0002]

2. Description of the Related Art FIG. 6 is a block diagram showing a configuration of a conventional screen display device, which is configured to display 1 to 3 lines on one screen. In FIG. 6, 1 is a CPU (central processing unit), 2 is a data bus, 3 is a display control circuit for controlling the vertical timing of character font output according to a horizontal synchronizing signal and a vertical synchronizing signal, and 4 is a data bus 2. Through CP
A register (1), a register (2), a register (3), in which data indicating the vertical display start position of each row written from U1 is stored, 5 is a display clock, and 6 is a character based on the display clock 5. Timing generator for generating horizontal timing of font output, 7 is a ROM (read-only memory) for a character font (not shown)
And an image signal output circuit 8 including a horizontal synchronizing signal (hereinafter referred to as H
(Abbreviated as SYNC).

Reference numeral 9 is a vertical synchronization signal (hereinafter abbreviated as VSYNC), 10 is an RGB output, and 11 is a data bus 2.
A horizontal register that stores the horizontal display start position written from the CPU 1 via the, a counter 12 that counts the display clock, and a comparator 13 that compares the values of the horizontal register 11 and the counter 12. Next, the operation of the conventional example will be described. The CPU 1 receives the data indicating the vertical display start position of each row and the data indicating the horizontal display start position to be displayed on the display screen via the data bus 2 from the registers 4 (1) to 4 (3) of the display control circuit 3. And to the horizontal register 11. The display control circuit 3 is reset by VSYNC9, and counts HSYNC8 to output a signal for activating the image signal output circuit 7 when, for example, the register value of the register 4 (1) and the count value match. In addition, the counter 12 is HSYNC.
It is reset by 8, counts the display clock 5, and gives the count value to the comparator 13. Comparator 13
Compares the data stored in the horizontal register 11 with the count value of the counter 12, and outputs a signal to the timing generator 6 when the two match.
Activate. At this time, the timing generator 6
An output timing signal for controlling the horizontal timing is output to the image signal output circuit 7. Image signal output circuit 7
Corresponds to a character font from each RGB output 10 according to an activation signal output from the display control circuit 3, that is, a signal controlling the vertical direction and an output timing signal controlling the horizontal direction output from the timing generator 6. Output the serial data. These series of operations are
When the count value of the HSYNC 8 in the display control circuit 3 and the register 4 (2) and the register 4 (3) match, the same operation is performed, and a character string of three lines having the same horizontal display start position is displayed on the screen. ..

[0004]

Since the conventional screen display device is configured as described above, the means (horizontal register 11) for determining the horizontal display start position for each row of the display screen is common to each row. However, there is a problem that the horizontal display start position of each line cannot be set to a different display position.

The present invention has been made to solve the above problems, and a screen display device capable of independently setting the horizontal display start position of each row to a position designated by the CPU independently. The purpose is to provide.

[0006]

In the screen display device according to the first aspect of the present invention, as shown in FIG. 1, data of a certain horizontal display start position of the display screen and the count value of the display clock, which are instructed by the CPU. Are compared by the comparator 13, and when they match each other, image data such as a character font is output from the horizontal display start position of a predetermined line on the display screen in accordance with an output timing signal obtained from the comparator to a predetermined line of the same line. In a screen display device for displaying at a position, storage means (horizontal register 11 (1) to horizontal register 11 (1) to
11 (3)) and a selection means (selection circuit 15) for sequentially selecting a plurality of data at the horizontal display start position for each row and outputting the selected data to the comparator.

In the screen display device according to the second invention,
As shown in FIG. 4, the comparator 13 compares the data of a certain horizontal display start position of the display screen designated by the CPU with the count value of the display clock, and when the two match, the data is obtained from this comparator. In a screen display device that displays image data such as a character font from a horizontal display start position of a predetermined line on a display screen to a predetermined position of the same line in accordance with an output timing signal, an interrupt means (interrupt signal) A generation circuit 34) is provided, and when the image data is displayed at a predetermined position on the display screen, the interrupt means C
When the PU is interrupted, the CPU outputs the data different from the previous horizontal display start position data to the comparator after confirming the end of the display.

[0008]

In the screen display device according to the first aspect of the present invention, when the horizontal display start position of the display screen is changed, the CPU first stores the data of the horizontal display start position of each row in the storage means. The data indicating the horizontal display start position stored in the storage means is sequentially selected for each row displayed on the display screen and output to the comparator. The comparator compares the data at the horizontal display start position with the count value of the display clock, and outputs an output timing signal when they match. Based on this output timing signal, image data such as a character font is displayed from a horizontal display start position of a predetermined line on the display screen to a predetermined display position of the same line. As described above, the horizontal display start position has been constant in the past, but in the present invention, the horizontal display start position can be freely changed for each row, so that the screen display can be freely performed.

In the screen display device according to the second invention,
When changing the horizontal display start position, the CPU
After confirming the previous display, this CPU outputs the current horizontal display start position data to the comparator to change the horizontal display start position.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows an embodiment (embodiment 1) of the first invention.
3 is a block diagram of a screen display device showing FIG. In FIG. 1, 1 is a CPU (central processing unit), 2 is a data bus, 3
Is a display control circuit, 4 is a register (1), a register (2), a register (3), 5 is a display clock, 6 is a timing generator, 7 is an image signal output circuit, and 8 is H.
SYNC, 9 is VSYNC, 10 is RGB output, 11 is horizontal registers 11 (1) to 11 as storage means for storing data indicating the horizontal display start position of each row.
(3), 12 is a counter, 13 is a comparator, 14 is a display row instruction circuit that indicates which row of the registers 4 (1) to 4 (3) the row being displayed corresponds to, and 15 is a comparator 13. The selection circuit is a selection unit that selects one input data from the horizontal registers 11 (1) to 11 (3). In addition,
The parts having the same functions as those of the conventional screen display device (FIG. 6) are designated by the same reference numerals, and the following description will be omitted.

FIG. 2 is a detailed circuit diagram of the display row designating circuit of the apparatus of FIG. In FIG. 2, 23 is VSYNC
A counter that is reset at 9, counts HSYNC8, and outputs an 8-bit count value; 25 is an 8-bit register (1) to store the vertical start position of each display row;
(3) and 26 are comparators that compare the output value of the HSYNC counter 23 with the register values of the registers 25 (1) to 25 (3), and generate a one-shot pulse when the two values match, and 27 is The OR gate, 24 is reset by the output of the OR gate 27, and after counting 10 HSYNC8, a VSYNC counter that generates an overflow one-shot pulse, 28 is a comparator 26 (1) -2
The set / reset flip-flops BL1 to BL3, which are set by the output of 6 (3) and reset by the output of the VSYNC counter 4, are the display row instruction signals a and INT.
Is an interrupt signal to the CPU 1. The timing chart of FIG. 3 shows the signals of the respective parts of FIG.
In FIG. 3, (A) is VSYNC9 and (B) is HSY.
NC8, (C) to (D) are signals b to d, (F) is INT.
Signals (G) to (I) are signals of BL1 to BL3.

Next, the operation of the first embodiment will be described. The CPU 1 writes the data indicating the horizontal display start position of each row of the display screen to the horizontal register 11 (1), the horizontal register 11 (2), and the horizontal register 11 (3) via the data bus 2. The display line instruction circuit 14 determines which of the register 4 (1), the register 4 (2), and the register 4 (3) has started the display. The signal shown is applied to the horizontal register selection circuit 15 as the display row instruction signal a during the period in which each row is displayed. The horizontal register selection circuit 15 determines each horizontal register 11 according to the contents of the display row instruction signal a.
The corresponding row (row where display is started) horizontal register is selected from (1) to 11 (3), and the register value of the horizontal register is given to the comparator 13. The comparator 13 is the counter 1
When the count value of 2 and the selected horizontal register value match, the timing generator 6 outputs a signal instructing activation.
Give to. Then, the timing generator 6 outputs an output timing signal of the horizontal display start position to the image signal output circuit 7, and the image signal output circuit 7 uses the output timing signal from the horizontal display start position to a predetermined display position on the same line to display a character font or the like. The image data of is displayed. In the above operation, the operation when the display row instruction signal a is output from the display row instruction circuit 14 is performed according to the timing chart of FIG. In the circuit of FIG. 3, the width of each row is 10 HS.
It is composed of YNC width, register 25 (1) = 10, register 25 (2) = 25, register 25 (3) = 4.
It is assumed that 0 is stored in advance by the CPU.

FIG. 4 is a block diagram of a screen display device according to an embodiment (embodiment 2) of the second invention. In FIG. 4, reference numeral 34 is an interrupt signal generation circuit that gives an interrupt signal to the CPU 1 when the display of each row is completed. The interrupt signal generation circuit 34 is, for example, from the display row instruction circuit 14 of FIG. 2 to the set / reset flip-flop circuit 28.
It can be realized by a circuit excluding (1) to 28 (3). Data indicating the horizontal display start position of the line (first line) to be displayed at the uppermost position of the display screen is written from the CPU 1 to the horizontal register 11 via the data bus 2. Then, when the display of the first row is completed by the same operation as described in the conventional example, the interrupt signal generation circuit 34 interrupts the CPU 1. The CPU 1 confirms by the interrupt routine program that the display on the first line is completed, and the horizontal register 1
The contents of 1 (data at the horizontal display start position) are rewritten to the horizontal display start data displayed on the second line and corresponding to the line.
By this processing, the horizontal display start position of the second line becomes a position different from that of the first line. Similarly, when the display of the second line is completed, the horizontal register 1
1 is updated to the data corresponding to the third row. C above
By interrupting the PU with software, the horizontal display start position of each row can be freely set independently for each row.

FIG. 5 is a block diagram showing an application example of the first and second inventions. In FIG. 5, 16 is the output of the horizontal register selection circuit 15 and the horizontal registers 11 (1) to 11
A second selection circuit for selecting the output of (3) and giving it to the comparator 13 is a selection register 17 for controlling the second selection circuit 16. By adding the selection register 17, the selection register 17 is connected to the CP via the data bus 2.
By rewriting with U1, each row of the display screen described in the first embodiment is designated by a horizontal register, and a mode in which the row is set as the horizontal display start position of the same row can be selected according to the purpose.

[0015]

As described above, according to the first aspect of the present invention, since the horizontal display start position of each line of the display screen can be independently set by the CPU, the degree of freedom of screen display can be improved. There is an effect that an easy-to-use screen display device can be obtained.

According to the second aspect of the present invention, the horizontal display start position of each line of the display screen can be set by interrupting the CPU. Therefore, in addition to the effect of the first aspect of the invention, This can be realized without using hardware such as registers and set / reset flip-flops, and has the effect of reducing the number of circuit components.

[Brief description of drawings]

FIG. 1 is a block diagram of a screen display device showing an embodiment of the first invention.

FIG. 2 is a circuit diagram of a display row instruction circuit of the device of FIG.

FIG. 3 is a timing chart showing the operation of each unit in FIG.

FIG. 4 is a block diagram of a screen display device showing an embodiment of the second invention.

FIG. 5 is a block diagram of a screen display device showing an application example of the present invention.

FIG. 6 is a block diagram showing an example of a conventional screen display device.

[Explanation of symbols]

 1 CPU 2 data bus 3 display control circuit 5 display clock 6 timing generator 7 image signal output circuit 8 HSYNC (horizontal synchronizing signal) 9 VSYNC (vertical synchronizing signal) 11 horizontal register 12 counter 13 comparator 14 display row instruction circuit 15 selection Circuit 34 Interrupt signal generation circuit

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[Procedure amendment]

[Submission date] October 2, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0011

[Correction method] Change

[Correction content]

FIG. 2 is a detailed circuit diagram of the display row designating circuit of the apparatus of FIG. In FIG. 2, 23 is VSYNC
A counter that is reset at 9, counts HSYNC8, and outputs an 8-bit count value; 25 is an 8-bit register (1) to store the vertical start position of each display row;
(3) and 26 are comparators that compare the output value of the HSYNC counter 23 with the register values of the registers 25 (1) to 25 (3), and generate a one-shot pulse when the two values match, and 27 is OR gate, 24 is reset by the output of OR gate 27, after 10 counts HSYNC8, Luke counter, 28 is a comparator 26 (1) -26 (3) to generate <br/> a one-shot pulse of the overflow Set / reset flip-flops which are set by the output of VSYNC counter 24 and are reset by the output of VSYNC counter 24 , BL1 to BL3 are display row instruction signals a, and INT is CP.
It is an interrupt signal for U1. The timing chart of FIG. 3 shows the signals of the respective parts of FIG. In FIG. 3, (A) is VSYNC9 and (B) is HSYNC.
8, (C) to (D) are signals b to d, (F) is an INT signal, and (G) to (I) are signals of BL1 to BL3.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0013

[Correction method] Change

[Correction content]

FIG. 4 is a block diagram of a screen display device according to an embodiment (embodiment 2) of the second invention. In FIG. 4, reference numeral 34 is an interrupt signal generation circuit that gives an interrupt signal to the CPU 1 when the display of each row is completed. The interrupt signal generation circuit 34 is, for example, from the display row instruction circuit 14 of FIG. 2 to the set / reset flip-flop circuit 28.
It can be realized by a circuit excluding (1) to 28 (3). Data indicating the horizontal display start position of the line (first line) to be displayed at the uppermost position of the display screen is written from the CPU 1 to the horizontal register 11 via the data bus 2. Then, when the display of the first row is completed by the same operation as described in the conventional example, the interrupt signal generation circuit 34 interrupts the CPU 1. The CPU 1 confirms by the interrupt routine program that the display on the first line is completed, and the horizontal register 1
The contents of 1 (data at the horizontal display start position) are rewritten to the horizontal display start data displayed on the second line and corresponding to the line.
By this processing, the horizontal display start position of the second line becomes a position different from that of the first line. Similarly, when the display of the second line is completed, the horizontal register 1
1 is updated to the data corresponding to the third row. C above
Generates an interrupt to the PU and follows the timing
By performing the software processing, it becomes possible to freely set the horizontal display start position of each row independently for each row.

[Procedure 3]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 2

[Correction method] Change

[Correction content]

[Fig. 2]

Claims (2)

[Claims] 1. A comparator compares the data of a certain horizontal display start position on the display screen designated by the CPU with the count value of the display clock, and when both match, an output timing signal obtained from this comparator. In a screen display device for displaying image data such as character fonts from a horizontal display start position of a predetermined line on a display screen to a predetermined position of the same line, a different horizontal display start position for each line of the display screen instructed by the CPU. And a selection means for sequentially selecting the plurality of data at the horizontal display start position for each row and outputting the data to the comparator. 2. A comparator compares the data of a fixed horizontal display start position on the display screen designated by the CPU with the count value of the display clock, and when both match, an output timing signal obtained from this comparator. According to the above, in a screen display device for displaying image data such as a character font from a horizontal display start position of a predetermined line on a display screen to a predetermined position of the same line, an interrupt means for interrupting the CPU is provided,
When the CPU interrupts the interrupt means when displaying image data at a predetermined position on the display screen, the CP
A screen display device, wherein after U confirms the end of the display, data different from the previous horizontal display start position data is output to the comparator.