JPH0531336B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a data transmission device, and in particular, when a plurality of controllers share functions and construct one control system as a whole, each The present invention relates to a data transmission device that is coupled to a controller and exchanges data with each other.

[Prior Art] Recent large-scale control systems for steel plants, silk plants, water and sewage plants, etc. are often composed of a plurality of distributed controllers. In this case, in order to control a large-scale control system using multiple controllers, each controller must share the control operation status of other controllers as data and process the data. A data transmission device is used that is coupled to the network and exchanges data with each other.

As shown in FIG. 1, this type of data transmission device connects a plurality of controllers 1a, 1b, ... 1c to respective data transmission devices 3a, 3b, 3c via system buses 2a, 2b, 2c. ,1
A party line method is often used in which two-way data transmission is performed by connecting data one after another using a transmission cable 4.

This data transmission system using the party line method usually consists of one main station (master station) and multiple slave stations (remote stations). Data is exchanged between the two. In this case, the master station provides a station address to specify a particular remote station, and
This is done by transmitting a transmission/reception designation command to designate transmission or reception, and a memory address to designate the transmission/reception data.

[Problems to be Solved by the Invention] However, conventional data transmission devices are complicated and expensive, making it difficult to use them for general purposes. The present invention has been made in view of the above-mentioned problems, and its purpose is to provide all stations with a memory that shares the same data and a means for determining whether to transmit or receive depending on the address. To provide an inexpensive and highly economical data transmission device that allows a master station to send and receive data simply by transmitting a memory address.

[Means and operations for solving the problem] In order to achieve the above object, the present invention provides a common control system that is connected to each of a plurality of controllers, in order to make the plurality of controllers function as one control system as a whole. In data transmission devices that mutually exchange data via a serial transmission path, each data transmission device is equipped with a data shared memory, a data transmitting/receiving means, and a control means for controlling transmission. The transmission device is further provided with address sending means for transmitting an address specifying the address area of the data shared memory, and the data transmission device serving as a slave station is further provided with selection means for determining whether to transmit or receive own station data. The selection means further includes an address setting means for setting at least one address area in order to store the data transmitted by the own station in the data shared memory of another station, and the selection means further includes an address setting means for setting at least one address area in order to store the data transmitted by the own station in the data shared memory of other stations, When the address set in the means matches,
When the data of the own station's data shared memory is transmitted and the address does not match the address set in the address setting means, the data of the other station subsequently received is stored in the own station's data shared memory. It is something.

[Embodiment] FIG. 2 is a block diagram showing an embodiment of the data transmission device of the present invention.

This embodiment is an example used in a party line type data transmission system consisting of a plurality of remote stations 6 and one master station 5.

The master station 5 has a system bus 10.
An interface circuit 1 that sends and receives data signals and control signals to and from the controller of its own station via
1. A memory 12 that stores data from all stations and shares the data, an address register 13 that holds addresses to be sent to the transmission path, a control circuit 14 that controls the master station, and a parallel/serial conversion of transmitted and received data. The conversion check circuit 15 includes a conversion check circuit 15 that simultaneously generates or checks a check code for transmitted and received data, and a transmission/reception circuit 16 including a driver for data transmission and a receiver for data reception.

On the other hand, the remote station 6 has almost the same configuration as the master station 5, but has a selection circuit 23 that determines whether it is a transmitting station or a receiving station according to the address transmitted from the master station 5. We are prepared. That is, the remote station 6 includes an interface circuit 21 that connects to its own controller via a system bus 20, a memory 22 that shares data, a control circuit 24, a conversion check circuit 25, a transmission/reception circuit 26,
and the selection circuit 23 described above.

In the above configuration, the shared memory 12 of the master station 5 is read from or written to by the controller of the own station via the system bus 10 and the interface circuit 11. The address register 13 specifies the address of the shared memory 12 and sends the address to the transmission line via the conversion check circuit 15 and the transmission/reception circuit 16. Data is transmitted from a remote station designated as a transmitting station according to the transmitted address, and when the data is transmitted, it is stored in the shared memory 12. If access to the shared memory 12 is duplicated on the controller side and the transmission side, the control circuit 14 performs priority processing. The shared memory 12 is composed of parallel data because it directly interfaces with the controller, but in order to transmit serial data, a conversion check circuit 15 performs serial/parallel data conversion between the shared memory 12 and the transmitter/receiver circuit 16. conduct. In addition, the conversion check circuit 15 generates a check code such as a parity bit on the transmitting side and adds it to the data in order to check data conversion and transmission operations, and checks the validity of the data including the parity bit on the receiving side. perform the following actions.

As shown in FIG. 3, the selection circuit 23 of the remote station 6 includes a transmission/reception designation switch 31 for setting an address area in the shared memory for data to be transmitted by the remote station. Figure 3 shows an example in which the entire address area of the data shared memory is divided into eight parts, and the switch 31 is divided into eight parts.
It can be turned on and off, and when turned off, the logic level of the address area setting terminal of the discrimination circuit 34 is set to "1" by the pull-up resistor 32, and one divided address area divided into eight is set as the transmission data area. This transmission data area is set so that each remote station has a different address area that does not overlap. In this example,
The upper three bits including the MSB (most significant binary number) are used as address data for specifying the transmission data area.

The address transmitted from the master station 5 is stored in the address register 33 via the transmission/reception circuit 26, control circuit 24, and internal bus, and the contents of the upper 3 bits of this address register 33 are the transmission data set by the transmission/reception designation switch 31. When the area matches, the determination circuit 34 generates a transmission mode signal 35. As a result, the station is designated as a transmitting station, and the control circuit 24 reads its own data from the shared memory 22 at the address designated by the address register 33 and transmits it via the conversion check circuit 25 and the transmitting/receiving circuit 26.

In FIG. 3, since 0 and (7) of the switch 31 are set to OFF, transmission is performed when the contents of the upper 3 bits of the address register 33 are 000 or 111.

On the other hand, when the received address does not match the transmission data area set by the transmission/reception designation switch 31, the determination circuit 34 does not generate the transmission mode 35, so the mode is set to reception mode, and the data subsequently transmitted from the station whose other address matches is received by the transmitting/receiving circuit 26 and stored in the shared memory 22 according to the address specified by the address register 33 after data conversion.

Note that the remote station 6 consisting only of input/output devices omits the shared memory 22 and instead has a system bus 20 and an interface circuit 2.
Data can be directly exchanged via 1. That is, when receiving data transmitted from another station, the data converted by the transmission/reception circuit 26 and conversion check circuit 25 is directly output to the input/output device via the system bus 20. Further, when the own station is designated as a transmitting station, data is input directly from the input/output device via the system bus 20 and is transmitted by the conversion check circuit 25 and the transmitting/receiving circuit 26.

Each station receives this data and stores it in its own shared memory, allowing all stations to share their data. This allows multiple distributed controllers in large-scale control systems such as steel plants, paper plants, and water and sewage plants to know the status of their mutually related partners, and operate as a single control system as a whole. It becomes possible to do so.

In order to simplify the explanation, the master station has only explained the transmission of the address in the address register, but the master station also has a selection circuit and transmits its own data to all remote stations in the same way as the remote station. You can do it like this.

Further, although the transmission/reception designation switch 31 is shown as a contact switch for the sake of explanatory purposes, it can be similarly implemented even if it is set using a non-destructive read-only memory (ROM).

[Effects of the Invention] According to the present invention, data can be exchanged between all stations simply by the master station transmitting a memory address, so a low-cost and highly economical data transmission device can be obtained. , it is possible to easily construct a large-scale control system that has the functions of one control system as a whole by having a plurality of controllers each share the control operation status of all controllers as data.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram of a control system connected by a party line, FIG. 2 is an embodiment diagram in which the data transmission device of the present invention is applied to a master station and a remote station, and FIG. 3 is a detailed circuit diagram of the selection circuit 23. It is. 1a to 1c...controller, 2a to 2c...
System bus, 3a to 3c...data transmission device,
4...Transmission cable, 5...Master station, 6,7...Remote station, 10,2
0...System bus, 11,21...Interface circuit, 12,22...Shared memory, 13,
33... Address register, 14, 24... Control circuit, 15, 25... Conversion check circuit, 16,
26... Transmission/reception circuit, 23... Selection circuit, 31...
...Transmission/reception designation switch, 32...Pull-up resistor, 34...Discrimination circuit, 35...Transmission mode signal.

Claims (1)

[Claims] 1 In order for multiple controllers to function as one control system as a whole, in a data transmission device that is connected to each of multiple controllers and exchanges data with each other via a common serial transmission path, The device includes a data shared memory, a data transmitting/receiving means, and a control means for controlling transmission, and the main data transmitting device further includes an address sending means for transmitting an address specifying an address area of the data shared memory. The data transmission device serving as a slave station is further provided with a selection means for determining whether to transmit or receive data from the own station, and the selection means further includes a selection means for storing the data transmitted by the own station into the data shared memory of other stations. An address setting means for setting at least one address area for storage is provided, and when the address sent by the main station and the address set in the address setting means match, the data in the data shared memory of the own station is transmitted. A data transmission device characterized in that, when the address does not match the address set in the address setting means, data of another station subsequently received is stored in a data shared memory of the own station.