JPS61150429A - Data collecting and processing device - Google Patents

Abstract

PURPOSE:To attain a simple and inexpensive wiring work in case a signal generating part is remote or decentralized by providing a main body part serving as a master device and plural terminal parts as slave devices. CONSTITUTION:A device 100 serves as a main body part where data are collected and processed; while devices 200 and 300 serve as terminal parts containing interface circuits for input of process signals. Then the connection is possible among plural devices via transmission lines 80-82 like twist paired line, etc. and a crossover wiring. A general-purpose interface board 210, for example, serves a digital signal interface like a contact, etc. An external contact signal 211 is received by an interface part 212 and converted into a signal of an IC level. This signal is delivered to a data bus 201. A control circuit 213 controls the fetching order of the signals of the digital interface circuit 210 by the signal of a control bus 202.

Description

[Detailed description of the invention] [Usage meter for sedentary work] This invention is a data collection process that collects process input signals such as pulse signals, contact signals, and analog signals, processes the data, and performs display and data accumulation. It is related to the device.

[Conventional technology]

An example of a conventional data collection processing device will be explained based on FIG. 7.

In the same figure, (1) represents multiple nanologs 1g of the process.
When the signal is input to the analog signal interface circuit (2), the central processing unit! (hereinafter referred to as CPU) (3)
The corresponding input signal is selected by the signal 6J, and the signal is inputted to the A/D conversion circuit (4). The A/D converter QP (4) converts the signal into a digital signal.The CPU (31) reads the signal and converts it to a constant stored in the memory circuit (5).
Based on this, scale change calculations are performed for each measurement target,
The results are displayed on a CRT (hereinafter referred to as CRT) (7) via a CRT interface circuit (6). Or display data or images generated based on that data. The data is also printed by a printer (9) via a printer interface circuit (8) at predetermined time intervals.

(1 (I is a plurality of digital signals of the process, which are input to the digital signal interface circuit αB.

If the digital signal is a contact signal and the signal is 0N10FF, the CPU (31) reads the state as necessary and determines whether it is 0N10FF. ) reads the 0N10FF state of that signal and memorizes that state, and when read sequentially, it compares the previously read state with the current state and changes from ON to OFF or from OFF to ON. When this state is detected, it is assumed that one pulse has arrived, and 1 is added to the memory at a predetermined address in the memory circuit (5) to count the number of arriving pulses.This data is transferred to the analog signal ( 1)
Similarly to the data, the results of the arithmetic processing performed by the CPU (31) are sent to the CRT interface circuit (31) as measurement data.
6) and displayed on the CRT (7). Further, the data is printed by a printer (9) via a printer interface circuit (8). In addition, inputting data and constants and operating the device are performed via the CP interface circuit.
This can be done by operating the operating unit connected to U (31).

[The problem that the invention attempts to solve]

Conventional equipment has a more complex configuration than the one described above, so it is difficult to guarantee high reliability if the signal generation center to be measured in the process is located far away from the data acquisition processing equipment or is distributed. Moreover, the wiring work is complicated and expensive. Furthermore, although it is possible to add more interface ports depending on the number of measurement points, the housing and power supply to accommodate them must be prepared to accommodate the additional capacity, making the equipment larger and more expensive. Therefore, there is a drawback that the smaller the number of points, the higher the cost.

This invention was made to solve the above-mentioned problems, and the wiring work is simple and inexpensive, and
It is an object of the present invention to provide a data collection and processing device that can be easily expanded according to the number of measurement points, has high cost performance, and is highly reliable.

[Means for solving problems]

The data collection processing device according to the present invention has a main unit as a parent unit and a plurality of terminal units as slave units that are independently separated, and these devices can be equipped with an interface port that can be selected according to the purpose in a general-purpose slot. , and connects the main body and each terminal section via a signal line, and connects the address word, control word, first sum check word, data word, and second sum check word for each terminal section to this signal line.
By adding a sum check word and adding a parity bit to each word during data transmission, high transmission reliability is maintained and a system configuration that meets the required functions is achieved.

[Effect]

The data collection processing device according to the present invention has a transmission interface in the main body and each terminal, which are connected via a signal line, each terminal has an address set, and the main body has a transmission interface for a predetermined terminal. An address word that specifies the address, a control word that specifies the operating mode of the terminal, a first sum check word for these two words, and data of a predetermined word length when transmitting data by communicating with the terminal. transmitting a word string and a second sum check word for all words;
A parity check is added to each word to ensure highly reliable transmission.

[Embodiments of the invention]

FIG. 1 is a system configuration diagram of a data collection processing device according to an embodiment of the present invention.

In the figure, (100) is the main body that collects data and performs its geography. (200) is a terminal unit equipped with an interface circuit for inputting process signals. (3
00) is a terminal unit similar to the terminal unit (200), and although only two terminal units are used here, transmission channels (80), (81), (82) such as twisted pair wires, etc.
), it is possible to connect multiple units with cross-wire wiring. (190).

(290) and (390) are transmission interface circuits, and these interface circuits (190) and (290).

(390) is for transmitting signals from each part.

The terminal section (200), (300) is equipped with a plurality of general-purpose slots (not shown) in which Jd7' process interface circuits can be mounted, and each - general-purpose Ink7Ace port can be mounted in these slots according to the purpose. It looks like it's been damaged. Therefore, an interface board can be installed in this slot, for example for contact signals, analog signals and pulse signals from the process.

The internal configuration of the terminal sections (200) and (300) is
(200) is represented and illustrated in Figure 2. (210)
, (220), (230), and (240) are general-purpose interface boards. For example, (210) is a digital signal interface such as a contact, and the interface part (212) receives a contact signal (211) from the outside.
This signal is converted to an IC level signal and the data bus (
201). Also, (202
) is a control path), and the control circuit (213) controls the signal acquisition procedure of the digital signal interface circuit (210) based on the signal of this path.

(220) is an analog signal interface circuit that takes in, for example, an analog 11N signal, receives an external analog signal (221) at an interface section (222), and converts the corresponding Gt signal from the external signal into 'fA next A/D'. R*
1gl path (223) converts it into an IC level digital signal and outputs it to the data bus (201).

(2z4)J:ni control circuit, control bus (2z4)
02) is used to input analog signals and control A/D conversion. General-purpose interface board (2
30) and (240) have similar functions.
For example, a pulse input interface board is the digital interface board with the addition of pulse counting equipment. (203) is a CPU, operates according to the program procedure pre-loaded into the memory circuit (204), and connects the corresponding interface board (210).
) to (240). The memory circuit (204) is also capable of storing the captured data. (290) is the transmission interface circuit, and the transmission equipment (80) ~
It is connected to the transmission interface circuit (190) of the main body (100) via (82) and transmits and receives signals by transmitting data with the main body m (Woo). (291) is the transmission interface circuit (290)
The address setting section is used to set the address of the transmission station.

Next, the internal configuration of the main body (100) will be explained with reference to FIG. (103) is a CPU to which a data bus (101) and a control bus (102) are connected, and these paths (101) and (102) are connected to terminal units (200) and (30).
0), it has multiple general-purpose slots in which each pole interface board can be installed, and one of the slots
A transmission interface circuit (190) board is mounted on the board. This transmission interface circuit (190) is connected to the data bus (101) and control bus (10).
2) is controlled by the control signal on the control bus (xo2) from the CPU (103), receives and receives data on the data bus (101), and generates transmission data. or the terminal section (200), (
300) etc. is transferred from the data bus (10
1) and is configured to be delivered to the CPU (103) for processing.

(104) is a ROM, which is preloaded with a data program such as RASIC, or a management program, and a RAM (105) K★ is loaded with a user application program, and the entire operation of this device is controlled. Management controlled.

(106) is a floppy disk interface circuit that controls the floppy disk (107). The CPU (i03) has terminal units (200) and (300
) and data generated by the CPU (103) are stored on a floppy disk (107), or application programs and parameters written therein are stored in a RAM (105).
The floppy disk (107) can also be used as an external storage device, such as by loading the program into a computer and executing the program, and performing calculations using parameters.

(108) is a CRT interface circuit that outputs the collected data, display data generated by the CPU (103), and one page to the CRT (109) for display. (110) is a printer interface circuit,
The collected data and the data generated by the CPU (103) are output to a printer (111) to tabulate the data. (112) is the keyboard (1
13) with a keyboard interface circuit connected to
Main body part (100) or terminal part (200), (300
It is used when inputting signals for operating and controlling the entire device, including (), or when manually inputting various types of data. FIG. 4 is a configuration diagram of signals transmitted by the transmission interface circuits (190), (290), and (390). This transmission is carried out sequentially from the main unit (100) (hereinafter referred to as 17Am) to the terminal units (hereinafter referred to as slave units) (200) and (300).
It is used to send and receive necessary commands and data.

First, an address word (601) is sent out. This address word (601) is used to identify which slave unit the base unit (100) is transmitting to.
The slave device that matches the setting value of the address setting section (291) of the slave device becomes the transmission partner. In other words, the parent device (100)
The data sent from the transmission interface circuit (
29°) and the address word (601) matches the setting value of the address setting section (291), the handset recognizes that the transmission is directed to itself. Next, a control word (602) is sent.

This control word (602) is a command code indicating what kind of operation is to be performed from the base unit (100) to the slave unit that is the transmission partner.For example, it can be roughly divided into control operation mode and data length specification mode. Two operating modes can be determined.

In other words, when you want to perform some kind of control on the handset, for example, a specific code is associated with a certain control action, and when the handset receives that code, it decodes the code and performs the corresponding action in advance. That's why. For example, the control operation mode of this control word is the 11 command from a master unit to a certain slave unit to measure the signal of the interface board mounted on the slave unit and send it to the base unit. Apply the code to it. This operation makes it possible to sequentially collect data from the slave devices.

The data length designation code is used to designate the data length to be transmitted when data is communicated with the slave device, and designates how many bytes there are in a data word, which will be described later. For example, when this code is OOH, the data is θ
Byte, when this code is OIH, the data is 1 byte, when this code is 02H, the data is 2 bytes, and in the same way, when it is 081 (the data length is 8 bytes). .

Next, a first sum check word (603) is sent, which is the sum of the codes of the address word (601) and control word (602). , to check for errors that may occur during transmission. In the receiving 1W 11J, the received codes of the address word (601) and control word (602) are added, and the value is compared with the basket of the first sum check word (603), and only when they match, the transmission is normal. It is determined that this has been carried out.

Next, data words (610) to (617) are sent out. These data words (610) to (617) are the main unit (
100) and a slave unit, and is transmitted when the aforementioned control word (602) is a code corresponding to the data length specification mode. That is, for example, the control word (602
) is 03H, the data word is (610), (611
), (612), and at 05H, the data word is (610), (611), (612).
), (613), and (614).

A second sum check word (618) is added to the end of the data words (610) to (617) and sent out. This second sum check word (618) includes the aforementioned address word (601), control word (602),
The codes of the first sum check word (603) and data words (610) to (617) are all added, and the addition result excluding overflows is sent out as the second sum check word (618). This word (61
8) is also used to check for transmission errors in the same way as the above, and the operation on the receiving side is based on the first sum check word (
603).

FIG. 5 is a time chart of the word structure of the address word (601), control word (602), and first sum check word (603).

For example, the address word (601) starts with the start bit (601a), then the signal bit (601a).
b) are lined up, and a stop bit (601c) is added at the end.

FIG. 6 shows the address word (601) in more detail. first start) (601a
'J is present, and then the bit (60n) of the signal is transmitted in a 9-bit configuration. The last bit of these is a parity bit (601d) to prevent an erroneous check. Finally, there is a stop ping (6010). Due to this bit configuration, the control word (6
02), the IEI sum check word (603), the side data words (610) to (617), and the second sum check word (618) have a similar structure.

In the data structure described above, signal transmission is performed as follows. Here, transmission errors are checked using the first and second sum check words (603) on the receiving side.

(618) and checking the parity bit for each word. In other words, when the base unit (100) sends a signal having the configuration shown in Figures 4 to 6 to the applicable slave unit, the applicable slave unit receives this signal and determines whether the signal was given to itself or not. It is determined by decoding the address word (601). Furthermore, the parity bit and the first and second sum check words (603) and (618) are checked, and if an error is detected in this check, no operation is performed and the signal is retransmitted from the base unit (100).

Of course, if there is an error in the address word (601),
Sometimes mistakes are made such as sending a signal to a handset with a non-existent address. In this case, since the applicable slave device does not exist, the slave device does not perform any operation.

The master device (100) waits for a certain period of time for a return signal indicating the completion of an operation or data transfer from the slave device. If there is no response during this time, the same signal as last time is sent to the corresponding slave unit again. If the handset correctly receives this retransmitted signal, it sends the result back to the base (100). If an error occurs in the reception of the signal transmitted again, the master M (100
), the base unit (100) regards the slave unit as having an abnormal vb and moves the polling operation to the next address.

In the above embodiment, the handset is referred to as the terminal unit (2) for convenience of explanation.
00) and (300) are connected, but of course it is possible to connect only the necessary number of handsets.
00), necessary signals and data can be sent and received from each.

In addition, since various numbers of slave units can be connected, it is unnecessary for the master unit (100) to memorize the number of slave units by some means when performing polling operations. This eliminates the need for polling, which is advantageous in terms of transmission processing capacity. In that case, fim(100)
Setting means or storage means may be provided, such as setting the number of slave units connected to the terminal using a switch, etc., inputting the number using a keyboard (113), etc., and storing it in the internal memory circuit. . Of course, when the system is powered on, it performs initial processing and accesses the slave units one after another from the base unit (100) side, determines that only the slave unit at the address that received a response is connected, and then accesses the address of that slave unit. If configured to memorize the settings, no setting means is required.

〔Effect of the invention〕

As described above, according to the present invention, since the main unit as a parent unit and the plurality of terminal units as slave units are separated, the signal generating unit is located at a long distance or In some cases, wiring work◆ can be done easily and cheaply to 111I+. Furthermore, since an interface board suitable for the application can be selected as necessary, a configuration suitable for the required functions can be assembled, and waste can be eliminated in terms of function and price.

Furthermore, the main unit and terminal unit can be placed and installed in the required location, and a parity check is performed for each word to check for transmission errors, and a first sum check word is used for the address and control words. Furthermore, since the second sum check word is added to all transmitted data before transmission, high transmission reliability can be maintained.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a data collection processing device according to an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of the terminal section of the device in FIG. 1, and FIG. 3 is a block diagram showing the configuration of the terminal section of the device in FIG. Figure 4 is a block diagram showing the configuration, Figure 4 is a diagram of the configuration of signals transmitted via the transmission interface circuit, Figure 5 is a time chart of the configuration of each word in Figure 4, Figure 6 is the address word in Figure 5. FIG. 7 is a block diagram showing the configuration of a conventional device. (80), (81), (82) --- transmission line,
(100)...Main unit (base unit), (190), (29
0), (390)...interface circuit, (20
0). (300)...Terminal unit (child unit), (212), (22
2)...Interface section, (601)...Address word, (601d)...Parity bit, (6
02)--Control word, (603)--First sum check word, (610)-(617)...
- Data word, (618)...second sum check word. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (2)

[Claims] (1) Collect process pulse signals, contact signals, analog signals, etc. as input, measure predetermined physical quantities,
In a data collection processing device that processes data, displays, records, and stores data, it has a main unit as a master unit that processes, displays, records, and stores data, and multiple terminal units that function as slave units that capture process signals. The terminal section has an interface section selected according to the process, each terminal section and the main body section are equipped with a transmission interface circuit, and each transmission interface circuit is connected with a signal line by crossover wiring, and the main body 1. A data collection and processing device that collects signal data of each process while calling a terminal section from a terminal section. (2) Each terminal unit has address setting means for its own transmission interface circuit, and the transmission data consists of an address word that specifies the address, a control word that specifies the operating mode of the terminal unit, and these two. It consists of a first sum check word for a word, and when the control word is in the data length specification mode, a data length specified number of data words, and a second sum check word for all words, and each word has a parity. The data collection processing device according to claim 1, wherein a bit is added.