JPH05304205A - Semiconductor device and fabrication thereof - Google Patents

Abstract

PURPOSE:To realize an embedded isolation having structure causing no concentration of stress nor deterioration of insulation characteristics. CONSTITUTION:The embedded isolation is realized by a groove made in a silicon substrate 1, a first silicon nitride film 3 having N/Si compositional ratio of 0.8 covering the inner wall face of the groove, and a second silicon nitride film 4 having N/Si compositional ratio of 1.0 or above and filling the groove.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a buried element isolation region and its manufacturing method.

[0002]

2. Description of the Related Art In recent years, large-scale integrated circuits (LSIs) formed by integrating a large number of transistors, resistors and the like so as to achieve an electric circuit are formed in important parts of computers and communication devices. It is used a lot. Therefore, the performance of the entire device is largely linked to the performance of the LSI itself.

The performance improvement of a single LSI can be realized by increasing the degree of integration. To increase the degree of integration, it is necessary to miniaturize the element isolation region. The LOCOS method has been conventionally used as a method for forming the element isolation region, but it has been seen that there is a limit to the miniaturization of the element isolation region by this method.

Therefore, in order to form a fine element isolation region, many methods including improvement of the LOCOS method have been proposed. Among them, the method called the groove-filled element isolation method is advantageous for miniaturization. Is a promising new method. FIG. 11 is a cross-sectional view of a single crystal silicon substrate 91 having an element isolation region formed by this method. This will be described according to the forming process. First, a groove is formed on the surface of the substrate in a portion to be an element isolation region by using a technique such as a photolithography technique or anisotropic dry etching. Then, a thermal oxidation method is used to form a stress buffering silicon oxide film 92 on the surface of the groove. Next, using a CVD method, a silicon oxide film 93 is deposited on the entire surface of the substrate so as to fill the inside of the groove. Finally, the silicon oxide film 93 on the substrate surface is removed by etching using anisotropic etching or wet etching, and the element isolation region is completed by leaving the silicon oxide film 93 only inside the groove. However, this type of groove filling element isolation method has the following problems.

That is, since the film formation stress of the silicon oxide film 93 is large, there is a problem that even if the silicon oxide film 92 is provided, a defect occurs in the single crystal silicon substrate 91. In particular, since stress was likely to be concentrated on the single crystal silicon substrate 91 at the bottom of the groove, many substrate defects occurred on the single crystal silicon substrate 91 at the bottom of the groove. Such a substrate defect causes a deterioration in the specification of the element, and therefore it is necessary to prevent it. In addition to the above-mentioned causes, the substrate defect caused by the stress is caused by the silicon oxide film 93.
It is also caused by the difference between the coefficient of thermal expansion of the single crystal silicon substrate 91 and the coefficient of thermal expansion of the single crystal silicon substrate 91.

That is, since there is a large difference between the coefficient of thermal expansion of the silicon oxide film 93 and the coefficient of thermal expansion of the single crystal silicon substrate 91, a large stress is applied to the single crystal silicon substrate 91 during the thermal process after the formation of the element isolation region. It works and causes a substrate defect.

Generation of stress due to such a difference in thermal expansion coefficient can be prevented by using an insulating film having a thermal expansion coefficient close to that of the single crystal silicon substrate 91, for example, a silicon nitride film. However, the silicon nitride film has a characteristic that the film forming stress increases as the Si / N composition ratio decreases. FIG. 12 is a characteristic diagram showing the relationship between the Si / N composition ratio and the film forming stress, which indicates this. From this figure, the Si / N composition ratio, which is typical for silicon nitride films, is 3/4
When the silicon nitride film (Si ₃ N ₄ film) is used,
It can be seen that a very large film formation stress (tensile stress) occurs.

Therefore, Si _{3 is used} as the silicon nitride film.
When the N ₄ film is used, the substrate defect due to the stress due to the difference in thermal expansion coefficient can be prevented, but the substrate defect due to the stress at the time of film formation cannot be prevented.

As can be seen from FIG. 12, such a problem can be solved by increasing the Si / N composition ratio to some extent, but the silicon nitride film has a characteristic that the insulation characteristics deteriorate as the Si / N composition ratio increases. Therefore, there is a new problem that the insulation isolation capability required for element isolation cannot be ensured. FIG. 13 shows this by N /
It is a characteristic view which shows the relationship between Si composition ratio (0.6, 1.0) and current density. That is, it is a characteristic diagram obtained by applying a voltage to a capacitor having a structure in which a silicon nitride film is sandwiched by two electrodes and examining the current density of the electrode due to the difference in the N / Si composition ratio of the silicon nitride film. From this figure, it can be seen that when the N / Si composition ratio is small, the current density is large and the insulation characteristics are deteriorated. Also, the silicon nitride film is
Compared with the silicon oxide film, the etching selection ratio with respect to the single crystal silicon substrate 91 is small, and it has a property that is not desirable as an insulating film for burying a groove.

[0010]

As described above, in the conventional trench burying element isolation method, the silicon oxide film is used as the insulating film for burying the trench. Therefore, the step of burying the silicon oxide film inside the trench is performed. There is a problem that stress acts on the silicon substrate to cause a substrate defect during the process including the heat treatment.
Further, when the silicon nitride film is used instead of the silicon oxide film, it is possible to prevent the occurrence of substrate defects due to stress, but there is a new problem that the insulation separation ability is reduced.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor device having an element isolation region having a structure capable of preventing the occurrence of substrate defects due to a decrease in element isolation capability and stress. To provide.

[0012]

The essence of the present invention is an insulating film having a double structure consisting of a first insulating film having a small film forming stress and a second insulating film having a high insulating property, which serves as an element isolation region. I filled the ditch.

In other words, in order to achieve the above-mentioned object, the semiconductor device of the present invention comprises a groove formed in a silicon substrate, and at least one element of nitrogen and oxygen and silicon as a main component, and A first insulating film provided at least at the bottom, and a second insulating film containing at least one element of nitrogen and oxygen and silicon as a main component and filling the groove provided with the first insulating film. And the ratio of silicon in the second insulating film is smaller than that of the first insulating film.

The method of manufacturing a semiconductor device of the present invention is
A step of forming a groove in the silicon substrate; and a step of depositing a first insulating film containing silicon and at least one element of nitrogen and oxygen as a main component on the silicon substrate by using a CVD method. A step of covering the bottom portion with the first insulating film, and a main component is at least one element of nitrogen and oxygen and silicon on the silicon substrate using a CVD method, and the ratio of silicon in the film is Depositing a second insulating film smaller than that of the first insulating film to fill the inside of the groove; and etching the first and second insulating films to form the first insulating film inside the groove. And a step of leaving the second insulating film left.

Further, in another method of manufacturing a semiconductor device of the present invention, a step of forming a groove in a silicon substrate, and at least one element of nitrogen and oxygen and silicon are main components on the entire surface of the silicon substrate. A step of depositing an insulating film to fill the groove; a step of performing a heat treatment on the insulating film after ion-implanting the insulating film; and a step of etching the insulating film to form the insulating film inside the groove. And a step of leaving it. Another method of manufacturing a semiconductor device according to the present invention is a step of forming a groove having a depth ratio to an opening width of a predetermined value or more on a silicon substrate, and nitrogen and oxygen on the silicon substrate using a CVD method. An insulating film containing at least one of the above elements and silicon as a main component is deposited so that the ratio of silicon at the bottom of the groove is higher than the ratio of silicon at the portion above the bottom, and The method is characterized by including a step of filling with a film and a step of etching the insulating film to leave the insulating film only inside the groove.

[0016]

In the semiconductor device of the present invention, at least the bottom of the groove is filled with the first insulating film containing a large proportion of silicon. When the ratio of silicon is large, the stress becomes small, so that the stress concentration that is likely to occur at the bottom of the groove can be relaxed and the deterioration of the element characteristics due to the substrate defect can be prevented. Further, when the ratio of silicon is large, the insulating property is deteriorated. However, in the present invention, the inside of the groove which is not filled with the first insulating film has a small ratio of silicon, that is, the second insulating film having a good insulating property. Is filled with an insulating film. Therefore, the insulating film as a whole functions as a groove-filling insulating film having sufficient insulating characteristics. Therefore, it is possible to obtain the element isolation region having a structure capable of preventing the deterioration of the element isolation ability and the occurrence of the substrate defect.

Further, in the method of manufacturing a semiconductor device of the present invention, since the first and second insulating films are formed by using the CVD method, the flow rate of the nitrogen source gas or the oxygen source gas is adjusted. By doing so, the ratio of silicon can be controlled. Therefore, the inner wall surface of the groove can be easily covered with the first insulating film having a small stress, and the inside of the groove not filled with the first insulating film can be filled with the second insulating film having a high insulating property. You can Therefore, the trench can be filled with the insulating film without lowering the element isolation capability or causing a substrate defect.

In another method of manufacturing a semiconductor device of the present invention, an insulating film is deposited on the entire surface of a silicon substrate to fill the groove, and then ion implantation is performed on the insulating film. It is known that heat treatment of an ion-implanted insulating film such as a silicon nitride film improves the insulating characteristics. Therefore, for example, if the groove is filled with a silicon nitride film having a high silicon ratio, that is, a stress is small, and the ions are implanted under the condition that ions reach the silicon nitride film inside the groove, only the silicon nitride film on the upper part of the groove is High insulation can be achieved. Therefore, the groove can be filled with an insulating film such as a silicon nitride film without lowering the element isolation capability or causing a substrate defect.

In another method of manufacturing a semiconductor device according to the present invention, a groove having a depth to opening width ratio (depth / opening width) of a predetermined value or more is formed in a silicon substrate. For this reason,
For example, if this ratio is set to 2 or more, it becomes difficult for the raw material gas such as the nitrogen raw material gas or the oxygen raw material gas to reach the lower portion of the groove, and the amount of the raw material gas supplied to the upper portion of the groove can be increased. Therefore, a low-stress insulating film having a large proportion of silicon can be formed in the lower portion of the groove, and a high-insulating insulating film having a small proportion of silicon can be formed in the upper portion of the groove, resulting in a decrease in element isolation capability and a substrate defect. The groove can be filled with the silicon nitride film without any need.

[0020]

Embodiments will be described below with reference to the drawings. 1A to 1D are process cross-sectional views showing a method for forming an element isolation region according to a first embodiment of the present invention.

First, as shown in FIG. 1A, a p-type single crystal silicon substrate 1 having a main surface of (100) and a specific resistance of about 4.5 to 6 Ωcm is prepared, and this single crystal silicon substrate 1 is prepared. The opening width is 0.3 μm on the surface that will be the element isolation region of
Grooves are formed using photolithography or the like. Next, this single crystal silicon substrate 1 is heated at 900 ° C. and hydrochloric acid 10%.
Is thermally oxidized in an oxygen atmosphere containing oxygen to a thickness of 25
A silicon oxide film 2 having a thickness of nm is formed. The silicon oxide film 2 is provided to lower the interface state of the substrate surface and prevent contamination by contaminants in the substrate, and is preferably formed with a film thickness of 1 nm or more. Also,
From the viewpoint of film stress, a film thickness of 50 nm or less is preferable. Next, after accommodating the single crystal silicon substrate 1 in the LPCVD apparatus,
Deposition temperature 780 ° C., deposition pressure 0.3 Torr, dichlorosilane flow rate 200 cc / min, ammonia flow rate 15 cc /
The first silicon nitride film 3 having a N / Si composition ratio of 0.8 and a film thickness of 50 nm is deposited on the silicon oxide film 2 under the condition of minutes. Then, the flow rate of ammonia is continuously increased to 200 cc / min, that is, the flow rate of dichlorosilane and ammonia is set to 200 cc / min, and the N / Si composition ratio is 1.0 or more and the film thickness is 300 nm. A silicon nitride film 4 is deposited on the first silicon nitride film 3 to fill the groove.

Next, as shown in FIG. 1B, the first and second silicon nitride films 3, 3 on the silicon substrate 1 overflowing from the groove.
4 is removed by mechanical polishing, and the first and
The second silicon nitride films 3 and 4 are left. Finally, the silicon oxide film 2 on the surface of the substrate is removed using an ammonium fluoride solution to complete the element isolation region.

In this embodiment, the inner wall surface of the groove is covered with the silicon nitride film 3 having a small N / Si composition ratio (0.8). The silicon nitride film having a small N / Si composition ratio is shown in FIG.
As will be understood from the above description, since the film forming stress is small, there is no problem that the film forming stress of the silicon nitride film 3 causes a defect in the silicon substrate 1 to deteriorate the device characteristics. In addition, the inside of the groove not filled with the silicon nitride film 3 is
It is completely filled with the silicon nitride film 4 having a large N / Si composition ratio (1.0 or more). As can be seen from the description of FIG. 13, since the silicon nitride film having a large N / Si composition ratio has good insulating characteristics, the lack of insulating ability of the silicon nitride film 3 is compensated by the silicon nitride film 4, resulting in the entire silicon nitride film. The insulation characteristics of are good. Also, the insulating property can be improved by forming the groove deep. That is, since the leak current flows in a path that reciprocates above and below the groove, if the groove is deep, there is no problem in practical use even if the insulating property of the silicon nitride film 2 is somewhat low. Further, the stress of the silicon nitride film 4 acting on the silicon substrate 1 is reduced by the silicon nitride film 3.

Thus, according to the present embodiment, by filling the groove with a silicon nitride film having a double structure of the silicon nitride film 3 having a small N / Si composition ratio and the silicon nitride film 4 having a large N / Si composition ratio, Sufficient insulation capacity can be ensured, and deterioration of element characteristics due to stress concentration can be prevented, and future U
It is possible to obtain an element isolation region that can sufficiently cope with the miniaturization of 1SI. 2 and 3 are process sectional views showing a method for forming an element isolation region and a gate electrode according to the second embodiment of the present invention.

First, as shown in FIG. 2A, a p-type single crystal silicon substrate 11 having a main surface of (100) and a specific resistance of about 4.5 to 6 Ωcm is prepared, and this single crystal silicon substrate is prepared. 11 is thermally oxidized in an oxygen atmosphere containing 800 ° C. and 10% hydrochloric acid to form a silicon oxide film 1 having a thickness of 16 nm on the entire surface of the substrate.
Form 2. Then, using an LPCVD apparatus, a thickness of 20
After depositing a 0 nm polycrystalline silicon film 13 on the silicon oxide film 12, a thickness 10 is formed on the polycrystalline silicon film 13.
A positive photoresist 14 of 00 nm is applied.

Next, as shown in FIG. 2B, the photoresist 1 in the element isolation region is formed by using photolithography or the like.
Remove 4. Then, using the remaining photoresist as a mask, anisotropic dry etching is performed to form the polycrystalline silicon film 13, the silicon oxide film 12, and the single crystal silicon substrate 1.
1 is sequentially etched to form a groove in the silicon substrate 11.

Next, as shown in FIG. 2C, after removing the photoresist 14 using a strong acid or the like, annealing is performed in a nitrogen atmosphere at 950 ° C., and then 900 ° C., oxygen containing 10% hydrochloric acid. A 35-nm-thick silicon oxide film 15 is formed in the atmosphere on the substrate surface and the inner wall surface of the groove. Then, using a LPCVD apparatus, a silicon nitride film 16 having an N / Si ratio of about 0.8 and a thickness of 1000 nm is deposited on the entire surface to fill the groove.

Next, as shown in FIG. 3A, the acceleration voltage 1
50kV, dose 1 × 10 ¹⁶ / cm ² After implanting oxygen ions into the silicon nitride film 16 under the above condition, annealing treatment is performed in an oxygen atmosphere. The annealing temperature is, for example,
950 ° C is good. When the ion-implanted silicon nitride film 16 is annealed, the atomic composition is changed and the insulating characteristics are improved. Therefore, the upper portion of the silicon nitride film 16 is changed to the silicon oxynitride film 17 having excellent insulating characteristics. FIG. 4 is a diagram showing this, and is a characteristic diagram showing the relationship between the ion implantation amount and the current (leakage current). That is, the silicon nitride film that has been annealed (950 ° C.) after the ion implantation is 2
FIG. 11 is a characteristic diagram obtained by applying a voltage to a capacitor sandwiched by two electrodes and examining a current (leakage current) flowing through the electrodes due to a difference in the amount of oxygen ions in the silicon nitride film. In the figure, the curve a has a dose of 0 / cm ² (Without ion implantation), the curve b has a dose amount of 5 × 10 ¹⁸ / cm ^2. , The curve c has a dose of 1 × 10 ¹⁹ / cm ² It is a characteristic curve in the case of. By implanting oxygen ions from this figure,
It can be seen that the leakage current is reduced and the insulation characteristics can be improved.

Next, as shown in FIG. 3B, a silicon nitride nitride film 17 is formed by using the polycrystalline silicon film 13 as a stopper.
Are mechanically polished to remove the silicon oxynitride film 17 and the silicon oxide film 15 on the element region, leaving the silicon oxynitride film 17 only inside the groove. Finally, LPCV
200 nm thick polycrystalline silicon film 18 using D device
Is deposited on the entire surface and then the polycrystalline silicon films 13 and 18 are patterned to complete the element isolation region 19 and the gate electrode 20.

According to the method described above, the lower part of the groove is N /
Since it is filled with the silicon nitride film 16 having a small Si ratio (about 0.8), the stress concentration at the groove bottom can be relaxed and the deterioration of the device characteristics due to the substrate defect can be prevented. Further, since the upper part of the groove is filled with the silicon oxynitride film 17 having a high insulating property, the insulating property of the groove-filling insulating film as a whole becomes good. Further, according to this embodiment, the surface of the silicon oxynitride film 17 is formed higher than the surface of the silicon oxide film 12, so that the surface of the silicon oxynitride film 17 and the surface of the silicon oxide film 12 have the same height. Compared with the above case, there is an advantage that the electric field concentration at the corners of the silicon oxide film 12 becomes smaller. 5A to 5D are process sectional views showing a method of forming an element isolation region according to the third embodiment of the present invention.

First, as shown in FIG. 5A, a p-type single crystal silicon substrate 21 having a main surface of (100) and a specific resistance of about 4.5 to 6 Ωcm is prepared, and this single crystal silicon substrate is prepared. 21 is thermally oxidized in an oxygen atmosphere containing 950 ° C. and 10% hydrochloric acid to form a 25 nm thick silicon oxide film 2 on the entire surface of the substrate.
Form 2. Then, a 200 nm thick silicon oxide film 23 is deposited on the silicon oxide film 22 by using an LPCVD apparatus, and then a thickness of 1000 is formed on the silicon oxide film 23.
A positive photoresist 24 having a thickness of nm is applied, and then the photoresist 24 is patterned by using photolithography to remove the photoresist 24 in the element isolation region.

Next, as shown in FIG. 5B, the silicon oxide films 23 and 22 and the single crystal silicon substrate 21 are sequentially etched by anisotropic dry etching using the remaining photoresist 24 as a mask. Form a groove on the surface. Then, the photoresist 24 is removed using a strong acid or the like, and then the silicon oxide films 22 and 23 are removed using an ammonium fluoride solution. Next, the single crystal silicon substrate 21
Is thermally oxidized in an oxygen atmosphere containing 900 ° C. and 10% hydrochloric acid to form a silicon oxide film 25 having a thickness of 35 nm on the substrate surface and the inner wall surface of the groove, and then N / S is performed by using an LPCVD apparatus.
A silicon nitride film 26 having an i ratio of about 0.8 and a thickness of 100 nm is deposited on the entire surface to fill the groove.

Next, as shown in FIG.
After applying a positive photoresist 27 of nm thickness, the photoresist 27 is patterned using photolithography, and the photoresist 27 is left only on the upper part of the groove. At this time, the upper surface of the photoresist 27 and the silicon nitride film 2
The upper surface of 6 is substantially on the same plane. Then acceleration voltage 100
kV, dose 1 × 10 ¹⁶ / cm ² Under the above conditions, fluorine ions are ion-implanted into the silicon nitride film 26. As a result of this ion implantation, the etching rate of the silicon nitride film 26a on the surface of the substrate, into which the fluorine ions have been implanted, becomes higher than that of the silicon nitride film 26 inside the trench into which the fluorine ions have not been implanted.

Next, as shown in FIG. 5C, the photoresist 27 and the silicon nitride film 26a having a high etching rate are removed by using the silicon nitride film 26 having a low etching rate as an etching stopper. Finally, for example, oxygen ions are implanted into the silicon oxide film 26 in the upper part of the groove, and then an annealing process is performed to form a silicon oxynitride film 28 having a high insulating property in the upper part of the groove to complete the element isolation region. According to the method described above, since the silicon nitride film 26 itself acts as an etching stopper, it is possible to save the trouble of forming and removing an extra etching stopper.

N / Si is small at the bottom of the groove (0.
Since the silicon nitride film 26 is buried in the silicon nitride film 26, there is no problem that the silicon substrate 21 is defective due to the stress during film formation and the device characteristics are deteriorated. Further, since the upper part of the groove is filled with the silicon oxynitride film 28 having a high insulating property, sufficient element isolation characteristics can be obtained. 6A to 6D are process sectional views showing a method of forming an element isolation region according to the fourth embodiment of the present invention.

First, as shown in FIG. 6A, a p-type single crystal silicon substrate 31 having a main surface of (100) and a specific resistance of about 4.5 to 6 Ωcm is prepared. 31 is thermally oxidized in an oxygen atmosphere containing 950 ° C. and 10% hydrochloric acid, and a silicon oxide film 3 having a thickness of 25 nm is formed on the entire surface of the substrate.
Form 2. Then, a 200 nm-thickness silicon oxide film 33 is deposited on the silicon oxide film 32 using an LPCVD apparatus, and then a thickness of 1000 nm is formed on the silicon oxide film 33.
A positive photoresist 34 of nm thickness is applied, and then the photoresist 34 is patterned by using photolithography to remove the photoresist 34 in the element isolation region.

Next, as shown in FIG. 6B, the silicon oxide films 33 and 32 and the single crystal silicon substrate 31 are sequentially etched by anisotropic dry etching using the remaining photoresist 34 as a mask to form a substrate. Opening width 0.3 on the surface
A groove having a depth of 0.8 μm and a depth of 0.8 μm is formed. An inclination of 5 ° is applied to the side wall of the groove. Then, the silicon oxide film 33 and the silicon oxide film 22 are set back by 20 nm in a dilute ammonium fluoride solution. This is to cover the corners of the opening of the groove with the insulating film for burying the groove. As a result, it is possible to prevent stress concentration caused by oxidation of the side wall of the groove in the thermal process after the element isolation region is completed. Then, using a strong acid or the like, the photoresist 34
Then, the single crystal silicon substrate 31 is thermally oxidized at 900 ° C. in an oxygen atmosphere containing hydrochloric acid 10% to form a silicon oxide film 35 having a thickness of 15 nm on the substrate surface where the silicon is exposed and the inner wall surface of the groove. .. Next, using an LPCVD apparatus, the film forming temperature is 780 ° C., the film forming pressure is 0.3 Torr,
Under the condition that the flow rate of dichlorosilane of the raw material gas is 200 cc / min and the flow rate of ammonia is 20 cc / min, that is,
A 600-nm-thick silicon nitride film 36 is deposited on the entire surface under the condition that the film formation reaction is the rate-determining supply of nitrogen. At this time, a highly insulating silicon nitride film 36a having an N / Si composition ratio of 0.8 is formed in a region above the substrate surface and having a depth of about 0.5 μm. On the other hand, in areas below that,
Due to the shape of the groove, that is, the aspect ratio (depth / width) of the groove is 2.0 or more, sufficient ammonia is not supplied, and the low-silicon silicon nitriding ratio of N / Si is about 0.5. The film 36b is formed.

Finally, as shown in FIG. 6C, the silicon oxide film 33 is used as a stopper to form the silicon nitride film 36a.
After mechanical polishing, the silicon oxide film 33 and the portion of the silicon oxide film 32 covered by the silicon oxide film 33 are removed using an ammonium fluoride solution to complete the element isolation region.

According to the method described above, since the film formation stress of the silicon nitride film 36b under the groove is small, the stress concentration at the groove bottom portion, which is likely to cause stress concentration originally, can be relaxed, and the device characteristics are deteriorated due to the substrate defect. Can be prevented. Further, since the silicon nitride film 36a having a high insulating property is formed on the upper portion of the groove, sufficient isolation characteristics can be obtained.

FIG. 7 is a sectional view showing the structure of an element isolation region according to the fifth embodiment of the present invention. This embodiment is the fourth
What is different from the example is that the silicon nitride film is formed by using the source gas to which nitrous oxide is added. That is, in this embodiment, the film formation stress and the insulation characteristics of the silicon nitride film are controlled by the amount of dinitrogen monoxide.

First, as shown in FIG. 7A, after the silicon oxide films 42 and 43 are formed on the single crystal silicon substrate 41 by the same method as in the fourth embodiment, the opening width is set to 0. A groove having a side wall of 0.3 μm and a depth of 1.5 μm and having an inclination of 5 ° with respect to the direction perpendicular to the substrate surface is formed.

Next, as shown in FIG. 7B, the silicon oxide film 43 and the silicon oxide film 42 therebelow are set back by about 20 nm using a dilute ammonium fluoride solution. Next, the single crystal silicon substrate 41 is thermally oxidized at 900 ° C. in an oxygen atmosphere containing hydrochloric acid 10% to form a silicon oxide film 44 having a thickness of 15 nm on the substrate surface where silicon is exposed and the inner wall surface of the groove. After that, using an LPCVD device,
The film forming temperature is 780 ° C., the film forming pressure is 0.3 Torr, the flow rate of the source gas of dichlorosilane is 200 cc / min, the flow rate of ammonia is 20 cc / min, and the flow rate of nitrous oxide is 5 c.
Under the condition of c / min, a silicon oxynitride film 45 having a thickness of 600 nm is deposited on the entire surface to fill the groove. At this time, a silicon oxynitride film 45a having excellent insulating properties is formed in a region above the substrate surface with a depth of about 0.5 μm, while in the region below that, dinitrogen monoxide is formed above the groove. Since it is consumed, sufficient nitrous oxide is not supplied and N /
A low-stress silicon oxynitride film 45b having a low Si content and a Si composition ratio of about 0.5 is formed.

Finally, as shown in FIG. 7C, the silicon nitride film 45 is mechanically polished using the silicon oxide film 43 as a stopper, and then the silicon oxide film 43 and the silicon oxide film 43 are covered with ammonium fluoride solution. The silicon oxide film 42 in the exposed portion is removed to complete the element isolation region.

In the method described above, as in the previous embodiment,
Since the film formation stress of the silicon oxynitride film 45b in the lower part of the groove is small, the stress concentration at the groove bottom can be relieved and the deterioration of the device characteristics due to the substrate defect can be prevented. Further, since the silicon oxynitride film 45a having good insulating properties is formed on the upper part of the groove, sufficient isolation property can be obtained. 8 and 9 are process cross-sectional views showing a method for forming an element isolation region according to the sixth embodiment of the present invention.

First, as shown in FIG. 8A, a p-type single crystal silicon substrate 51 having a main surface of (100) and a specific resistance of about 4.5 to 6 Ωcm is contained at 950 ° C. and 10% of hydrochloric acid. Thermal oxidation is performed in an oxygen atmosphere to form a 25 nm thick silicon oxide film 52 on the entire surface of the substrate. Then, a 100 nm thick silicon nitride film 53 and a 50 nm thick silicon oxide film 54 are sequentially deposited on the silicon oxide film 52 using an LPCVD apparatus, and then a 100 nm thick film is formed on the silicon oxide film 54.
A 0 nm positive photoresist 55 is applied, and then the photoresist 55 in the element isolation region is removed by using a photolithography technique or the like. Then, using the remaining photoresist 55 as a mask, the silicon oxide film 54 and the silicon nitride film 53 are sequentially etched by anisotropic dry etching.

Next, the photoresist 55 is removed using a strong acid, and then the silicon oxide film 54 and the silicon oxide film 52 at the bottom of the groove are removed using an ammonium fluoride solution.
Next, as shown in FIG. 8B, a silicon oxide film 56 having a thickness of 150 nm is deposited on the entire surface by using, for example, an LPCVD apparatus, and then the silicon oxide film 56 is etched by using anisotropic dry etching. The silicon oxide film 56 is buried in the groove formed in the silicon nitride film 53 to flatten the substrate surface.

Next, as shown in FIG. 8C, the silicon substrate 51 is etched by using anisotropic dry etching with the silicon oxide film 56 and the silicon nitride film 53 as a mask, and an opening portion of 0. 3μm, depth 1.0μ
m, forming trenches with sidewalls inclined at 5 ° to the direction perpendicular to the substrate surface.

Next, as shown in FIG. 9A, after removing the silicon oxide film 56 using an ammonium fluoride solution,
The single crystal silicon substrate 51 is thermally oxidized at 900 ° C. in 10% hydrochloric acid in an oxygen atmosphere to form a silicon oxide film 57 having a thickness of 15 nm on the substrate surface where silicon is exposed and the inner wall surface of the groove. Then, using an LPCVD apparatus, the film formation temperature is 680
℃, film formation pressure 0.6 Torr, 20% monosilane 80
% Helium gas flow rate of 500 cc / min, nitrous oxide flow rate of 20 cc / min, thickness 60
A 0 nm silicon oxide film 58 is deposited on the entire surface. At this time, in the region above the depth of 0.6 μm from the substrate surface, O
A silicon oxide film 58a having an excellent insulating property with a / Si composition ratio of about 2.0 is formed, while O /
Silicon oxide film 5 with a low composition stress of Si composition ratio of about 1.0
8b is formed.

Finally, as shown in FIG. 9B, the silicon oxide film 58 is mechanically polished by using the silicon nitride film 53 as a stopper, and then the silicon nitride film 53 is removed by using a hot phosphoric acid aqueous solution. By removing the silicon oxide film 52 under the silicon nitride film 53 using an ammonium fluoride solution or the like, the silicon oxide film 58 can be left only in the element isolation region, and the element isolation region is completed.

According to the method described above, since the lower portion of the groove is filled with the silicon oxide film 58b having a small film forming stress, the stress concentration at the bottom of the groove can be relaxed and the deterioration of the element characteristics due to the substrate defect can be prevented. it can. Further, since the upper portion of the groove is filled with the silicon oxide film 58a having a high insulating property, sufficient element isolation characteristics can be obtained. FIG. 10 is a process sectional view showing a method for forming an element isolation region according to the seventh embodiment of the present invention.

First, as shown in FIG. 10A, a p-type single crystal silicon substrate 61 having a main surface of (100) and a specific resistance of about 4.5 to 6 Ωcm is prepared, and this single crystal silicon substrate 61 is prepared. A groove having an opening width of 0.3 μm is formed on the surface of the substrate in a portion to be the element isolation region. Next, this single crystal silicon substrate 61 is thermally oxidized in an oxygen atmosphere containing 900 ° C. and 10% hydrochloric acid to form a 25 nm thick silicon oxide film 6 on the entire surface of the substrate.
Form 2. Then, using an LPCVD apparatus, the film forming pressure is 0.3 Torr, and the flow rate of dichlorosilane is 200 cc.
/ Min, the flow rate of ammonia is 10 cc / min, and the silicon nitride film 63 having a thickness of 50 nm is replaced with the silicon oxide film 62.
Then, while maintaining the flow rate of dichlorosilane and ammonia, oxygen was added while continuously increasing the flow rate from 0 cc / min to 5 cc / min, and the total thickness of 50
A silicon oxynitride film 64 having a thickness of nm is deposited.

Next, as shown in FIG. 10B, the silicon oxynitride film 64 is formed by using the silicon nitride film 63 as a stopper.
The surface of the substrate is flattened by mechanical polishing. Finally, after removing the silicon nitride film 63 in the element formation region, the silicon oxide film 62 on the substrate surface is removed using an ammonium fluoride solution or the like to complete the element isolation region.

According to the method described above, since the inner wall surface of the groove is filled with the silicon nitride film 63 having a small film formation stress, a defect is generated in the silicon substrate 61 when the silicon nitride film 63 is formed. However, there is no problem that the device characteristics deteriorate. Further, since the inside of the groove which is not filled with the silicon nitride film 63 is filled with the silicon oxynitride film 64 having a high insulating property, these insulating films as a whole have sufficient insulating characteristics for filling the groove. Function as.
Further, the influence of the stress caused by the difference between the thermal expansion coefficient of the silicon substrate 61 and that of the silicon oxynitride film 64 on the silicon substrate 61 is reduced as compared with the silicon nitride film 63.

Thus, according to this embodiment, by using the double-layered trench-filling insulating film of the silicon nitride film 63 having a small stress and the silicon oxynitride film 64 having a high insulating property,
It is possible to secure sufficient insulation characteristics and prevent deterioration of element characteristics due to stress concentration.

The present invention is not limited to the above embodiment. For example, in the second, fifth, and seventh embodiments, oxygen gas is used to control the characteristics of the groove-filling insulating film, which is the source gas, but other gases may be used. For example,
The etching rate may be increased by implanting hydrogen ions. In addition, various modifications can be made without departing from the scope of the present invention.

[0056]

As described above in detail, according to the present invention, the trench is filled with the double-structured insulating film including the first insulating film having a small film forming stress and the second insulating film having a high insulating property. As a result, it is possible to prevent the occurrence of a substrate defect due to a decrease in the element isolation capability and a stress, and it is possible to obtain an element isolation region that can sufficiently cope with future miniaturization of UlSI.

[Brief description of drawings]

FIG. 1 is a process sectional view showing a method for forming an element isolation region according to a first embodiment of the present invention.

FIG. 2 is a process sectional view of a first half showing a method for forming an element isolation region and a gate electrode according to a second embodiment of the present invention.

FIG. 3 is a process sectional view of the latter half showing a method for forming an element isolation region and a gate electrode according to a second embodiment of the present invention.

FIG. 4 is a characteristic diagram showing a relationship between an ion implantation amount and a current.

FIG. 5 is a process sectional view showing a method of forming an element isolation region according to the third embodiment of the present invention.

FIG. 6 is a process cross-sectional view showing a method for forming an element isolation region according to the fourth embodiment of the present invention.

FIG. 7 is a sectional view showing the structure of an element isolation region according to a fifth embodiment of the present invention.

FIG. 8 is a process sectional view of the first half showing a method for forming an element isolation region according to a sixth embodiment of the present invention.

FIG. 9 is a process sectional view of the latter half showing a method for forming an element isolation region according to a sixth embodiment of the present invention.

FIG. 10 is a process sectional view showing a method for forming an element isolation region according to a seventh embodiment of the present invention.

FIG. 11 is a diagram for explaining a conventional method for forming an element isolation region.

FIG. 12 is a characteristic diagram showing the relationship between the Si / N composition ratio and film formation stress.

FIG. 13 is a characteristic diagram showing the relationship between the N / Si composition ratio and the current density.

[Explanation of symbols]

1, 11, 21, 31, 41, 51, 61 ... Silicon substrate, 2 ... 12, 15, 22, 23, 25, 32, 33,
35, 42, 43, 44, 52, 54, 57, 58, 5
8a, 58b, 62 ... Silicon oxide film, 3, 4, 16,
26, 26a, 36, 36a, 36b, 53, 63 ... Silicon nitride film, 13, 18, ... Polycrystalline silicon film, 1
4, 24, 27, 34, 55 ... Photoresist, 17,
45, 45a, 45b, 64 ... Silicon oxynitride film, 1
9 ... Element isolation region, 20 ... Gate electrode.

Claims (4)

[Claims] 1. A groove formed in a silicon substrate, and at least one element of nitrogen and oxygen and silicon are main components,
A first insulating film provided on at least the bottom of the groove;
A second insulating film which contains at least one element of nitrogen and oxygen and silicon as a main component and fills the groove in which the first insulating film is provided, and occupies in the second insulating film. A semiconductor device, wherein the ratio of silicon is smaller than that of the first insulating film. 2. A step of forming a groove in a silicon substrate, and depositing a first insulating film containing silicon and at least one element of nitrogen and oxygen as a main component on the silicon substrate by using a CVD method. A step of covering the bottom of the groove with the first insulating film, and at least one element of nitrogen and oxygen and silicon are contained as main components in the film on the silicon substrate using a CVD method. Depositing a second insulating film having a silicon ratio smaller than that of the first insulating film to fill the inside of the groove; and etching the first and second insulating films to form the groove A step of leaving the first and second insulating films left inside, and a method of manufacturing a semiconductor device. 3. A step of forming a groove in a silicon substrate, and a step of depositing an insulating film containing at least one element of nitrogen and oxygen and silicon as a main component on the entire surface of the silicon substrate to fill the groove. A step of performing a heat treatment on the insulating film after ion-implanting the insulating film, and a step of etching the insulating film to leave the insulating film inside the groove. Method of manufacturing semiconductor device. 4. A step of forming a groove having a depth ratio with respect to an opening width of a predetermined value or more in a silicon substrate; and a step of forming at least one element of nitrogen and oxygen and silicon on the silicon substrate by using a CVD method. A step of depositing an insulating film as a main component so that a ratio of silicon at a bottom portion of the groove is higher than a ratio of silicon at a portion above the bottom portion, and filling the groove with the insulating film; And leaving the insulating film inside the groove.