JPH05304105A - Fabrication of semiconductor device - Google Patents

Abstract

PURPOSE:To protect an element against electrostatic breakdown by employing such mask as the part to be removed of photoresist film reaches continuously to the end of wafer in ion implantation. CONSTITUTION:Dummy exposure with no pattern is performed at the area, on a wafer 2 other than effective chip area 1 and then non-implanting areas of individual chip areas in the effective chip area 1 are covered with a photoresist film 6. When a pattern surrounded by photoresist removed parts 5 is exposed and developed, a pattern is obtained wherein the photoresist removed parts 5 and the parts from which the photoresist film is removed through dummy exposure extend continuously upto the wafer end. When such mask is employed in ion implantation, charges produced in the photoresist film through ion implantation pass through a silicon oxide film 14 and a scribe line area 11 and reach the end of the wafer 2 thence delivered to the outside through a clamp part of ion injector. Consequently, elements are protected against breakdown resulting in the enhancement of reliability of semiconductor device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of patterning a photoresist film before ion-implanting a semiconductor wafer.

[0002]

2. Description of the Related Art A conventional method for patterning a photoresist film which serves as a mask for ion implantation in an ion implantation step which is one of manufacturing steps of a semiconductor device will be described. First, a photoresist is applied to the entire surface of a silicon wafer (hereinafter simply referred to as a wafer) by a spin coater. There are two types of photoresist film, a positive type in which the exposed portion is soluble in the solvent and a negative type in which the exposed portion is insoluble. Here, the case of using the positive type will be described.

A wafer coated with a photoresist is exposed to light through a glass mask (hereinafter, referred to as a reticle) on which a pattern serving as a mask at the time of ion implantation to be transferred is drawn, and then exposed to light to become soluble. The patterning of the photoresist film is completed through a developing process in which the photoresist film is dissolved in a solvent and removed to form a pattern.

In order to realize fine processing, in a recent exposure process, a g-line of a wavelength of 436 nm of a mercury lamp or 365 n is used.
It is general to use light of a short wavelength having a high resolution of the pattern of m i-line. Further, using a glass mask having the same size as the pattern on the wafer, the same-size exposure is used to project the pattern on the wafer as it is, and a reticle having a pattern 5 or 10 times as large as the pattern on the wafer is used. There is reduction exposure in which this reticle pattern is reduced by a lens system and projected onto a wafer. However, the minimum size that can be transferred by equal-magnification exposure is about 2 to 3 μm, and in the recent manufacturing of semiconductor devices in which the minimum size is 1 μm or less, reduction exposure is generally used because of its excellent precision and resolution. . In the reduction exposure, the area that can be exposed is about 20 mm due to the restriction of the optical system. Therefore, after exposing one portion on the wafer, the pitch is moved according to the chip size and the exposure is repeated. At this time, the exposure is not performed at the position where the chip is chipped in the peripheral portion of the wafer. This is to stop unnecessary exposure and reduce the number of exposures per wafer to improve the throughput of the exposure apparatus.

Thus, in the conventional exposure method, as shown in FIG. 5, the effective chip region 1 is formed in the central portion, and the peripheral portion of the wafer 2 is covered with the photoresist film 6B in the unexposed region. .

[0006]

According to this conventional method for patterning a photoresist film before ion implantation, FIG.
As shown in, the peripheral portion of the wafer 2 is covered with the photoresist film 6B. Further, in each chip of the effective chip region 1, the region to be ion-implanted may be the photoresist removal portion 5, which may be surrounded by the photoresist film 6A. If the ion implantation is performed in this state, charges generated on the surface of the wafer 2 by the ion implantation are accumulated in the photoresist films 6A and 6B due to their surface conduction being interrupted. For this reason, destruction and deterioration of elements due to electrostatic discharge, especially MOS
There is a problem that the film quality of the gate insulating film of the type transistor is deteriorated.

Incidentally, the surface potential of a wafer in which the entire surface of the wafer is covered with a photoresist film, a polysilicon film, and a silicon oxide film is accelerated by arsenic at an acceleration energy of 70 ke.
As shown in FIG. 6, when the silicon oxide film is 1, the polysilicon film is 2, the photoresist film is 7, and the photoresist film is 7 and the surface conductivity of the photoresist film is as shown in FIG. It was confirmed that the degree was low.

[0008]

A method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device in which a mask made of a photoresist film is formed on a semiconductor wafer and then ion implantation of impurities is performed. The removed portion of the constituent photoresist film is continuously formed up to the end portion of the wafer through the scribe line region.

It is generated on the wafer surface during ion implantation by utilizing the fact that the surface conductivity of the polysilicon film or the silicon oxide film exposed in the region where the photoresist film is removed is higher than that of the photoresist film. It is possible to eliminate the destruction of the element due to the charge by guiding the generated charge to the edge of the wafer and letting it escape through the wafer clamp part of the ion implantation apparatus.

[0010]

Embodiments of the present invention will now be described with reference to the drawings. 1 and 2 are plan views of a semiconductor chip and a wafer for explaining an embodiment of the present invention.

A device region 10 and a scribe line region 11 are formed on a semiconductor substrate. An N-type impurity diffusion region 12 and a P-type impurity diffusion region 13 are set in the element region 10. A method of forming a mask in the case of implanting N-type impurities into the N-type impurity diffusion region 12 will be described. The mask made of the photoresist film 6 is formed only on the P-type impurity diffusion region 13 which adversely affects the device characteristics when N-type impurities are introduced. That is, photolithography is performed on the thick silicon oxide film 14 that connects the N-type impurity diffusion region 12 for introducing the N-type impurity and the scribe line region 11 and does not affect the device characteristics even by the implanted N-type ions. A mask made of a resist film is not formed. The entire wafer will be described below.

As shown in FIG. 2, pattern-free blank exposure is performed except for the effective chip area 1 on the wafer 2. Thereafter, in the individual chip areas of the effective chip area 1, non-implanted areas are formed by the photoresist film 6. cover. Then, when the pattern surrounded by the photoresist removing portion 5 is exposed and developed, the portion where the photoresist film is removed by the photoresist removing portion 5 and the blank exposure region 4 becomes a pattern in which all the portions up to the wafer edge are connected. Although the blank exposure is performed first here, it does not matter which of the blank exposure and the exposure of the effective chip area comes first.

When ions are implanted using the mask having the above structure, the charges generated in the photoresist film 6 by the ion implantation reach the end of the wafer 2 through the silicon oxide film 14 and the scribe line region 11. Since it is led out from the clamp part of the ion implanter, the element is not destroyed unlike the conventional case. For example, when the amount of electric charge until the gate insulating film of the MOS diode is destroyed is measured by the constant current TDDB method under the condition of the injection current density of 0.1 A / cm ² , the present embodiment shows that compared with the conventional case. It has been confirmed that the amount of electric charge is doubled and the reliability of the semiconductor device is improved.

FIG. 3 shows the exposure of the chip area up to the edge of the wafer 2. This example has an advantage that it is not necessary to perform the blank exposure as compared with the case of FIG.

In FIG. 4, the peripheral exposure area 7 is changed to the effective chip area 1 by the developing device having the peripheral exposure function at the edge of the wafer 2.
It is provided so as to be connected to the photoresist removal portion of. In this example, the number of exposures per wafer can be reduced as compared with the previous example, so that the throughput of the exposure apparatus can be improved.

[0016]

As described above, according to the present invention, by performing ion implantation using a mask in which the removed portion of the photoresist film reaches the edge of the wafer continuously, the exposed photoresist removed area and the ion implantation apparatus are exposed. Since the wafer clamp portion is connected at the wafer end portion at the time of ion implantation and charges generated on the wafer surface can be released, it has an effect of preventing electrostatic breakdown of elements and deterioration of reliability.

[Brief description of drawings]

FIG. 1 is a plan view of a semiconductor chip for explaining an embodiment of the present invention.

FIG. 2 is a plan view of a wafer for explaining an embodiment of the present invention.

FIG. 3 is a plan view of a wafer for explaining an embodiment of the present invention.

FIG. 4 is a plan view of a wafer for explaining one embodiment of the present invention.

FIG. 5 is a plan view of a wafer for explaining a conventional example.

FIG. 6 is a diagram showing a surface potential at the time of ion implantation depending on a wafer surface state.

[Explanation of symbols]

 1 Effective Chip Area 2 Wafer 4 Empty Exposure Area 5 Photoresist Removal Section 6, 6A, 6B Photoresist Film 7 Peripheral Exposure Area 10 Element Area 11 Scribing Line Area 12 N-type Impurity Diffusion Area 13 P-type Impurity Diffusion Area 14 Silicon Oxide Film

Claims (1)

[Claims] 1. A method of manufacturing a semiconductor device, wherein a mask made of a photoresist film is formed on a semiconductor wafer and then ion implantation of impurities is performed, wherein a removed portion of the photoresist film forming a pattern of the mask has a scribe line region. A method of manufacturing a semiconductor device, characterized in that it is continuously formed up to the edge of the wafer.