JPH0530342Y2 - - Google Patents

Description

[Detailed Description of the Invention] (Industrial Application Field) The present invention relates to a chip-type multilayer capacitor having three terminals.

(Prior Art) Chip capacitors and three-terminal capacitors have conventionally been generally used to remove high-frequency noise.

As shown in FIG. 3, a chip capacitor is made by laminating rectangular dielectric sheets 1 into a chip shape, and electrodes (not shown) formed on these dielectric sheets 1 are alternately connected to terminal electrodes 2 and 3. It has a drawn out configuration.

In addition, as shown in FIGS. 4a and 4b, the three-terminal capacitor has electrodes 5 and 6 formed on both main surfaces of a disk-shaped dielectric plate 4, respectively, and the electrode 5 has a U-shaped shape. The curved conductive wire 7 is soldered, one conductive wire 8 is soldered to the electrode 6, and the outside of the dielectric plate 4 is covered with an insulating exterior resin (not shown). In this three-terminal capacitor, both legs 7a, 7b of the conducting wire 7 and the conducting wire 8 are used as the terminals 7a, 7b, and 8, respectively, and as shown in FIG. The inductance La of the leg 7a is between the terminal 7b and the electrode 5, and the inductance Lb of the leg 7b is between the terminal 7b and the electrode 5.
However, there are also electrodes 5 and 6 between the electrode 5 and the terminal 8.
The capacitances C between the two have equivalent circuits connected to each other.

By the way, the chip capacitor shown in Fig. 3 has a small shape and is easy to mount on a printed circuit board, etc., but it is a two-terminal type, and the chip capacitor shown in Fig. 4a and 4
Compared to the three-terminal capacitor shown in Figure b, the noise removal effect was lower.

On the other hand, in the three-terminal capacitors shown in FIGS. 4a and 4b, as can be seen from FIG. 4c, the conductor 7
Because of the inductances La and Lb of both leg portions 7a and 7b, the noise removal effect is great, but as the capacitance C becomes larger, the diameter of the dielectric plate 4 becomes larger and its shape becomes larger. Furthermore, compared to chip capacitors, mounting on a printed circuit board or the like is more troublesome.

(Purpose of the invention) The present invention was made in view of the above-mentioned circumstances regarding capacitors used for noise removal, etc., and the purpose is to provide a three-terminal type chip capacitor with improved noise removal characteristics. .

(Structure of the invention) For this reason, the present invention has a dielectric sheet having electrodes drawn out on both sides of a cut cut from one side toward the other side, and a dielectric sheet having electrodes drawn out on both sides of a cut cut from one side to the other side. The present invention is characterized in that three terminal electrodes are formed by alternately stacking dielectric sheets having different electrodes with their notches aligned, and connecting the lead-out portions of these electrodes. The inductance of the extraction electrode portions of the electrodes drawn out on both sides of the notch in the dielectric sheet is determined by the shape and dimensions of these extraction electrode portions, and this inductance prevents noise from passing through.

(Effect of the invention) According to the invention, the electrodes formed on the dielectric sheet are drawn out through the electrode extraction parts formed on both sides of the dielectric sheet. The inductance component of the electrode lead-out portion prevents the passage of noise, and it is possible to obtain a three-terminal type multilayer capacitor that has excellent noise removal characteristics and is easy to mount on a printed circuit board or the like.

(Embodiments) Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

The multilayer capacitor shown in FIGS. 1a and 1b has a dielectric sheet 11 shown in FIG.
The dielectric sheets 12 shown in FIG. 1 are alternately laminated in a chip shape.

The dielectric sheet 11 has a notch 11c cut from one side 11a toward the other side 11b opposite to this one side 11a. An electrode 13 having lead electrode portions 13a and 13b drawn out on both sides of the notch 11c is formed on one main surface of the dielectric sheet 11.

On the other hand, the dielectric sheet 12 is also
The other side 12b which has exactly the same dimensions and shape as 1 and is opposite to this one side 12a from one side 12a.
It has a notch 12c cut toward. One main surface of this dielectric sheet 12 has the above-mentioned side 1
An electrode 14 drawn out to 2b is formed.

The dielectric sheets 11 and 12 have their electrodes 13 and 14 facing upward, and the notch 1
1c and 12c are aligned and stacked in a chip shape. This lamination consists of dielectric sheets 11 and 12.
This is carried out in the state of raw ceramic sheets, and in the process of firing these raw ceramic sheets, dielectric sheets 11 and 12 are partially melted and bonded to each other. In addition, the electrode 13 of the uppermost dielectric sheet 11
A cover sheet 15 having the same dimensions and shape as the dielectric sheet 11 is laminated on the extraction electrode portions 13a and 13b, and is bonded to the dielectric sheet 11 located below in the firing process. ing.

The chip-shaped unit 1 is made by laminating the cover sheet 15 and the dielectric sheets 11 and 12 as described above.
6 has a first terminal electrode 17a and a second terminal electrode 17.
b and a third terminal electrode 17c are formed.

These first terminal electrodes 17a and second terminal electrodes 17
b and the third terminal electrode 17c, the first terminal electrode 17a and the second terminal electrode 17b are connected to the dielectric sheet 1.
one side 11a of 1 and one side 1 of dielectric sheet 12
2a are formed on the two end faces of the unit 16, respectively.

On the other hand, the third terminal electrode 17c is connected to the dielectric sheet 11
Other side 11b and other side 12 of dielectric sheet 12
It is formed on the end face of the unit 16 formed by b.

The first terminal electrode 17a is connected to the dielectric sheet 11
The lead electrode parts 13a of the electrodes 13 are connected to each other at their tips, and the second terminal electrode 17b is connected to the lead electrode parts 13a of the electrodes 13.
The other four extraction electrode portions 13b are connected to each other at their tips. Further, the third terminal electrode 1
7c connects the electrodes 14 of the dielectric sheet 12 to each other on the side 12b of the dielectric sheet 12.

In this way, the electrode 13 formed on the dielectric sheet 11 can be
are respectively drawn out to the first terminal electrode 17a and the second terminal electrode 17b through these lead-out electrode portions 13.
Due to the inductances a and 13b have, a chip type multilayer capacitor having an equivalent circuit similar to that shown in FIG. 4c can be obtained.

According to the embodiment described above, the extraction electrode part 1
The inductances of 3a and 13b are determined by the shapes and dimensions of these extraction electrode parts 13a and 13b, and by making the shapes and dimensions of extraction electrode parts 13a and 13b appropriate, a multilayer capacitor with good noise removal characteristics can be obtained. Obtainable.

Also, unit 16 is added to the silver paste (not shown).
The first terminal electrode 17a and the second terminal electrode 17b can also be easily formed by using a method such as dipping the silver paste and baking the deposited silver paste.

[Brief explanation of the drawing]

FIG. 1a is a perspective view of a multilayer capacitor according to the present invention, FIG. 1b is a sectional view taken along the line - in FIG. 1a, and FIGS. 2a and 2b are plan views of two dielectric sheets, respectively. Figure 3 is a perspective view of a conventional multilayer capacitor, Figures 4a and 4b are explanatory diagrams showing the internal structure of a conventional three-terminal capacitor, and
Figure c is an equivalent circuit diagram of a three-terminal capacitor. 11, 12...Dielectric sheet, 11a, 12a
...One side, 11b, 12b...Other side, 13, 14
... Electrode, 13a, 13b ... Extraction electrode part, 17
a...first terminal electrode, 17b...second terminal electrode,
17c...Third terminal electrode.

Claims (1)

[Scope of utility model registration request] A first dielectric sheet having a notch cut from one side toward the other side opposite to this one side, and an electrode formed on the main surface thereof having an extraction electrode portion drawn out on both sides of the notch. , a second dielectric sheet having the same shape as this dielectric sheet and having electrodes drawn out on the side opposite to the other side on the main surface thereof are alternately arranged with their notches coincident with each other. A first terminal electrode and a second terminal electrode are respectively formed on the end face of the laminate including the lead-out end of the lead-out electrode portion, and the second dielectric sheet is laminated with the lead-out electrode. A multilayer capacitor characterized in that a third terminal electrode for interconnecting these electrodes is formed on an end face of the multilayer body where the lead-out ends of the electrodes are located.