JPH05300795A - Control circuit for driving motor - Google Patents

Abstract

PURPOSE:To simultaneously operate two motor driving circuits by providing an interlock circuit for inhibiting an operation of the driving circuit in which a CPU not selected by a selection switch is not concerned. CONSTITUTION:Motor drive controllers 1, 51 for motor-driven power seats having motors 6, 56 for displacing a driver's seat and an assistant driver's seat of a vehicle in sliding directions have selection switches 5 for selecting manual or automatic operation for one of the driver's seat and the assistant driver's seat. In this case, a sub-driving circuit 20 of another system from a main driving circuit 2 connected to a CPU 2 is provided in the controller 1 (similar in the 52). The operation of the sub-driving circuit 20 is restricted by an interlock circuit which includes a transistor 19 to be turned ON only when the other input terminal of a NOR gate 22 is grounded by the switch 5 and a state of an output terminal of FF24 becomes a low level.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a motor drive control circuit, and more particularly to a motor drive control circuit of the type for controlling the drive of a motor according to the states of manual and automatic switches.

[0002]

2. Description of the Related Art Conventionally, there is a drive control circuit capable of selectively and manually operating a motor. For example, in a drive control circuit of an electric power seat for an automobile, a slide amount of the seat is manually set. In some cases, the motor control for displacing each part of the seat is controlled according to each switch signal of manual and automatic regeneration in order to adjust the position automatically or to automatically regenerate the stored state. In such a drive control circuit for an electric power seat for a vehicle, there is a drive control circuit for operating a motor drive relay by an on / off control signal via a CPU, but manual operation is possible when the CPU is abnormal. Desirably, for that purpose, there is a relay coil and a manual switch which are connected without going through the CPU.

For example, when the drive control circuit having the above-mentioned structure is installed on the driver's seat side and the passenger's seat side, a selection switch for selecting which seat is to be adjusted is provided for operation. The switch unit is placed between both seats to share the switch.

However, when each switch is shared as described above, the selection signal from the selection switch is sent to the CPU.
Since it is designed to determine which seat is selected, it is impossible to determine the seat selected when the CPU runs out of control, and the seat position is adjusted manually. In this case, two seats may be adjusted at the same time.

[0005]

SUMMARY OF THE INVENTION In view of the problems of the prior art as described above, the main object of the present invention is to provide a motor drive control circuit capable of manually adjusting individual seats even when the CPU runs out of control. To do.

[0006]

According to the present invention, there is provided a motor drive in which at least two motor drive circuits controlled by a CPU are selected by a selection switch and operated by a common operation switch. The control circuit, wherein the C is not selected by the selection switch
This is achieved by providing a motor drive control circuit characterized by having an interlock circuit that inhibits the operation of a motor drive circuit of a different system from the PU.

[0007]

According to this structure, the interlock circuit inhibits the operation of the motor drive circuit not involved by the CPU not selected by the selection switch, so that only the motor drive circuit selected by the selection switch is allowed to operate. At the same time, each motor drive circuit does not operate.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will now be described in detail with reference to the accompanying drawings. FIG. 1 is an electric circuit diagram showing an outline of a motor drive control circuit of an electric power seat for an automobile to which the present invention is applied. The CPU 2 of the drive control circuit 1 includes, for example, an automatic operation switch 3 provided between a driver's seat and a passenger seat (not shown), a manual operation switch 4 including a two-position selection switch, and a selection switch 5. The respective input terminals a, b, c, d connected to the switching contact terminals are respectively connected. Further, both terminals of the motor 6 for displacing the seat in the sliding direction are connected to the output terminals ef of the drive control circuit 1. The automatic operation switch 3
It is for automatically displacing the seat to a set position stored in the CPU 2, and the CPU 2 controls the motor 6 by inputting an automatic operation signal from the switch 3. The manual operation switch 4 is for adjusting the slide amount of the seat by manual operation, for example. Then, as will be described later, the selection switch 5 is for selecting whether to manually or automatically operate one of the driver seat side seat and the passenger seat side seat.

The motor 6 is provided with a pulse generator (not shown) for detecting the number of rotations of its rotary shaft, and the pulse signal is input to the CPU 2. CPU2
Counts the pulse signal and stores the count number, and outputs a drive control signal to the output terminal O1 so as to displace the seat to a position based on the stored value during automatic operation.
The output from O2 is output to the motor 6. Also,
In the manual operation, the motor 6 is driven by the output of the output terminals 01 and 02 of the CPU 2 by the input of each contact signal, and the CP
U2 counts the pulse signal according to the contact signal.

The internal structure of the drive control circuit 1 will be described below. The bases of the transistors 7 and 8 are connected to the output terminals O1 and O2 of the CPU 2, respectively. The collectors of the transistors 7 and 8 are connected to the power supply terminal Vo through the coils of the relays 10 and 11, respectively. Further, the emitters of the transistors 7 and 8 are connected to the collector of the common transistor 9 and are grounded when the transistor 9 is in the ON state.
In this way, the main drive circuit 12 as a motor drive circuit controlled by the CPU 2 is configured.

The common terminals of the contacts of the relays 10 and 11 are connected to the terminals of the motor 6 via the output terminals e and f. The relays 10 and 11 ground the terminals of the motor 6 in the non-excited state, and the power supply terminal Vo in the excited state.
It is designed to supply the voltage from.

A watchdog terminal WD1 of the CPU2 is connected to a watchdog terminal WD2 of a watchdog IC 23 as a watchdog timer circuit and a clock terminal CLK of a flip-flop 24, and a constant power source is provided via a resistor 25. It is connected to the terminal Vc. It should be noted that the input terminal D of the flip-flop 24 and the preset bar terminal PR (superscript bar) are the constant power supply terminal Vc.
It is connected to the. The reset bar terminal RST1 (upper bar) of the CPU2 is connected to the constant power supply terminal Vc via the resistor 26, and the watchdog IC2
3 is connected to the reset bar terminal RST2 (upper bar) and the clear bar terminal CLR of the flip-flop 24 (upper bar), respectively. Flip flop 2
The output terminal Q of No. 4 is connected to one input end of the NOR gate 22 and the base of the transistor 9.

The input terminal d connected to the selection switch 5 is connected to the constant power supply terminal Vc via the resistor 21 and the input terminal I6 of the CPU 2. Further, the input terminal d is connected to the other input end of the NOR gate 22, and the base of the transistor 19 is connected to the output end of the NOR gate 22.

The input terminals b and c connected to the above-mentioned manual operation switch 4 respectively correspond to the respective resistances 13 and 1.
Is connected to the constant power supply terminal Vc via
It is connected to each input terminal I4 and I5 of PU2,
Further, they are connected to the respective bases of the transistors 17 and 18 via the NOT gates 15 and 16, respectively. The collectors of these transistors 17 and 18 are the same as the collectors of the transistors 7 and 8 described above, respectively.
1 is connected to each coil. Also, the transistor 1
Each of the emitters 7 and 18 is connected to the collector of a common transistor 19 and is grounded when the transistor 19 is on. In this way
A sub-driving circuit 20 as a motor driving circuit of a different system from the main driving circuit 12 controlled by the CPU 2 is configured. Further, the transistor 19 is turned on only when the other input end of the NOR gate 22 is grounded by the selection switch 5 and the state of the output terminal of the flip-flop 24 becomes low level (L). Has been done. In this way, an interlock circuit that restricts the operation of the sub drive circuit 20 is configured.

The drive control circuit 1 having the above-described structure acts as a drive control circuit 1 for controlling the motor 6 for displacing the seat on the driver's seat side in the sliding direction, for example, the seat on the passenger seat side. Since the drive control circuit 51 for controlling the motor 56 for displacing in the sliding direction has the same configuration as the drive control circuit 1, a code obtained by adding 50 to the code of the drive control circuit 1 is given, and the detailed description thereof is given. The description is omitted.

The drive control circuit 1 and the drive control circuit 51 are
Automatic and manual operation switches 3, 4 and selection switch 5
Are commonly used as input means, and the selection switch 5 is used to select which drive control circuit is to be operated. For example, the drive control circuit 1
Is selected and the input terminal I6 of the CPU2 and the NOR gate 2 are selected.
When the other input terminal of 2 is grounded, the operation of the drive control circuit 1 is permitted and the operation of the drive control circuit 51 is prohibited, while the drive control circuit 51 is selected and CP
When the input terminal I6 of U52 and the other input end of the NOR gate 72 are grounded, the operation is inverted and the operation of the drive control circuit 51 is permitted, and the operation of the drive control circuit 1 is prohibited. Is configured.

Next, an operation procedure based on the drive control circuit of the present invention will be described below with reference to the waveform diagram shown in FIG. First, the selection switch 5 is used to select I6 and N of the CPU 2.
The case where the other terminal of the OR gate 22 is grounded, that is, the case where the drive control circuit 1 is selected will be described. The watchdog IC 23 detects the abnormality of the CPU 2 by detecting the abnormality of the predetermined clock pulse output from the watchdog terminal WD1, and when the normal pulse is input to the watchdog terminal WD2 of the watchdog IC 23, A high level (H) signal is output from the reset bar terminal RST2 (upper bar).
At this time, since the input terminal D, the preset bar terminal PR (superscript bar) and the clear bar terminal CLR (superscript bar) are in the H level, the flip-flop 24 receives the clock pulse signal input to the clock terminal CLK. The output terminal Q becomes H level by being triggered by the rising edge of. The other input end of the NOR gate 22 is at L level because it is grounded, but the output end is at L level because one input end is at H level. Become. Therefore, when the CPU 2 is normal, the transistor 9 is on and the transistor 19 is off, so that the transistors 7 and 8 are in an operable state and the motor 6 is driven only by a command from the CPU 2.

Next, if a clock pulse is not output from the watchdog terminal WD1 of the CPU2 due to a program runaway or a momentary interruption of the input voltage, the watchdog IC
23 reset bar terminal RST2 (upper bar) to L
Since the level signal is output, the CPU 2 is reset by the L level signal. At this time, the flip-flop 24 receives the L level signal from the reset bar terminal RST2 (bar with superscript) at its clear bar terminal CLR (bar with superscript), so that the state is inverted and the output terminal Q is at L level. Becomes Therefore, NOR gate 2
Since both input terminals of 2 become L level, the state of the output terminal is inverted and becomes H level. Therefore, when the CPU 2 is abnormal, the transistor 19 is turned on and the transistor 9 is turned off. In this case, the transistors 17 and 18 are in the operable state, and the CPU 2
In response to the command from, the motor 6 is not driven, but the motor 6 is driven according to each signal from the manual switch 4.

As described above, when the CPU 2 is normal, the signals from the automatic and manual switches 3 and 4 are input to the CPU 2, and the motor 6 is appropriately driven by the CPU 2 in accordance with the signals. That is, when the automatic operation switch 3 is operated, the state of the seat at the time of manual operation is changed from the calculated value by the input of the pulse signal from the motor 6 to the corresponding position C
The sheet is stored in the PU 2 and the sheet is automatically reproduced in the stored state. Then, when the CPU 2 is abnormal, the CPU 2 is reset, but since the transistors 17 and 18 become operable as described above, the CP 2
Manual operation is possible even when U2 is abnormal.

In the above state, the drive control circuit 51 is prohibited from operating. That is, since the input terminal I6 of the CPU 52 is not grounded, this CPU
A signal for turning on each of the transistors 57 and 58 is not output from 52, and since the other input end of the NOR gate 72 is in the H level state, the NOR gate 72 is irrespective of the signal level state of the one input end. The output terminal of the gate 72 is at the L level. Therefore, the transistor 69 cannot be turned on, and even if the manual operation switch 4 is operated, the auxiliary drive circuit 70 cannot operate,
Therefore, the motor 56 is not driven.

Even when the drive control circuit 51 is selected by the selection switch 5, the operation is the same as when the drive control circuit 1 is selected, and the detailed description thereof will be omitted.

As described above, even when the CPUs 2 and 52 cannot normally operate, the sub-driving circuits 20 and 70 operate to enable the manual operation, and further, the sub-driving circuits. When the manual operation is performed by, the sub-driving circuits that are not selected by the selection switch 5 are interlocked, so that the switches 3, 4 and 5 as the input means are operated by the two driving control circuits 1 and 51. Even if shared, the two drive control circuits do not operate at the same time.

Although the drive control of the motor for displacing the seat in the sliding direction has been described in the present embodiment, the seat can be displaced in the reclining direction by using a known technique. Further, it is possible to drive and control two motors by combining these. It is also possible to set a plurality of seat storage positions by adding the automatic operation switch 3 and securing a memory corresponding to the automatic operation switch 3 in each of the CPUs 2 and 52.

[0024]

As is apparent from the above description, according to the motor control circuit of the present invention, even if at least two motor drive circuits are operated by the common operation switch, the motor drive is not selected by the selection switch. Since the operation of the circuit can be surely prohibited, the two motor drive circuits do not operate at the same time. Therefore, it is possible to reduce the number of switch units such as operation switches that should normally be provided for each motor drive circuit, so that the product cost can be reduced.

[Brief description of drawings]

FIG. 1 is an electric circuit diagram showing an outline of a motor control circuit to which the present invention is applied.

FIG. 2 is a waveform diagram showing signal levels at respective terminals of each IC shown in FIG.

[Explanation of symbols]

1, 51 Drive control circuit 2, 52 CPU 3 Automatic operation switch 4 Manual operation switch 5 Selection switch 6, 56 Motor 7-9, 17-19, 57-59, 67-69 Transistor 10, 11, 60, 61 Relay 12 , 62 main drive circuit 13, 14, 21, 63, 64, 71, 25, 75 resistance 15, 16, 65, 66 NOT gate 20, 70 sub drive circuit 22, 72 NOR gate 23, 73 watchdog IC 24, 74 flip flop

Claims (1)

[Claims] 1. A motor drive control circuit in which at least two motor drive circuits controlled by a CPU are selected by a selection switch and operated by a common operation switch, which is not selected by the selection switch. A motor drive control circuit having an interlock circuit for inhibiting the operation of a motor drive circuit of a different system from the CPU.