JP2578690B2 - Motor control circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] <Industrial Application Field> The present invention relates to a motor control circuit, and in particular, to a motor of a type that is controlled using a CPU in response to manual and automatic drive signals. Control circuit.

<Prior Art> Conventionally, in a control circuit using a CPU, there is a control circuit in which the CPU is reset when an input voltage drops due to an instantaneous interruption or when a program runs away. For example, in a control circuit of an electric power seat for a vehicle, control for adjusting a sliding amount, a reclining amount, and the like of the seat can be performed via a CPU according to each of manual and automatic regeneration drive signals. However, this control circuit has a problem that all the functions do not work when the CPU is reset.

At the time of resetting, it is desirable to enable manual operation. For this purpose, it is possible to directly connect a motor drive relay coil and a manual switch. However, for example, in the case where the position of each adjustment portion of the seat is obtained by calculating from the number of rotation pulses of the shaft of the corresponding motor, when the information of each switch is monitored in a cycle, which switch is turned on. The delay circuit is provided between the manual switch and the relay coil in order to take into account the time delay from the time when the switch is turned on to the time when the pulse number count can be started since the pulse count is started after determining whether Needed. In addition, since the manual switch and the relay coil are directly connected to the operation for the manual operation during the automatic reproduction, it is necessary to consider a timing adjustment by a delay circuit or a program processing or addition of a circuit. For example, there is a problem that the circuit becomes complicated.

<Problem to be Solved by the Invention> Regarding such problems of the conventional technology, the main object of the present invention is to enable a simple circuit configuration to enable manual and automatic operation by the CPU in a normal state and to operate the CPU in an abnormal state. It is an object of the present invention to provide a motor control circuit improved to enable manual operation.

According to the present invention, a main drive circuit for driving a motor and the motor can be driven separately from the main drive circuit. A sub-drive circuit provided in parallel with the main drive circuit, a control unit having a CPU for controlling the main drive circuit according to the state of each of automatic and manual operation switches, and a watchdog output of the control unit A watchdog detection circuit for detecting the operation of the automatic and manual operation switches via the control unit when the watchdog output is normal. When the watchdog output is abnormal, the control circuit switches the drive circuit to a connected state, disables the main drive circuit, and connects the manual operation switch and the sub-drive circuit. It is achieved by providing a control circuit of the motor, characterized in that it comprises a circuit.

<Operation> In this way, when the CPU is abnormal, the main drive circuit via the control unit is not controlled, and the sub-drive circuit can be operated directly by the manual drive signal. The manual operation is possible, and the driving circuit is switched to the main driving circuit in a normal state, so that the operation of the manual driving signal via the sub-driving circuit is not performed. These operations can be performed by a combination of a watchdog circuit that determines the abnormality of the CPU and a switching circuit.

<Embodiment> Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a diagram showing a motor driving control circuit 1 of an electric power seat for a vehicle to which the present invention is applied. The CPU 2 of the control circuit 1 includes, for example, input terminals a, b, and b connected to open / close contact terminals of an automatic switch 3 provided on a sheet (not shown) and a manual switch 4 including two two-position selection switches. cd is connected respectively. The automatic switch 3 is for automatically moving the seat to a preset position stored in the CPU in advance, and the manual switch 4 is for manually adjusting, for example, the sliding amount and the reclining amount of the seat. belongs to. Both terminals of the motor 5 for displacing the sheet in the sliding direction are connected to output terminals f and g of the control circuit 1, and both terminals of the motor 6 for displacing the sheet in the reclining direction are output terminals h. -Connected to i. The CPU 2 controls the corresponding motors by inputting signals from the switches 3 and 4 to the input terminals a to e.

Each of the motors 5 and 6 is provided with a pulse generator for detecting the number of rotations of each rotating shaft, and the pulse signal is input to the CPU 2. The CPU 2 counts the pulse signal and stores the count number, and at the time of automatic operation, in order to displace the sheet to the position based on the stored value, the drive signal is output from the output terminal C1, C2, C3, C4 to the corresponding motor. Output. At the time of manual operation, a drive signal corresponding to each contact signal is output from the output terminals C1 to C4 to the corresponding motor, and the pulse signal at that time is counted.

Next, the configuration in the control circuit 1 will be described below. CPU2
The bases of the transistors T1, T2, T3, T4 are connected to the respective output terminals C1 to C4. These transistors T1 to T4
Are connected to the power supply terminal Vo via the respective coils of the relays RY1, RY2, RY3, and RY4, and each emitter is connected to the collector of the common transistor T5, and the transistor T5 is turned on. To be grounded. Thus, the main drive circuit 7 is configured.

Each common terminal of the contacts of the relays RY1 and RY2 is connected to each terminal of the motor 5 via each output terminal f and g, and each common terminal of the contacts of the relays RY3 and RY4 is connected to each output terminal h. -It is connected to each terminal of the motor 6 via i.
Each of the relays RY1 to RY4 is configured to supply the voltage from the power supply terminal Vo to the respective terminals of the corresponding motors 5 and 6 in a non-excited state while being grounded.

The input terminals b to b connected to the manual switch 4 described above.
e is a constant power supply terminal via resistors R1, R2, R3, and R4, respectively.
Vc and connected to the input terminals C5 to C8 of the CPU 2, respectively, and further, knot circuits NT1 to NT4, respectively.
Are connected to the bases of the transistors T6, T7, T8, and T9. The collectors of these transistors T6 to T9 are
Like the collectors of the transistors T1 to T4, they are connected to the coils of the relays RY1 to RY4. Further, each emitter of the transistors T6 to T9 is connected to the common transistor T1.
0, and is grounded when the transistor T10 is turned on. Thus, the sub-drive circuit 8 is configured.

The clock terminal CLK of the CPU2 has a clock terminal CK of a watchdog IC9 as a watchdog timer circuit,
The reset terminal R of the flip-flop 10 as a control switching circuit is connected to each other. The set terminal S of the flip-flop 10 is grounded, and the clock terminal CK of the watchdog IC 9 is provided via a resistor R5. The reset terminal RES of the CPU 2 is connected to the reset terminal RES of the watchdog IC 9 and the clock terminal CK of the flip-flop 10, respectively. One output terminal of the flip-flop 10 is connected to the base of the transistor T5, and the other output terminal Q is connected to the transistor T5.
Connected to T10 base.

Next, the operation procedure will be described below with reference to the time chart of FIG.

The watchdog IC 9 detects the abnormality of the CPU 2 by detecting the abnormality of the clock pulse at the clock terminal CLK. When a normal pulse is input to the clock terminal CK, the watchdog IC 9 outputs a low level ( L) A signal is output. At this time, the flip-flop 10 is reset by inputting a clock pulse from the clock terminal of the CPU 2 to its reset terminal R, the output terminal is at the H level, and the output terminal Q is at the L level. Therefore, when the CPU 2 is normal, the transistor T5 is in the off state and the transistor T10 is in the off state, so that the transistors T1 to T4 are in an operable state, and the motors 5 and 6 are driven only by the instruction from the CPU 2. Will be.

Next, when the program runs away or the input voltage
If the clock output of U2 becomes abnormal, watchdog IC9
, A reset output is output to CPU2, so that CPU2 is reset. At this time, since the high-level (H) signal from the reset terminal RES of the watchdog IC 9 is input to the clock terminal CK of the flip-flop 10, each output of the flip-flop 10 is inverted, and the output terminal is set to the L level. , Output terminal Q attains an H level. Therefore, when the CPU 2 is abnormal, the transistor T10 is turned on and the transistor T5 is turned off. In this case, the transistors T6 to T9 become operable. The motors 5 and 6 are driven according to the signals from the manual switch 4 without driving the motor 6.

As described above, when the CPU 2 is normal, signals from the automatic and manual switches 3 and 4 are input to the CPU 2, and the motors 5 and 6 are appropriately driven by the CPU 2 according to the signals. still,
In this device, the state of the seat at the time of manual operation is
When the automatic switch 3 is operated, the corresponding values are stored from the calculated values obtained by the input of the pulse signal from 6 and
The sheet is automatically reproduced to its stored state. Then, when the CPU 2 is abnormal, the CPU 2 is reset. However, as described above, the transistors T6 to T9 can be operated, so that manual operation is possible even when the CPU 2 is abnormal.

Note that, even when the CPU 2 is temporarily removed, for example, for repair of the CPU 2, manual operation is possible. Further, when the reset of the CPU 2 occurs, the transistors T1 to T4 do not operate, and even if an erroneous output is output from the CPU 2, the motors 5 and 6 are not erroneously driven.

FIG. 2 is a view similar to FIG. 1 showing a second embodiment and an embodiment according to the present invention. This second embodiment is shown below with reference to the drawings, and the same parts as those in the above embodiment are shown. Are denoted by the same reference numerals, and a detailed description thereof will be omitted.

As shown in FIG. 3, each output terminal C1 to
C4 is connected to one of the input terminals A1 to A4 of the selector 11 which is, for example, a CMOS IC, and the output terminals of the knot circuits NT1 to NT4 connected to the manual switch 4 are connected to the selector.
11 are connected to the other input terminals B1 to B4. The output terminals Q of the flip-flop 10 are connected to the switching input terminals CTLA and CTLB of the selector 11, respectively, and the output terminals Y1 to Y4 of the selector 11 are connected to the bases of the transistors T1 to T4, respectively. Have been. Also,
In the second embodiment, the emitters of the transistors T1 to T4 are grounded. The clock terminal CLK of the CPU 2 is connected to the clock terminal CK of the watchdog IC 9 and the clock terminal CK of the flip-flop 10. And CP
The reset terminal RES of the U2 is connected to the reset terminal RES of the watchdog IC 9 and the reset terminal R of the flip-flop 10.

The circuit is configured in this manner, and the selector 11 selects one of the two input terminal arrays according to the output state of the flip-flop 10, and the selected input signal The drive signals are output from the output terminals Y1 to Y4 as appropriate. When CPU2 is normal, the clock pulse of CPU2 is applied to watchdog IC9 and flip-flop 1
0 is input to both clock terminals CK, and the output terminal of the flip-flop 10 is at L level and the output terminal Q is at H level. An H level signal is input to the input terminal CTLA of the selector 11, and a drive signal corresponding to only the input signal from the input terminals A1 to A4, that is, the CPU 2 is output. On the other hand, when the CPU 2 is abnormal, the reset output of the watchdog IC 9 is input to the reset terminal R of the flip-flop 10, each output is inverted, and an H level signal is input to the input terminal CTLB of the selector 11. Switching is performed such that a drive signal corresponding to an input signal from the B1 to B4 sides, that is, an input signal from the manual switch 4 is output. Therefore, in the normal state, each of the automatic and manual controls using the CPU 2 can be performed, and the manual operation can be performed in the abnormal state, and the same effects as in the first embodiment can be obtained.

[Effects of the Invention] As described above, according to the present invention, the circuit for driving the motor is switched to the main drive circuit in a normal state, and each of automatic and manual control via the CPU can be performed.
When the CPU is abnormal, the manual switch and the auxiliary drive circuit are switched to the connected state, and the CPU can be operated directly by the manual drive signal without the intervention of the CPU. Is performed by a simple combination of a watchdog circuit for judging the abnormality of the CPU and a switching circuit, the circuit can be simplified.

[Brief description of the drawings]

FIG. 1 is a diagram showing a first embodiment of a control circuit for a vehicle power seat to which the present invention is applied. FIG. 2 is a diagram showing a time chart of the first embodiment. FIG. 3 is a diagram showing a second embodiment. 1 ... control circuit, 2 ... CPU, 3 ... automatic switch, 4
... Manual switch, 5, 6 ... Motor, 7 ... Main drive circuit, 8 ... Sub drive circuit, 9 ... Watchdog IC, 10 ...
... Flip-flops, 11 ... Selectors

Claims (1)

(57) [Claims] A main drive circuit for driving a motor; a sub drive circuit provided in parallel with the main drive circuit so as to be able to drive the motor separately from the main drive circuit; A control unit having a CPU for controlling the main drive circuit in accordance with the state of the operation switch, a watchdog detection circuit for detecting a watchdog output of the control unit, and if the watchdog output is normal, The control unit and the main drive circuit are connected to perform control according to the state of each of the automatic and manual operation switches via the control unit, and when the watchdog output is abnormal, the main drive A control circuit for a motor, comprising: a control switching circuit that disables a circuit and connects the manual operation switch and the sub-drive circuit.