JPH05300427A - Digital video special effector - Google Patents

Abstract

PURPOSE:To realize a mozaic effect and a split effect with one circuit and to realize any new effect such as a scattering effect as well. CONSTITUTION:A read address modifying part modifies the values of X and Y addresses with the outputs of function generation parts 33 and 34 to output function values corresponding to addresses (u) and (v) shifting down the digits of the X and Y addresses. Thus, since the function generation parts 33 and 34 are made variable, the plural different special effects can be easily obtained by using the same circuit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention writes video data obtained by digitizing an input video signal into a video memory according to a write address, and reads the written video data according to a read address different from that for writing. The present invention relates to a digital special effect device for outputting as, and particularly to a digital special effect device for processing a digitized video signal in real time.

[0002]

2. Description of the Related Art An example of a conventional digital image special effect device will be described with reference to FIG. In FIG. 3, 11 is a video signal input to the apparatus, and the video signal 11 is first added to the input processing unit 12. The input processing unit 12 performs PCM digitization of analog signals and separates luminance signals and color signals. Then, the output data digitized by the input processing unit 12 is written in the video memory 13 according to the addresses sequentially generated by the write address generating unit 16 in synchronization with the input video. The written video data is read according to a read address to be described later, and the output processing unit 14 synthesizes the background image signal and the luminance signal and the color signal to obtain a video signal 15 output from the device. Output. Here, the detailed configurations of the input processing unit, the video memory, the write address generating unit, and the output processing unit described above are not directly related to the present invention and are arbitrary.

In general, the special effect is realized by generating addresses in the read address generating section 17 in a different order from the write addresses. That is, in FIG. 3, if the output of the basic read address generator 18 that generates a sequential address similar to the write address is directly used as the read address of the video memory (not shown), the output video becomes the same as the input video. By changing this using the read address modification unit 19, a video output different from the input can be obtained. The effect control unit 20 is a control unit that determines the operation of the read address modification unit 19. Conventionally, as an example of this kind of address modification unit, a structure shown in FIG. 4, which is an explanatory view showing a first example (mosaic effect) of the address modification unit, is known. In FIG. 4, Xi and Yi are two-dimensional addresses of the video memory 13 and represent the positions of pixels in the horizontal and vertical directions on the video memory, respectively. This is the output of the basic read address generator 18 or the result of modifying it by an effect generating method independent of the present invention. Also, Xo and Y
o is the output address of the address modification unit in the present invention. (K) is a constant given from the effect control unit 20,
For example, the range is from 1 to 100.

Here, the address of the video memory used in the example of the address modification unit of FIG. 4 is defined as shown in FIG. 5, which is an explanatory view showing an example of the correspondence between the video memory and the XY two-dimensional address. And That is, it is assumed that a rectangular image whose address in the X direction is in the range of −h to h and whose address in the Y direction is in the range of −V to V is handled. The multiplier 21 in FIG. 4 multiplies the address Xi by the constant 1 / k and rounds off the fractional part of the result. Next, the multiplier 23 multiplies the output of the multiplier 21 and the constant k. As a result, the output address Xo changes so that it increases by k every time the input address Xi changes by k. That is, the relationship between the input address Xi and the output address Xo in the horizontal direction is as shown in FIG. 6, which is an explanatory diagram showing the relationship between the input and output addresses by the address modification according to the first example. Similarly, the vertical input address Yi
The relationship between the output address Yo and the output address Yo is also as shown in FIG. When address conversion is performed in this way, read addresses are generated only in discrete steps, so that the same pixel is read every K pixel periods in both the horizontal and vertical directions. That is, the mosaic effect of vertical and horizontal 2V / K and 2H / K sections as shown in FIG. 7, which is an explanatory view showing an example of the mosaic effect according to the first example, can be obtained. When k = 1, the input and output match.

Next, as another example, there is known a structure shown in FIG. 8 which is an explanatory view showing a second example (split effect) of the address modification section. In FIG. 8, the absolute value circuit 25 calculates and outputs the absolute value of the input horizontal address Xi. The adder 26 adds the output of the absolute value circuit 25 and the constant -S. The limiter 27 is the adder 2
Of the outputs of 6, positive numbers are output as they are, and 0 and negative numbers are limited to special values indicating "no image". In addition,
The "no image" portion is used to synthesize a background image or a single color (background color) by a known means. Further, the sign adding circuit 28 adds a sign to the output of the limiter 27 by using a sign indicating the positive or negative of the input horizontal address Xi to obtain the output address Xo. When such address conversion is performed, as shown in FIG. 9 which is an explanatory diagram showing the relationship between the input and output addresses by the address modification according to the second example, the output horizontal address is in the range of −∞ to −S as shown in FIG. Is S
Only in the negative direction, in the range from S to + ∞, only S is shifted in the positive direction, and there is no image in the range from -S to + S. That is, FIG. 10A is an explanatory diagram showing an example of the split effect according to the second example as the output image,
As shown in (b), a split effect can be obtained, which is divided in two in the horizontal direction at a distance of only 2S.

[0006]

In the conventional method described above, it is possible to generate various special effects by preparing an address modification circuit unique to each effect for an input video. In order to obtain the special effect of (1), a large number of circuit configurations are required, and therefore, there is a problem that the device scale becomes large and the cost becomes high.

[0007]

SUMMARY OF THE INVENTION The digital video special effect device of the present invention has a read address of X address and Y address.
A digit cancellation arithmetic unit that changes the address stepwise, a function generator that outputs a predetermined function value according to the arithmetic result of the digit cancellation arithmetic unit, and a read address is modified by the function value output by the function generator. By providing the partial address modification unit for controlling the function generation unit, a plurality of different effects can be realized by one circuit by changing the operation of the function generation unit.

[0008]

In the present invention, the mosaic effect and the split effect are realized by one circuit, and a new effect such as a scattering effect is also realized.

[0009]

1 is a block diagram showing an embodiment of a digital video special effect apparatus according to the present invention, showing an address modification unit. In FIG. 1, Xi and Yi are two-dimensional addresses of the video memory, which are the output of the basic read address generating unit or the result of modification thereof.
Further, Xo and Yo are outputs of the address modification unit.
The two-dimensional addresses Xi and Yi are defined as shown in FIG. Reference numeral 30 denotes a digit cancellation arithmetic unit that changes the X address and Y address of the read address in a stepwise manner.
Multiplier 31 for multiplying / mx, Y address and constant 1
It is composed of a multiplier 32 for multiplying / my. Three
Reference numerals 3 and 34 denote a function generator that outputs a predetermined function value according to the calculation result of the digit cancellation arithmetic unit 30, and 41 denotes a partial address modifier that modifies the read address by the function value output from the function generators 33 and 34. Section, a multiplier 35 that multiplies the function value output from the function generator 33 by a constant kx, an adder 37 that adds the output of this multiplier 35 to the X address, an output of the multiplier 35 and the adder 37 An address selector switch 39 for selectively outputting an output, a multiplier 36 for multiplying a function value output by the function generator 34 by a constant ky, and an adder 38 for adding the output of the multiplier 36 to a Y address. , An output selector 40 for selectively outputting the output of the multiplier 36 and the output of the adder 38.

Next, the operation of the embodiment shown in FIG. 1 will be described. First, the input address Xi and the constant mx / 1 are multiplied by the multiplier 31, so that the output of the multiplier 31 is the address u obtained by dividing the input address Xi by the constant mx.
Is obtained. Similarly, at the output of the multiplier 32, the address v obtained by dividing the input address Yi by the constant my is obtained. The multipliers 31 and 32 round the multiplication results. As a result, the input addresses Xi are assigned to the addresses u and v.
An address value obtained by removing the lower digits of Y and Yi determined by the constants mx and my is obtained. Then, the function generators 33 and 34 determine the function values for the addresses u and v so that the function values fx (u) and fy (v) corresponding to the effect described later are obtained. Here, the function generator 3
3, 34 may be composed of only an arithmetic circuit, or may be composed of a memory element in which a previously calculated function value is written. According to the latter method, even if the function value is a complicated operation and the operation is not completed within the required processing time,
Since it is possible to read the function value from the storage element in which the result is written in advance in an extremely short time, there is an advantage that the function value can be set freely. However, since the capacity of the storage element for function generation is the capacity obtained by dividing the video address by (mx × my), the minimum values of the constants mx and my are limited by the capacity of the storage element that can be prepared.

Next, the operation of the partial address modification unit 41 will be described. The multiplier 35 limits the effect by a constant kx (range 0 ≦ kx ≦ 1) given by the effect control unit. When kx = 0, the X offset amount is zero, and when kx = 1, the maximum offset determined by the function generator 33 is generated as the output of the multiplier 35. Multiplier 36
And the constant ky performs a similar function with respect to the Y offset. Then, the X and Y offset amount adders 37, 3
8 shows the calculated x and y component offset amounts as input x
And y respectively to produce the output x and y addresses. Further, the switches 39 and 4 for address selection
0 selects the offset value itself as output, or
Select the result of adding the offset value to the input address. As an example of the operation including the function generators 33 and 34, switching is performed by giving a function value of fx (u) = u and fy (v) = v and a constant value of kx = mx / ky = my. When the devices 39 and 40 are switched to the B side, the operation of the address modification unit of this embodiment is equivalent to that of FIG. 4, and the output is vertical and horizontal m.
It becomes an address that gives x × my mosaic effects.

As another example of the function generator and the operation, fx (u) = S when u ≧ 0 and fx when u <0.
(U) =-S is given, and 1 ≧ kx ≧ 0 · ky =
When it is set to 0 and the switches 39 and 40 are switched to the A side, the operation of the address modification unit of this embodiment is the same as that of FIG. 8 (although the operation principle is different). That is, kx =
When 1, the split effect is obtained in which the horizontal direction is divided by 2S. In this case, since ky = 0, the output of the multiplier 36 is 0 regardless of the output value of the function generating unit 34, and thus the value of the function value fy (v) is arbitrary. As another example, fx (u, v) = 0.5u + H, f
Give a function value of y (u, v) = 0.5v + V, and 1 ≧ k
When x and ky ≧ 0 are set and the switches 39 and 40 are switched to the A side, as shown in FIG.
An address is generated which has an effect of being scattered from the center of the image while being divided into x × my rectangles. 2A and 2B which are explanatory diagrams showing an example of the scattering effect according to the embodiment of the present invention, FIG. 2A shows a case where K = 0, and FIG. 2B shows mx = H / 2, my = V / 2 0 < If K <1,
(C) shows the case where mx = H / 2, my = V / 2 K = 1.

[0013]

As described above, according to the present invention, in the digital image special effect device, the mosaic effect and the split effect are realized by one circuit, and the new effect such as the scattering effect is also realized. Therefore, it is possible not only to realize the special effect that has been created using the dedicated circuit in the related art with the common circuit, but also to realize the new video effect that could not be achieved in the related art. In addition to this, if the function generator is configured by a storage device, a new effect can be added without changing the circuit. Therefore, it has an effect of greatly contributing to downsizing, price reduction and high functionality of the device.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an address modification unit in a digital video special effect device of the present invention.

FIG. 2 is an explanatory diagram showing an example of a scattering effect according to an embodiment of the present invention.

FIG. 3 is a general block diagram of a conventional digital special effects device.

FIG. 4 is an explanatory diagram showing an example (mosaic effect) of an address modification unit in a conventional digital special effect device.

FIG. 5 is an explanatory diagram showing an example of association between a conventional video memory and an XY two-dimensional address.

FIG. 6 is an explanatory diagram showing a relationship between input / output addresses by address modification according to the first conventional example.

FIG. 7 is an explanatory diagram showing an example of a mosaic effect according to a first conventional example.

FIG. 8 is an explanatory diagram showing another example (split effect) of the conventional address modification unit.

FIG. 9 is an explanatory diagram showing a relationship of input / output addresses by address modification according to a second conventional example.

FIG. 10 is an explanatory diagram showing an example of a split effect according to a second conventional example.

[Explanation of symbols]

 30 Digit-eliminating arithmetic unit 31, 32 Multiplier 33, 34 Function generator 35, 36 Multiplier 37, 38 Adder 39, 40 Switcher 41 Partial address modifier

Claims (2)

[Claims] 1. A digital special which writes video data obtained by digitizing an input video signal to a video memory according to a write address and outputs the written video data as a read video signal according to a read address different from the write address. In the effect device, a digit cancellation arithmetic unit that gradually changes the X address and Y address of the read address, a function generator that outputs a predetermined function value based on the arithmetic result of the digit cancellation arithmetic unit, and this function. A digital video special effect device comprising a partial address modification unit that modifies a read address according to a function value output from a generation unit. 2. The digital video special effect apparatus according to claim 1, wherein the partial address modification unit multiplies a function value output from the first function generation unit by a constant, and the first multiplier. First add the output of the multiplier of X to the X address
, An output of the first multiplier and a first switcher for selectively outputting the output of the first adder, and a function value output from the second function generator and a constant. A second multiplier, a second adder for adding the output of the second multiplier to the Y address, an output of the second multiplier and the second
And a second switching device for selectively outputting the output of the adder of the digital image special effect device.