JPH052998B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to an envelope control device for an electronic musical instrument, and more particularly to a device for controlling the rise or fall shape of an envelope waveform using digital quantities from the outside. Conventional digital envelope generators require a lot of digital information to control, and in order to be able to generate many tones, they require memory to store a large amount of digital information, making them uneconomical. It is. The accuracy of envelope information does not need to be so precise as the accuracy of frequency information, etc., and belongs to the category of being audibly insensitive. Therefore, there is no point in increasing the precision of the envelope that much. However, the length of the envelope, that is, the time range of attack time, decay time, etc., varies from those that change almost instantly to those that change over several seconds, and it is necessary to cover a wide range. Therefore, in the past, in order to secure this lens, unnecessary precision and digital information had to be provided. The purpose of this application is to improve this drawback, and the purpose is to have a wide envelope change range by using the speed parameter when controlling the rise or fall of the envelope waveform from the outside, and to compress digital information so that the storage capacity is small. Our goal is to provide an economical and high-performance electronic musical instrument that can generate many tones. In order to achieve the above object, the electronic musical instrument of the present invention is an electronic musical instrument that calculates and forms an envelope waveform to be generated in response to a key press, and includes an operator means 120 that externally changes and controls the time of the generated envelope; Conversion means 160, 59 for converting the output from the operator means into a speed parameter having a smaller number of bits than the number of bits of the calculation value used in the calculation.
Buffer memory means 60, 61 for storing the speed parameters from the conversion means; Speed parameter decoding means 17 for converting the speed parameters output from the buffer memory means into calculation values used in the calculation.
0 and 23, and the envelope waveform is calculated and formed in a time-division manner based on the calculated value from the speed parameter decoding means. The present invention will be described in detail below with reference to examples. FIG. 1 is a schematic explanatory diagram of an electronic musical instrument to which the present invention is applied. In the figure, key information from a keyboard 100 operated by a performer is processed by a key assigner 130 and sent to an envelope generation circuit 170. Further, the tablet 110 and envelope control volume 120 (manipulator) set by the performer are data-processed by the tablet data processing circuit 140 and sent to the envelope data control circuit 160, which is the main part of the present invention. The value of the envelope control volume 120 is once subjected to AD conversion by the AD converter 150 and then sent out. Envelope data control circuit 160 processes the data and sends speed parameters that determine the shape of the envelope to envelope generation circuit 170. Envelope generation circuit 1
70 is its speed parameter and key assigner 1
The envelope is calculated using the key information of 30 and the data is transferred to the buffer memory 190. Also,
The envelope generating circuit 170 temporarily stores the final calculated value of the envelope in the temporary storage memory 180 as data for time-division calculation, and prepares it for the next calculation. The buffer memory 190 is repeatedly read out by an execution control circuit 40 (described later) at a speed different from the speed of envelope calculation, and the data is transferred to the DA converter 2.
Send to 00. The DA converter 200 converts the digital value of the envelope into an analog voltage to form an envelope waveform. The envelope generation circuit to which the present invention is applied preferably uses a method of expressing the envelope waveform of Japanese Patent Application No. 165721/1984 using a speed parameter and calculating at a predetermined timing. FIG. 2 is a diagram illustrating the principle of the previously proposed envelope generating circuit used in the present invention. As shown in the figure, in the present invention, the envelope is divided into a plurality of phases, for example, 12 phases (hereinafter referred to as phases). The attack portion of the envelope is divided into phases 1 to 4. The day-care section is from phase 5 to phase 8,
The pressed state of the key is stopped at phase 8,
Phase 9 to Phase 12 of the release section after key release
It is represented by 12 phases. The envelope data is then represented as a floating point number and divided into an exponent and a mantissa as shown in Table 1.

[Table] For example, if the maximum value is 1 or less, the maximum level of the envelope is represented by the exponent "000" and the mantissa "000". If 1000 x 2 ⁰ is 0db, the minimum level is the exponent "111" and the mantissa "000". 000” is 1000×2 ^-7 (−42db)
It is expressed as The exponential characteristic of the envelope is formed by utilizing this floating point feature. That is, the decay and release parts can be easily formed by down-counting the mantissa part and up-counting the exponent part. The attack portion is obtained by shifting data in accordance with the phase using a binary shift circuit, which will be described later. The above-mentioned method of expressing and forming ADSR using binary floating point numbers is based on the method proposed by the present applicant, ``Amplitude Generator for Electronic Organs,'' published in Japanese Patent Application Laid-open No. 54-1609.
Since it is disclosed in , the details are omitted. In the present invention, the actuation, decay, and release lengths are expressed as digital parameters,
This parameter is effectively applied to the envelope calculation means. Now, considering the release part, in order to be able to change the length of the release from 1 millisecond to 3 seconds,
Divide this discretely into, for example, 32 steps, express the position as a 5-bit binary number, and send this to the speed parameter decoder as the speed parameter of the envelope, SL×SC/RT SL; Sustain level SC; System clock (Calculation time) RRT: Generates a value equivalent to release time. This value is the release time
It means the amount of displacement per each calculation cycle included in RT. Therefore, if a different speed parameter is given for each phase during release, the calculation time included in that phase allows the release to proceed according to the displacement. The same is true for DAYK. FIGS. 3a and 3b are explanatory diagrams showing the configuration of the envelope generating circuit 170 shown in FIG. 1, which is particularly relevant to the present invention. −165721
FIG. 2 is a block diagram of the envelope generating circuit of the No.
The numbers for each configuration were the same as in the proposed example. In the same figure a, the initial value of each phase of ADSR of the envelope explained in FIG. It is used to control the phase transition of the required circuit. One of them is a phase end value prediction circuit 19, into which sustain level data is input, and the predicted value of each phase end value is sent to a comparator 18, where it is compared with a value from an arithmetic unit (described later), and when they match, a match signal is output. It is sent to the phase decoder ADSR control circuit 12, 1 is added to the phase adder 13, stored in the phase memory 10, and then sent to the phase decoder ADSR via the phase initial value generation circuit 11.
It is sent to the ADSR control circuit 12 and moves to the next phase. On the other hand, the part where the fall time changes in the release part or decay part is discretely divided into, for example, 32 parts, each position is represented by a 5-bit speed parameter, and the speed parameter at the desired position is input into the speed parameter decoder 23 and decoded. Generates the value of SL×SC/RT. This decoder 23 and the next binary shift circuit 20 are controlled by the phase decoder control circuit 12, and in the case of release and decay, the decoder output is transferred to the binary shift circuit 20.
is passed through without shifting, and the addition/subtraction control circuit 2
1, phase decoder ADSR control circuit 1
2 controls addition and subtraction to the arithmetic unit, and in the case of release and decay, it operates to add exponents and subtract mantissas. The adder 16 and the adder 17 of the arithmetic section add and subtract the data read from the exponent memory 14 and the mantissa memory 15, which store the exponents and mantissas in Table 1, based on the data from the addition/subtraction control circuit 21, and then add and subtract the data read from the mantissa memory 15 and the comparator 18. Selection circuit 2
4 is sent out. The comparator 18 compares the added exponent from the adder 16 and the subtracted mantissa from the adder 17 with the respective closing price data stored in the phase closing price prediction circuit 19, and the operation is repeated until they match or exceed the closing price. be fed. That is, the exponent from the adder 16 and the mantissa from the adder 17 are input to the data selection circuit 24, and the phase decoder
This data is stored again in the exponent memory 14 and the mantissa memory 15 according to the control signal of the ADSR control circuit 12. In this way, calculations are repeated for each phase to form a release or decay of length corresponding to the parameter expressed by the 5 bits described above. Note that as a function of the data selection circuit 24, for example, when the adder 16 overflows, the overflow detection circuit 28 detects the overflow, and instead of sending the data to the exponent memory 14 and the mantissa memory 15, It is controlled to select the memory output or to select and send the next phase initial value from the phase initial amplitude value generating circuit 22. Next, in the case of an attack, the decoded data from the speed parameter decoder 23 is sent to the binary shift circuit 20. If the binary shift circuit 20 shifts the data to increase in accordance with the phase, a good attack shape can be obtained. for example,
During phase 1, the data from the speed parameter decoder 23 is shifted to the left by 2 bits, that is, shifted to quadruple. Next, in phase 2, the data is shifted to the left by 1 bit, that is, shifted to double the data. When phase 3 is reached, it is sent out without shifting, and phase 4 is set to be shifted to the right by 1 bit, that is, set to 1/2, so that an act having the shape as shown in FIG. 2 is formed. The envelope thus formed
The amplitude of each phase of ADSR is temporarily stored in the exponent memory 14 and the mantissa memory 15 as output data. A predetermined normal envelope is generated in this way, and an envelope for the amplitude modulation effect is also generated by the same envelope generator. The formed amplitude modulation effect envelope is temporarily stored in the buffer memory 25. Here, for example, for a repeat effect such as a marimba, an envelope for the repeat effect can be easily obtained by inputting a predetermined repeat signal as a start signal to the key data line and setting the ADSR parameter of the shape of the attenuated sound waveform. The crisscrossed effect can also be obtained in the same way by inputting the logical sum of all key press signals as the start signal and setting the slow rise ADSR parameter. Next, all the calculated normal envelopes are read out from the exponent memory 14 and the mantissa memory 15 and sent to the data selection circuit 39, and at the same time, the amplitude modulation effect envelope is read out from the buffer memory 25 under the control of the execution control circuit 40. The data is sent to the data selection circuit 39. Here, the normal envelope and the amplitude modulation effect envelope are multiplied, and the multiplication method that is characteristic of the ADSR generator using floating point arithmetic used in the present invention will be described below. A = (1 + _a1 +2 ^-1 + _a2 ×2 ^-2 + _a3 ×2 ^-3 ) ×2 ^-c (1) B = (1 + b ₁ ×2 ^-1 + b ₂ ×2 ^-2 + b ₃ 2 ^- ₃ ) × 2 _-d (2) When the two numbers A and B are expressed as floating point numbers using binary numbers, they can be expressed as in equations (1) and (2). This is the number corresponding to Table 1. Now, when A and B are multiplied, it is expressed by equation (3). A × B = {1 + (a ₁ + b ₁ ) × 2 ^-1 + (a ₂ + b ₂ ) × 2 ^-2 + (a ₃ + b ₃ ) × 2 ^-3 + a ₁ b ₁ × 2 ^-2 + (a ₁ b ₂ + a ₂ b ₁ )
×2 ^-3 + (a ₁ b ₃ + a ₂ b ₂ + a ₃ b ₁ ) × 2 ^-4 + (a ₂ b ₃ + a ₃ b ₃ ) ×
2 ^-5 +a ₃ b ₃ ×2 ^-6 }×2 ^-(C+d) (3) If we cut down the terms below a ₁ b ₁ ×2 ^-2 in equation (3), we get A×B≒{1+(a ₁ + b ₁ ) x 2 ^-1 + (a ₂ + b ₂ ) x 2 ^-2 + (a ₃ + b ₃ ) x 3 ^-3 } x 2 ^-(c+d) (4) As expressed by equation (4) This is an approximate formula. As can be seen from this approximate expression, the multiplication of A and B can be expressed by addition of the decimal parts of the respective mantissa parts and addition of the exponent parts. According to actual measurements, the maximum error in this truncation error is about ±2 dB.
It can be assumed that this method can be applied to envelope waveforms expressed by monotonically increasing or decreasing functions, and sufficiently satisfactory results have been obtained in auditory tests. In the first step of multiplication, normal ADSR data is multiplied by loudness data, which will be described later, for outputting different volumes depending on the tones or range of sounds to be produced. First, normal ADSR data is selected by the data selection circuit 39 under the control of the execution control circuit 40, and the exponent part is sent to the exponent adder 27, and the mantissa part is sent to the mantissa adder 29. On the other hand, the data selection circuit 30 is connected to the execution control circuit 40.
selects loudness data under the control of and similarly sends it to the other inputs of exponent adder 27 and mantissa adder 29. The exponent adder 27 is a normal
The exponent parts of the ADSR data and loudness data are added and sent to the exponent subtracter 33. Similarly, mantissa adder 29 adds the mantissa and sends it to latch 34. If a carry occurs as a result of adding the mantissa part, a signal is sent to the exponent subtractor 33 to subtract a numerical value 1 from the result of the calculation of the exponent part. The exponent subtractor 33 subtracts the value 1 from the exponent when there is a carry signal, and when there is no carry signal, the data remains as is.
Send to. Latch 34 latches the results of these operations and completes the first step. Next, as a second step, the above result is multiplied by an envelope for amplitude modulation effect. Similar to the first step, the data selection circuit 39 now selects the data in the buffer memory 25 and inputs the data to the exponent adder 2.
7 and mantissa adder 29. The data selection circuit 30 selects the data in the latch 34 and inputs the data to the exponent adder 2.
7 and mantissa adder 29. Exponent adder 2
7. The mantissa adder 29 and the exponent subtracter 33 operate in the same manner as in step 1, and the resulting data is sent to the latch 3.
4 and the exponent part is sent to a decoder 31 and the mantissa part to a binary shift circuit 32. The decoder 31 decodes the data of the exponent part, and the binary shift circuit 3
Control 2. If Step 1 and Step 2
If an exponent carry occurs during the calculation, a carry signal is sent from the exponent adder 27 to the overflow detection circuit 26. Overflow detection circuit 26 holds this signal and sends it to decoder 31. This signal means, for example, a numerical value other than the dynamic range that can be expressed when the exponent part is the result of -7-7=-17. The decoder 31 therefore operates to round the numerical value to the minimum level in the presence of this signal. The binary shift circuit shifts the mantissa data based on the signal from the decoder 31, converts the data from a floating point number to a fixed point number, and sends the data to the buffer memory 190. Buffer memory 190 temporarily stores this data under the control of execution control circuit 40. buffer memory 1
90 is repeatedly read out by the execution control circuit 40 at a rate different from the calculation rate of the ADSR generator. The DA converter 200 converts this data into an analog voltage and forms an envelope waveform. FIG. 3b is a concrete example of a circuit showing a loudness data input section. The loudness data is given by what is stored in the loudness memory 37 and by externally controlled loudness level data. The loudness memory 37 is read out based on the frequency information of the operated keyboard and the information of the timbre to be formed, and sent to the data selection circuit 38. The data selection circuit 38 selects this data and loudness level data using a data selection signal. The selected loudness data is used as described above. The data in the loudness level memory 37 controls the level depending on the frequency of the sound being produced or the keyboard. Loudness level data is data for adjusting the volume balance between tones. If this loudness level memory 37 stores a number of patterns smaller than the number of tones that can be produced and performs the aforementioned floating point multiplication with the data for balance between tones from the loudness level data, a small memory capacity will be needed, making it economical. A system is created. FIG. 4 is an explanatory diagram of the configuration of the main part of the present invention, and shows a detailed block diagram of the envelope control circuit 160 of FIG. 1. Tablet data processing circuit 14 in FIG.
The data processed by 0 is sent to the envelope data control circuit 160 by the tablet data bus of FIG. Data sent via this data bus includes, for example, switch data for a sustain effect that lengthens the decay time of a sound (this is different from the sustain level, which indicates the steady state of the envelope), and data for a damper pedal on a piano. A knee-lever switch controlled by the performer's knee that aims to produce a similar effect to the silencing effect, a marimbus switch and cressendo switch that add amplitude modulation effects depending on the tone, and a crescendo switch that synthesizes sounds. Switch data such as the synthesizer switch, the sustain time volume that adjusts the length of the decay time of the sustain effect mentioned above, the crescendo end time volume that adjusts the rise time of the sound, the attack, decay, sustain, etc. of the sound in the synthesizer. Examples include digitized data such as the volume for adjusting the release, and data such as the digital number (called a tone number) added to the tablet switch of the tone to be sounded. Data for each of the aforementioned switches is stored in tablet data memory 50. FIG. 5a illustrates the contents of tablet data memory 50. FIG. The tablet data memory 50 is composed of, for example, a RAM, and the state of each switch is stored in each address of the RAM. For example, the upper keyboard sustain tablet switch
“1” if US (hereinafter referred to as US) is ON.
If it is OFF, it is stored as “0”. LS below is the lower keyboard sustain tablet, PS
is a foot keyboard sustain tablet, PSS is a percussion sound (damped sound like a piano) sustain tablet, BS is a sustain tablet of brass/woodwind sound, KL is a knee lever, and MA is a damped sound like a marimba. CR is a tablet for amplitude modulation effects such as repeating , CR is a tablet for cresciendo effects (increasing the sound gradually), and SY is a synthesizer tablet. As described above, the state of each tablet switch is stored by the memory control circuit 55. The aforementioned volume value is then stored in a volume value memory 58, the contents of which are illustrated in FIG. 5b. Here, UST indicates the upper keyboard sustain time. LST is the lower keyboard sustain time...hereinafter the same as above. Furthermore, SYAT is the attack time of the synthesizer, SYDT is the decay time, SYSL is the sustain level (steady sound level), and SYRT is the release time. In addition, the tone number data is stored in the memory control circuit 55.
is written into the tone color number memory 52 by.
This timbre number is, for example, a number assigned to each of a plurality of timbres, and has a mechanism that allows them to selectively produce one timbre. Here, each of the percussion tone series PS,
There are two series, plus series B. Next, the contents of buffer memory 61 are shown in FIG. 5e. Here, UF...upper keyboard flute type UO... 〃 Orchestra type (string etc. tone series) LF...lower keyboard flute type LO... 〃 Orchestral type PF...pedal flute type PO... 〃 Orchestral type PS...percution type B...plus type (Brass woodwind) MA...Marimba effect CR...Cresciendo effect SY...Synthesizer, each with areas to store attack, decay, sustain, release, and loudness data. This buffer memory 61 is
Consists of RAM. Next, in explaining the envelope data control circuit 160, assume that processing is performed sequentially starting from address 0 in FIG.
specifies address 0 of buffer memory 61. Address 0 is a memory area for actu parameter data in the UF. Next, the memory control circuit 55 sends a signal to the envelope data memory read circuit 53. Envelope data memory read circuit 53 sends address signals to envelope data memory 54 and envelope data control memory 56. The contents of the envelope data memory 54 are shown in FIG.
The content of is shown in FIG. 5d. The envelope data memory 54 is set to UF by the aforementioned address signal.
The attack parameter data is read out and sent to the data selector 60. At the same time, a signal for controlling envelope data is read from the envelope data control memory 56 and sent to the envelope data selection control circuit 51. This signal is expressed by 1 bit and is a signal for selecting the data stored in the envelope data memory 54 or the volume value stored in the volume value memory 58. If this signal is "0", the envelope The contents of the data memory 54 are set to “1”.
If so, the contents of the volume value memory 58 are selected. Envelope data selection control circuit 51 takes the aforementioned signal as one input and data from tablet data memory 50 as another input. The contents of tablet data memory 50 are read by signals from memory control circuit 55. The envelope data selection control circuit 51 takes the AND of these two inputs and sends it to the data selector 60, for example.
For example, if the US of the tablet data memory 50 is "1" and the envelope data control memory 5
Attack control data of UF 6 is “0”
If so, the output signal of the envelope data selection circuit 51 becomes "0" and the output of the envelope data memory 54 of the data selector 60 is selected. In this manner, the data selector 60 sends the attack parameter data to the buffer memory 61, and writes the data to the address of the attack parameter data of the UF in the buffer memory 61 in response to a write signal from the memory control circuit 55. Similarly,
Decay parameter, sustain level, and loudness level data are written. On the other hand, if the signal read from the envelope data control memory 56 during release parameter processing is "1", the AND with the signal from the tablet data memory 50 in the envelope data selection control circuit 51 becomes "1", Data selector 60 selects data from conversion circuit 59. The value of UST is read out from the polynomial value memory 58 by the memory control circuit 55 and the data is sent to the conversion circuit 59. The conversion circuit 59 has a plurality of conversion circuits having different characteristics, and the memory control circuit 55 specifies which characteristic to use. In this manner, data from volume value memory 58 is converted and sent to data selector 60 and written to buffer memory 61. As a result, the release time of the UF is controlled by the volume. Data such as UO is written below. On the other hand, for the percussion system and brass system, the timbre number contained in the timbre number memory 52 is read out by the memory control circuit 55 and sent to the envelope data memory reading circuit 53. The envelope data memory reading circuit 53 determines which data of PS or B in the envelope data memory 54 is to be read based on this tone color number. Thereafter, data processing is performed in the same manner as in the method described above. If KL in the tablet data memory 50 is “1”, then US, PS, and BS are “1”, for example.
Envelope data selection control circuit 5 so that
It works by sending a signal to 1 and performing a logical OR with each signal. In this way, the decay time can be controlled not only by the tablet but also by the knee lever. Further, if MA is "1", the same processing as UF is performed, and if it is "0", EFFECT OFF data in envelope data memory 54 is written to buffer memory 61. This controls whether or not to add effects. The same goes for CR.
When SY is “1”, SYAT, SYDT, SYSL, and SYRT in the volume value memory are transferred to the buffer memory 61.
Each data is written through the conversion circuit 59. Next, phase data is sent from the envelope generation circuit 170 of FIG. 1 to the memory control circuit 55. Based on this phase data and a signal from the execution control circuit 40, addressing of the buffer memory 61 is executed. For example, data in the buffer memory 61 is read out, such as attack parameter data during the attack phase and decay parameter data during the decay phase, and sent to the envelope generating circuit 1 via the data selector 57.
Required data is sent to 70 in a time-division manner. Next, if the keyboard is pressed more than the number of channels that can be sounded, the key assigner 130 detects this, reads out the phase data of each channel from the temporary storage memory 180 connected to the envelope generation circuit 170, and selects the channel with the most advanced phase. is detected, and the request signal is sent to the memory control circuit 5 in the envelope data control circuit 160 in synchronization with the timing of calculating the envelope of the channel.
Send to 5. Memory control circuit 55 sends a signal to data selector 57 to select high speed parameter data. In this way, the channel can be released quickly by sending parameter data to the envelope generator 170 such that the sound attenuation ends at a high speed. Next, loudness control will be explained. The loudness level data in the envelope data memory 54 is expressed, for example, in 8 bits,
When the MSB is used as a control bit and the lower 7 bits are used as data, this control bit becomes the data selection signal shown in FIG. 3b, and the lower 7 bits become loudness level data. If this control bit is “1”, the data selection circuit 3
8 selects loudness level data. next,
When the control bit is 0, data selection circuit 3
8 selects the output of the loudness memory 37. The loudness memory 37 corresponds to the key assigner 13 in FIG.
It is read out using frequency information starting from 0 (or information about which keys are being pressed) and timbre information. This timbre information can be used, for example, if the aforementioned control bit is 0.
If timbre information is stored in the lower 7 bits of the data, the timbre information line can be made up of the same line as the loudness level data line. In the embodiment, each data read from the buffer memory 61 is sent to the envelope generating circuit 170 in FIGS. 3a and 3b via the data selector 57.
and in the envelope generation circuit 170.
The aforementioned data is distributed to the inputs of ADSR parameter data, sustain level parameters, and loudness level data, but a latch circuit is required to latch each data sent in a time-sharing manner. , which are not described in the specification or drawings. As explained above, according to the present invention, when controlling the rise or fall of an envelope waveform from the outside, by using the speed parameter, it is possible to have a wide envelope change range, compress digital information, and use a small storage capacity. This has the effect of providing an economical and high-performance electronic musical instrument that can generate many tones.

[Brief explanation of the drawing]

FIG. 1 is a schematic explanatory diagram of an electronic musical instrument to which the present invention is applied, FIG. 2 is an explanatory diagram of the principle of an envelope generator to which the present invention is applied, and FIGS. 3 a and b are specific diagrams of an envelope generator to which the present invention is applied. An explanatory diagram of an example, FIG. 4 is an explanatory diagram showing the configuration of the main part of the present invention, and FIGS.
e shows a specific example of the contents of each memory in the configuration shown in FIG. 4, in which 40 is an execution control circuit, 50 is a tablet data memory, 51 is an envelope data selection control circuit, 52 is a tone number memory, and 53 is an envelope. 5 is a data memory read circuit; 54 is an envelope data memory; 55 is a memory control circuit;
6 is an envelope data control memory, 57 is a data selector, 58 is a volume value memory, 59 is a conversion circuit, 60 is a data selector, 61 is a buffer memory, 160 is an envelope control circuit, 170
indicates an envelope generation circuit.

Claims (1)

[Scope of Claims] 1. An electronic musical instrument that calculates and forms an envelope waveform to be generated in response to a key press, comprising: operator means 120 for externally changing and controlling the time of the generated envelope; and an output from the operator means. conversion means 160, 59 for converting the speed parameter into a speed parameter having a smaller number of bits than the number of bits of the calculation value used in the calculation;
Buffer memory means 160, 61 for storing the speed parameters from the conversion means; Speed parameter decoding means 17 for converting the speed parameters output from the buffer memory means into calculation values used in the calculation.
0, 23, and calculates and forms an envelope waveform in a time-division manner based on the calculated value from the speed parameter decoding means. 2. A patent characterized in that the conversion means has a plurality of different conversion characteristics, and is a conversion means that converts the output from the operator means into the speed parameter according to the conversion characteristics designated according to the timbre series. An electronic musical instrument according to claim 1.