JPH0529754A - Solder resist mask formation method of printed wiring board - Google Patents
Solder resist mask formation method of printed wiring boardInfo
- Publication number
- JPH0529754A JPH0529754A JP18595391A JP18595391A JPH0529754A JP H0529754 A JPH0529754 A JP H0529754A JP 18595391 A JP18595391 A JP 18595391A JP 18595391 A JP18595391 A JP 18595391A JP H0529754 A JPH0529754 A JP H0529754A
- Authority
- JP
- Japan
- Prior art keywords
- solder resist
- wiring board
- resist film
- resist mask
- printed wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は電子回路を構成する電子
部品を実装・配線するため電子機器の基板となるプリン
ト配線板のソルダーレジストマスクの形成方法に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a solder resist mask of a printed wiring board which is a substrate of an electronic device for mounting and wiring electronic parts constituting an electronic circuit.
【0002】[0002]
【従来の技術】従来、回路パターンを有するプリント配
線板に形成されるソルダーレジストマスクは、フロー方
式のはんだ付けを行う際、隣接回路間のはんだブリッジ
防止や、はんだ付けする必要の無い余分な銅箔からはん
だを保護するためと、電子機器使用環境から回路銅箔を
守ることが目的であった。2. Description of the Related Art Conventionally, a solder resist mask formed on a printed wiring board having a circuit pattern is used to prevent a solder bridge between adjacent circuits when soldering by a flow method or to use an extra copper which does not need to be soldered. The purpose was to protect the solder from the foil and to protect the circuit copper foil from the environment in which the electronic equipment was used.
【0003】しかし、表面実装技術が一般化するに到っ
てはんだ付け技術もフロー方式からはんだ量をコントロ
ールし易いリフロー方式が主流になってきた。リフロー
方式は、フロー方式に比較してはんだ量コントロールを
より緻密にできる方式ではあるが、それでも対象となる
表面実装部品用パット幅のピッチ化によりはんだ付が難
しくなり、従ってソルダーレジストマスクは余分なはん
だが隣接したパットに流出することを防ぐ、堤防の役目
を従来の目的に加えて求められている。However, as the surface mounting technology has become popular, the soldering technology has become mainstream from the flow method to the reflow method, which makes it easy to control the amount of solder. Although the reflow method is a method that allows more precise control of the amount of solder compared to the flow method, it is still difficult to solder due to the pitch of the target surface mount component pad width, and therefore the solder resist mask is unnecessary. In addition to the conventional purpose, there is a demand for an embankment to prevent solder from flowing out to the adjacent pads.
【0004】しかし、洗浄性が損なわれないようにソレ
ダーレジスト膜を単に厚くするのではなく、断面が台形
のような構造が望ましいとされる。従来のソルダーレジ
ストマスク形成方法は、図3に示すように、前工程で回
路パターンが形成されたプリント配線板の表面清浄処理
工程と、ソルダーレジストマスクを形成するための材料
を塗布する感光性ソルダーレジスト塗布工程、露光する
ためにべたつかない程度に硬化させる指触乾燥工程、ソ
ルダーレジストマスクパターンを写真法によって形成す
るための露光工程、ソルダーレジストマスクパターンに
不要なインクを除去する現象工程、ソルダーレジストパ
ターンを形成したインクを完全硬化させるキュア工程と
を行った後、更にソルダーレジストインクを積み重ねて
断面が台形に近い形状を実現するために、ソルダーレジ
ストマスクパターンを替えて表面清浄処理工程からキュ
ア工程までの工程をもう一つシリアルに行なうという2
回の処理工程を必要としていた。However, in order not to impair the cleanability,
Trapezoidal cross section rather than just thickening the dark resist film
A structure such as is desirable. Conventional solder register
As shown in FIG. 3, the strike mask forming method is performed in the previous step.
Surface cleaning of printed wiring boards with road patterns
Process and material for forming solder resist mask
Photosensitive solder resist coating process
Touch-drying process, which cures to a non-greasy
Ruder resist mask pattern is formed by photographic method.
Exposure process for solder mask pattern
Phenomenon process to remove unnecessary ink, solder resist
A curing process that completely cures the ink that forms the turn
After doing, stack more solder resist ink
In order to realize a shape with a trapezoidal cross section,
Change the strike mask pattern and
Oh, another process up to the process is performed serially 2
It required one processing step.
【0005】[0005]
【発明が解決しようとする課題】このように従来のソル
ダーレジストマスクの形成方法では、一連の処理工程を
シリアルに2回必要とする冗長さがあり、工程を逆戻り
させなければならないため、製品のハンドリングのわず
らわしさによる品質問題と2回目の処理工程投入のタイ
ミングなど、工程管理が難しく結果的に納期管理が合理
的にできないという問題点があった。As described above, in the conventional method of forming a solder resist mask, there is a redundancy that a series of processing steps is required twice serially, and the steps must be reversed. There was a problem that process management was difficult due to quality problems due to the troublesome handling and the timing of the second processing step input, and as a result delivery time management could not be rationalized.
【0006】[0006]
【課題を解決するための手段】本発明のプリント配線板
のソルダーレジストマスクの形成方法は、回路パターン
が形成された配線基板の表面を清浄処理したのち異なる
感光特性を有する第1および第2のソルダーレジスト膜
を順次形成する工程と、異なるパターンを有する第1お
よび第2のマスクを用い前記第2および第1のソルダー
レジスト膜を順次露光する工程と、露光された前記第2
および第1のソルダーレジスト膜を現像し未露光部を除
去する工程とを含むものである。A method of forming a solder resist mask for a printed wiring board according to the present invention comprises first and second solder resist masks having different photosensitivity after cleaning the surface of the wiring board on which a circuit pattern is formed. A step of sequentially forming a solder resist film, a step of sequentially exposing the second and first solder resist films using first and second masks having different patterns, and a step of exposing the exposed second
And a step of developing the first solder resist film to remove the unexposed portion.
【0007】[0007]
【実施例】次に本発明について図面を参照して説明す
る。図1(a)〜(f)および図2は本発明の一実施例
を説明するための配線基板の断面図および工程図であ
る。The present invention will be described below with reference to the drawings. 1 (a) to 1 (f) and FIG. 2 are a sectional view and a process diagram of a wiring board for explaining an embodiment of the present invention.
【0008】まず図1(a)に示すように、銅箔のパタ
ーンニングを終えた回路パターン2が形成された配線基
板表面を表面清浄処理工程で清浄にする。次に図1
(b)に示すように、プリント配線板の銅箔の高さとほ
ぼ同じ厚膜20〜40μmのソルダーレジストインクを
塗布するために、カーテンコーター方式により、200
〜250nmに感度のピークを持つような感光性を持つ
第1のソルダーレジスト膜3を塗布工程で形成する。そ
して表面がべたつかない程度の乾燥を指触乾燥工程で行
なう。First, as shown in FIG. 1 (a), the surface of the wiring board on which the circuit pattern 2 after the patterning of the copper foil is formed is cleaned in a surface cleaning process. Next in FIG.
As shown in (b), in order to apply a solder resist ink having a thickness of 20 to 40 μm, which is almost the same as the height of the copper foil of the printed wiring board, a curtain coater method is used to apply
A first solder resist film 3 having photosensitivity having a sensitivity peak at ˜250 nm is formed by a coating process. Then, drying is performed to the extent that the surface is not sticky in the finger touch drying step.
【0009】次に図1(c)に示すように、スプレー方
式により300〜400nmに感度のピークを持つよう
な感光特性を持つ第2のソルダーレジスト膜4を全面に
10〜20μmの厚さに塗布工程で形成する。次でこの
第2のソレダーレジスト膜4を指触乾燥工程で処理す
る。次に図1(d)に示すように、第1のフォトマスク
5を用い、第2のソルダーレジスト膜4に合わせた光源
による露光を第1の露光工程で行なう。Next, as shown in FIG. 1C, a second solder resist film 4 having a photosensitivity having a sensitivity peak at 300 to 400 nm is formed on the entire surface by a spray method to a thickness of 10 to 20 μm. It is formed in the coating process. Next, the second solder resist film 4 is processed in a touch-drying process. Next, as shown in FIG. 1D, the first photomask 5 is used to perform exposure in a first exposure step using a light source that is aligned with the second solder resist film 4.
【0010】次に図1(e)に示すように、第2のフォ
トマスク6を用い、第1のソルダーレジスト膜3に合わ
せた光源による露光を第2の露光工程で行なう。次に図
1(f)に示すように、第1および第2のソルダーレジ
スト膜の未露光部を現像工程で1−1−1トリクロロエ
タン等の溶剤で同時に溶解除去し、次でキュア工程で露
光部3A,4Aを完全に硬化定着させ、2層構造のソル
ダーレジストマスク7を形成する。Next, as shown in FIG. 1 (e), a second photomask 6 is used to perform exposure in a second exposure step using a light source matched to the first solder resist film 3. Next, as shown in FIG. 1 (f), unexposed portions of the first and second solder resist films are simultaneously dissolved and removed by a solvent such as 1-1-1 trichloroethane in a developing process, and then exposed in a curing process. The portions 3A and 4A are completely cured and fixed, and the solder resist mask 7 having a two-layer structure is formed.
【0011】なお、第1のソルダーレジスト膜3の形成
はスクリーンコーター方式でもよい。また、第1のソル
ダ・レジスト膜3の露光を先に行ってもよい。The first solder resist film 3 may be formed by a screen coater method. Further, the first solder resist film 3 may be exposed first.
【0012】[0012]
【発明の効果】以上説明したように本発明によれば、従
来、2回の一連の工程による処理を必要としていたソル
ダーレジストマスクの形成を、同一機能を持つ工程に集
約させ、まったく同じ現像工程やキュア工程を一回で処
理することが出来るため、従来技術の冗長な工程を省く
ことができる。このため製品のハンドリングが一方方向
の流れとなり、品質を悪化させる要因を減少させること
ができる。また工程管理が単純になって納期管理が合理
的にできる効果がある。As described above, according to the present invention, the formation of the solder resist mask, which has conventionally required a series of two processes, is integrated into a process having the same function, and the same developing process is performed. Since the curing process and the curing process can be performed once, the redundant process of the conventional technique can be omitted. Therefore, the handling of the product becomes a one-way flow, and it is possible to reduce the factors that deteriorate the quality. It also has the effect of simplifying process management and rationalizing delivery date management.
【図面の簡単な説明】[Brief description of drawings]
【図1】本発明の一実施例を説明するための工程順に示
した配線基板の断面図。FIG. 1 is a cross-sectional view of a wiring board showing the order of steps for explaining an embodiment of the present invention.
【図2】本発明の一実施例を説明するための工程図。FIG. 2 is a process drawing for explaining an embodiment of the present invention.
【図3】従来例を説明するための工程図。FIG. 3 is a process drawing for explaining a conventional example.
1 配線基板 2 回路パターン 3 第1のソルダーレジスト膜 4 第2のソルダーレジスト膜 5 第1のフォトマスク 6 第2のフォトマスク 7 ソルダーレジストマスク 1 wiring substrate 2 circuit pattern 3 first solder resist film 4 second solder resist film 5 first photomask 6 second photomask 7 solder resist mask
Claims (1)
面を清浄処理したのち異なる感光特性を有する第1およ
び第2のソルダーレジスト膜を順次形成する工程と、異
なるパターンを有する第1および第2のマスクを用い前
記第2および第1のソルダーレジスト膜を順次露光する
工程と、露光された前記第2および第1のソルダーレジ
スト膜を現像し未露光部を除去する工程とを含むことを
特徴とするプリント配線板のソルダーレジストマスクの
形成方法。Claim: What is claimed is: 1. A step of cleaning a surface of a wiring board on which a circuit pattern is formed and then sequentially forming first and second solder resist films having different photosensitivity, and a step of forming a different pattern. Steps of sequentially exposing the second and first solder resist films by using the first and second masks, and developing the exposed second and first solder resist films to remove unexposed portions A method for forming a solder resist mask for a printed wiring board, comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18595391A JPH0529754A (en) | 1991-07-25 | 1991-07-25 | Solder resist mask formation method of printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18595391A JPH0529754A (en) | 1991-07-25 | 1991-07-25 | Solder resist mask formation method of printed wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0529754A true JPH0529754A (en) | 1993-02-05 |
Family
ID=16179767
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18595391A Pending JPH0529754A (en) | 1991-07-25 | 1991-07-25 | Solder resist mask formation method of printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0529754A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006201434A (en) * | 2005-01-20 | 2006-08-03 | Toppan Printing Co Ltd | Photomask for exposure of solder resist and wiring substrate exposed using the same or method for producing the same |
JP2007514201A (en) * | 2003-12-12 | 2007-05-31 | ヒューレット−パッカード デベロップメント カンパニー エル.ピー. | Method for forming a depression in the surface of a photoresist layer |
-
1991
- 1991-07-25 JP JP18595391A patent/JPH0529754A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007514201A (en) * | 2003-12-12 | 2007-05-31 | ヒューレット−パッカード デベロップメント カンパニー エル.ピー. | Method for forming a depression in the surface of a photoresist layer |
JP2006201434A (en) * | 2005-01-20 | 2006-08-03 | Toppan Printing Co Ltd | Photomask for exposure of solder resist and wiring substrate exposed using the same or method for producing the same |
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