JPH0529280A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH0529280A
JPH0529280A JP17805391A JP17805391A JPH0529280A JP H0529280 A JPH0529280 A JP H0529280A JP 17805391 A JP17805391 A JP 17805391A JP 17805391 A JP17805391 A JP 17805391A JP H0529280 A JPH0529280 A JP H0529280A
Authority
JP
Japan
Prior art keywords
film
resist
silicon monoxide
pattern
workpiece
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP17805391A
Other languages
Japanese (ja)
Inventor
Yurika Yamakami
百合香 山神
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17805391A priority Critical patent/JPH0529280A/en
Publication of JPH0529280A publication Critical patent/JPH0529280A/en
Withdrawn legal-status Critical Current

Links

Abstract

PURPOSE:To provide a method where a resist pattern excellent in shape accuracy is formed on a workpiece without complicated processes, and a pattern is accurately formed on the workpiece using the resist pattern as a mask. CONSTITUTION:A silicon monoxide film 3 is formed on a workpiece 2, then a resist film 4 is formed on the silicon monoxide film 3, the resist film 4 is exposed to light and developed into a resist pattern, the silicon monoxide film 3 and the workpiece 2 are etched through the resist pattern concerned as a mask to form a pattern on the workpiece 2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、被加工体にパターンを
形成する方法の改良、特に、エッチング用マスクとして
使用されるレジストパターンを精度よく形成する方法に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improved method for forming a pattern on a workpiece, and more particularly to a method for accurately forming a resist pattern used as an etching mask.

【0002】[0002]

【従来の技術】伝統的には、被加工体上にレジスト膜を
形成し、マスクを使用してこのレジスト膜を選択的に露
光・現像してレジストパターンを形成し、このレジスト
パターンをマスクにして被加工体をエッチングしてパタ
ーンを形成する方法が使用されているが、被加工体から
の反射光の影響によってレジストパターンの形状が精度
よく形成されないという問題がある。その問題を解決す
る手段として、レジスト材に染料を入れたり、多層レジ
スト法を使用して下層レジスト膜の膜厚を厚くして反射
光を吸収する改善策が講じられている。
2. Description of the Related Art Traditionally, a resist film is formed on an object to be processed, a mask is used to selectively expose and develop the resist film to form a resist pattern, and the resist pattern is used as a mask. A method of etching a work piece to form a pattern is used, but there is a problem in that the shape of the resist pattern cannot be accurately formed due to the influence of reflected light from the work piece. As a means for solving the problem, improvement measures have been taken to absorb the reflected light by adding a dye to the resist material or increasing the film thickness of the lower resist film by using a multilayer resist method.

【0003】[0003]

【発明が解決しようとする課題】ところが、染料入りレ
ジスト材を使用する場合には、露光・現像後のレジスト
パターンの形状精度が低下し、解像力も低下するという
欠点がある。また、多層レジスト法を使用する場合に
は、工程が複雑化するのに伴ってスループットが低下
し、大量生産プロセスには不適当である。
However, when a dye-containing resist material is used, there is a drawback that the shape accuracy of the resist pattern after exposure and development is lowered and the resolution is also lowered. Further, when the multi-layer resist method is used, the throughput is reduced as the process becomes complicated, and it is not suitable for a mass production process.

【0004】本発明の目的は、この欠点を解消すること
にあり、複雑な工程を伴うことなく被加工体上に形状精
度のよいレジストパターンを形成し、これをマスクにし
て被加工体にパターンを精度よく形成する方法を提供す
ることにある。
An object of the present invention is to eliminate this drawback, and a resist pattern having a good shape accuracy is formed on the object to be processed without complicated steps, and this is used as a mask to form a pattern on the object to be processed. The object is to provide a method for forming a high precision.

【0005】[0005]

【課題を解決するための手段】上記の目的は、被加工体
(2)上に一酸化ケイ素膜(3)を形成し、この一酸化
ケイ素膜(3)上にレジスト膜(4)を形成し、このレ
ジスト膜(4)を選択的に露光・現像してレジストパタ
ーン(41)を形成し、このレジストパターン(41)をマ
スクにして前記の一酸化ケイ素膜(3)と前記の被加工
体(2)とをエッチングして前記の被加工体(2)にパ
ターンを形成する工程を有する半導体装置の製造方法に
よって達成される。なお、前記の一酸化ケイ素膜(3)
の膜厚は300Å以上であることが好適である。
The above object is to form a silicon monoxide film (3) on a workpiece (2) and to form a resist film (4) on the silicon monoxide film (3). Then, the resist film (4) is selectively exposed and developed to form a resist pattern (41), and the silicon monoxide film (3) and the workpiece are processed using the resist pattern (41) as a mask. This is achieved by a method for manufacturing a semiconductor device, which includes a step of etching the body (2) to form a pattern on the body (2) to be processed. The silicon monoxide film (3)
The film thickness of is preferably 300 Å or more.

【0006】[0006]

【作用】被加工体がタングステンシリサイド(WS
x )膜である場合を例に説明する。タングステンシリ
サイド(WSix )、一酸化ケイ素(SiO)及びレジ
ストの波長365nm(i線)の光と波長248nm(Kr
F)の光とに対する屈折率nと吸収係数kとを表1に示
す。
Function: The work piece is made of tungsten silicide (WS
The case of i x ) film will be described as an example. Tungsten silicide (WSi x), silicon monoxide (SiO) and resist the wavelength 365nm of (i line) light and the wavelength 248 nm (Kr
Table 1 shows the refractive index n and the absorption coefficient k for the light of F).

【0007】[0007]

【表1】 図2に示すように、屈折率n、吸収係数kの吸収体6
上にレジスト膜4を形成し、強度Io の光を垂直入射し
た場合のレジスト膜4と吸収体6との界面からの反射光
強度をIとしたとき、I/Io を界面における強度反射
率と呼ぶ。この強度反射率を吸収体の屈折率nと吸収係
数kとの関数として描いたグラフを図3と図4とに示
す。図3は波長248nm(KrF)の光に対するもので
あり、図4は波長365nm(i線)の光に対するもので
ある。
[Table 1] As shown in FIG. 2, the absorber 6 having a refractive index n and an absorption coefficient k.
Assuming that the intensity of light reflected from the interface between the resist film 4 and the absorber 6 when the resist film 4 is formed thereon and the light having the intensity I o is vertically incident thereon is I, I / I o is intensity reflection at the interface. Call the rate. Graphs of this intensity reflectance as a function of the refractive index n and the absorption coefficient k of the absorber are shown in FIGS. 3 and 4. FIG. 3 is for light with a wavelength of 248 nm (KrF), and FIG. 4 is for light with a wavelength of 365 nm (i-line).

【0008】吸収体6が表1に示す屈折率nと吸収係数
kとを有する一酸化ケイ素(SiO)である場合のレジ
スト膜4との界面からの反射率を図3と図4とから求め
ると、248nmと365nmのいずれの波長に対しても数
%であり、極めて小さい。それに対し、吸収体6が表1
に示す屈折率nと吸収係数kとを有するタングステンシ
リサイド(WSix )である場合のレジスト膜4との界
面からの反射率を、図3と図4とから求めると、いずれ
の波長の光に対しても約30%と大きくなる。
The reflectance from the interface with the resist film 4 when the absorber 6 is silicon monoxide (SiO) having the refractive index n and the absorption coefficient k shown in Table 1 is obtained from FIGS. 3 and 4. And is several percent for both wavelengths of 248 nm and 365 nm, which is extremely small. On the other hand, the absorber 6 is shown in Table 1.
The reflectance from the interface between the resist film 4 when it is a tungsten silicide having a refractive index n and absorption coefficient k (WSi x) shown in, and obtained from FIGS. 3 and 4 which, in the light of any wavelength On the other hand, it will be as large as about 30%.

【0009】このことは、図1(b)に示すように、タ
ングステンシリサイド(WSix )よりなる被加工物2
上に直接レジスト膜4を形成した場合のレジスト膜4と
被加工物2との界面からの反射率は30%程度と高いの
に対し、図1(a)に示すように、被加工物2上に一酸
化ケイ素(SiO)膜3を介してレジスト膜4を形成し
た場合のレジスト膜4と一酸化ケイ素(SiO)膜3と
の界面からの反射量は極めて小さいことを示している。
なお、一酸化ケイ素(SiO)膜3の表面で反射するこ
となく膜内に入った光は一酸化ケイ素(SiO)膜3に
吸収され、その下に形成されている被加工物2からの反
射は殆どなくなる。
[0009] This is as shown in FIG. 1 (b), of tungsten silicide (WSi x) workpiece 2
While the reflectance from the interface between the resist film 4 and the workpiece 2 is as high as about 30% when the resist film 4 is directly formed on the workpiece 2, as shown in FIG. It is shown that the amount of reflection from the interface between the resist film 4 and the silicon monoxide (SiO) film 3 when the resist film 4 is formed on the silicon monoxide (SiO) film 3 is extremely small.
The light that has entered the film without being reflected by the surface of the silicon monoxide (SiO) film 3 is absorbed by the silicon monoxide (SiO) film 3 and reflected from the workpiece 2 formed thereunder. Is almost gone.

【0010】なお、一酸化ケイ素(SiO)は空気中に
晒すと二酸化ケイ素(SiO2 )になるが、この場合で
も反射防止効果は十分に認められる。
Although silicon monoxide (SiO) becomes silicon dioxide (SiO 2 ) when exposed to air, the antireflection effect is sufficiently recognized even in this case.

【0011】[0011]

【実施例】以下、図面を参照して、本発明の一実施例に
係るパターン形成方法について説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A pattern forming method according to an embodiment of the present invention will be described below with reference to the drawings.

【0012】図5(a)に示すように、基板1上に被加
工体として形成されている0.2μm厚のタングステン
シリサイド(WSix )膜2にパターンを形成する場合
を例にして説明する。まず、スパッタ法等を使用して、
タングステンシリサイド(WSix )膜2上に一酸化ケ
イ素(SiO)膜3を約300Å厚に形成し、次いで、
レジスト膜4を約0.8μm厚に塗布し、レチクル5を
使用してレジスト膜4を選択的に露光する。
[0012] As shown in FIG. 5 (a), will be described as an example the case of forming a 0.2μm thick tungsten silicide (WSi x) pattern film 2 formed as a workpiece on the substrate 1 . First, using the sputtering method,
Tungsten silicide (WSi x) film 2 on to form the silicon monoxide (SiO) film 3 to about 300Å thick, then
The resist film 4 is applied to a thickness of about 0.8 μm, and the reticle 5 is used to selectively expose the resist film 4.

【0013】図5(b)に示すように、レジスト膜4を
現像してレジストパターン41を形成する。図6(a)に
示すように、四フッ化炭素等を反応ガスとする反応性イ
オンエッチング法を使用して、レジストパターン41をマ
スクにして一酸化ケイ素(SiO)膜3をエッチングす
る。
As shown in FIG. 5B, the resist film 4 is developed to form a resist pattern 41. As shown in FIG. 6A, the silicon monoxide (SiO) film 3 is etched using the resist pattern 41 as a mask using a reactive ion etching method using carbon tetrafluoride as a reaction gas.

【0014】図6(b)に示すように、ハロゲン系ガス
(例えばフッ素、塩素等)等を反応ガスとする反応性イ
オンエッチング法を使用して、タングステンシリサイド
(WSix )膜2をエッチングしてパターンを形成す
る。
[0014] As shown in FIG. 6 (b), halogen-based gas (e.g. fluorine, chlorine, etc.) using a reactive ion etching method using a reactive gas or the like, a tungsten silicide (WSi x) film 2 is etched To form a pattern.

【0015】図6(c)に示すように、酸素プラズマエ
ッチング法を使用してレジストパターン41を除去する。
一酸化ケイ素(SiO)膜3は絶縁膜であるので、これ
をつけたまゝ次工程に進むことが可能な場合があるが、
もし、一酸化ケイ素(SiO)膜3を除去する必要があ
る場合には、四フッ化炭素等を反応ガスとする反応性イ
オンエッチング法を使用してエッチング除去する。
As shown in FIG. 6C, the resist pattern 41 is removed by using the oxygen plasma etching method.
Since the silicon monoxide (SiO) film 3 is an insulating film, it may be possible to proceed to the next step with the film attached.
If the silicon monoxide (SiO) film 3 needs to be removed, it is removed by etching using a reactive ion etching method using carbon tetrafluoride or the like as a reaction gas.

【0016】[0016]

【発明の効果】以上説明したとおり、本発明に係る半導
体装置の製造方法においては、被加工体とレジスト膜と
の間に一酸化ケイ素膜を介在させることによって、露光
時の被加工体からの反射を防止することができるので、
複雑な工程を伴うことなくレジストパターンを精度よく
形成することができ、半導体装置の微細化・量産化の向
上に寄与するところが大きい。
As described above, in the method of manufacturing a semiconductor device according to the present invention, by interposing the silicon monoxide film between the object to be processed and the resist film, the object to be processed at the time of exposure is removed. Since it can prevent reflection,
The resist pattern can be accurately formed without involving complicated steps, and it greatly contributes to miniaturization and mass production of semiconductor devices.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の原理説明図である。FIG. 1 is a diagram illustrating the principle of the present invention.

【図2】反射率の説明図である。FIG. 2 is an explanatory diagram of reflectance.

【図3】レジストと吸収体との界面における反射率を吸
収体の屈折率と吸収係数との関数として描いたグラフで
ある(λ=248nmの場合)。
FIG. 3 is a graph showing the reflectance at the interface between the resist and the absorber as a function of the refractive index and the absorption coefficient of the absorber (when λ = 248 nm).

【図4】レジストと吸収体との界面における反射率を吸
収体の屈折率と吸収係数との関数として描いたグラフで
ある(λ=365nmの場合)。
FIG. 4 is a graph showing the reflectance at the interface between the resist and the absorber as a function of the refractive index and the absorption coefficient of the absorber (when λ = 365 nm).

【図5】本発明に係るパターン形成工程図(その1)で
ある。
FIG. 5 is a pattern forming process diagram (1) according to the present invention.

【図6】本発明に係るパターン形成工程図(その2)で
ある。
FIG. 6 is a pattern forming process diagram (2) according to the present invention.

【符号の説明】[Explanation of symbols]

1 基板 2 被加工体 3 一酸化ケイ素膜 4 レジスト膜 41 レジストパターン 5 レチクル 6 吸収体 1 substrate 2 Workpiece 3 Silicon monoxide film 4 Resist film 41 Resist pattern 5 reticle 6 absorber

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 被加工体(2)上に一酸化ケイ素膜
(3)を形成し、 該一酸化ケイ素膜(3)上にレジスト膜(4)を形成
し、 該レジスト膜(4)を選択的に露光・現像してレジスト
パターン(41)を形成し、 該レジストパターン(41)をマスクにして前記一酸化ケ
イ素膜(3)と前記被加工体(2)とをエッチングして
前記被加工体(2)にパターンを形成する工程を有する
ことを特徴とする半導体装置の製造方法。
1. A silicon monoxide film (3) is formed on a workpiece (2), a resist film (4) is formed on the silicon monoxide film (3), and the resist film (4) is formed. A resist pattern (41) is formed by selectively exposing and developing, and the silicon monoxide film (3) and the object to be processed (2) are etched by using the resist pattern (41) as a mask. A method of manufacturing a semiconductor device, comprising a step of forming a pattern on a processed body (2).
【請求項2】 前記一酸化ケイ素膜(3)の膜厚は30
0Å以上であることを特徴とする請求項1記載の半導体
装置の製造方法。
2. The film thickness of the silicon monoxide film (3) is 30.
The method for manufacturing a semiconductor device according to claim 1, wherein the value is 0Å or more.
JP17805391A 1991-07-18 1991-07-18 Manufacture of semiconductor device Withdrawn JPH0529280A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17805391A JPH0529280A (en) 1991-07-18 1991-07-18 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17805391A JPH0529280A (en) 1991-07-18 1991-07-18 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0529280A true JPH0529280A (en) 1993-02-05

Family

ID=16041782

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17805391A Withdrawn JPH0529280A (en) 1991-07-18 1991-07-18 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0529280A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7397155B2 (en) 2004-05-24 2008-07-08 Tomy Company, Ltd. Motor, drive unit and actuating device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7397155B2 (en) 2004-05-24 2008-07-08 Tomy Company, Ltd. Motor, drive unit and actuating device

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Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19981008