JPH05291845A - Differential amplifier - Google Patents
Differential amplifierInfo
- Publication number
- JPH05291845A JPH05291845A JP4087117A JP8711792A JPH05291845A JP H05291845 A JPH05291845 A JP H05291845A JP 4087117 A JP4087117 A JP 4087117A JP 8711792 A JP8711792 A JP 8711792A JP H05291845 A JPH05291845 A JP H05291845A
- Authority
- JP
- Japan
- Prior art keywords
- constant current
- temperature coefficient
- current source
- differential amplifier
- differential
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Landscapes
- Amplifiers (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は差動増幅器に関し、特に
金属−酸化物−半導体（ＭＯＳ）型電界効果トランジス
タ（以下、ＭＯＳ ＦＥＴと呼ぶ）を入力とする差動増
幅器の入力オフセット電圧温度ドリフト（以下、単にド
リフトと呼ぶ）を低減する回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a differential amplifier, and more particularly to an input offset voltage temperature drift of a differential amplifier having a metal-oxide-semiconductor (MOS) type field effect transistor (hereinafter referred to as MOS FET) as an input. The present invention relates to a circuit for reducing (hereinafter, simply referred to as drift).
【０００２】[0002]
【従来の技術】従来のＭＯＳ ＦＥＴを差動入力対とす
る差動増幅器として例えば特公昭５３−３９２３８号公
報がある。この公報によれば、差動入力対を構成するＭ
ＯＳＦＥＴの特性を整合させるための製法が述べられて
いるが、ドリフトについては示されていない。2. Description of the Related Art As a conventional differential amplifier using a MOS FET as a differential input pair, there is, for example, Japanese Patent Publication No. 53-39238. According to this publication, M constituting a differential input pair
A manufacturing method for matching the characteristics of the OSFET is described, but the drift is not shown.
【０００３】また、米国特許４，７２４，３９７号公報
にはバイポーラトランジスタで構成された差動増幅器の
オフセット電圧のトリミング及び低ドリフト化について
示されているが、ＭＯＳ ＦＥＴを差動入力対とする差
動増幅器については触れていない。Further, US Pat. No. 4,724,397 discloses trimming of offset voltage and reduction of drift of a differential amplifier composed of bipolar transistors, but a MOS FET is used as a differential input pair. No mention is made of differential amplifiers.
【０００４】[0004]
【発明が解決しようとする課題】ところで、ＭＯＳ Ｆ
ＥＴを差動入力対とする差動増幅器においては、バイポ
ーラトランジスタで構成した場合に比べて入力オフセッ
ト電圧が大きくなること、ＭＯＳ ＦＥＴを構成するた
めにマスク枚数が増加しコストが高くなる等の問題があ
るため、微小電流測定用の演算増幅器といった特殊な用
途にしか使用されないこともあり、低ドリフト化につい
て充分な考察はなされていなかった。By the way, MOS F
In a differential amplifier using ET as a differential input pair, the input offset voltage becomes larger than that in the case where it is composed of bipolar transistors, and the number of masks is increased to form a MOS FET, resulting in higher cost. Therefore, since it may be used only for a special purpose such as an operational amplifier for measuring a small current, sufficient consideration has not been given to reducing the drift.
【０００５】本発明の差動増幅器はこのような課題に着
目してなされたもので、その目的とするところは、ＭＯ
Ｓ ＦＥＴを差動入力対とする差動増幅器の低ドリフト
化を実現可能な差動増幅器を提供することにある。The differential amplifier of the present invention has been made in view of such a problem, and its purpose is to make MO
An object of the present invention is to provide a differential amplifier that can realize low drift of a differential amplifier that uses S FET as a differential input pair.
【０００６】[0006]
【課題を解決するための手段】上記の目的を達成するた
めに、本発明の差動増幅器は、差動入力対として動作す
る金属−酸化膜−半導体（ＭＯＳ）型電界効果トランジ
スタと、このＭＯＳ型電界効果トランジスタに定電流を
供給する定電流源とを具備し、前記定電流源が負の温度
係数を有する。To achieve the above object, a differential amplifier of the present invention comprises a metal-oxide film-semiconductor (MOS) type field effect transistor which operates as a differential input pair, and this MOS. Constant field source for supplying a constant current to the field effect transistor, the constant current source having a negative temperature coefficient.
【０００７】[0007]
【作用】すなわち、本発明においては、ＭＯＳ型電界効
果トランジスタを差動入力対とする差動増幅器におい
て、負の温度係数を有する定電流源を用いる。That is, according to the present invention, a constant current source having a negative temperature coefficient is used in a differential amplifier having a MOS field effect transistor as a differential input pair.
【０００８】[0008]
【実施例】まず、本発明の一実施例の概略を説明する。
本発明の一実施例においては、ＭＯＳ ＦＥＴを差動入
力対とする差動増幅器を構成する定電流源の温度係数を
負とすることを特徴とする。すなわち、入力オフセット
電圧ＶI0は、First, an outline of an embodiment of the present invention will be described.
One embodiment of the present invention is characterized in that the temperature coefficient of a constant current source forming a differential amplifier having a MOS FET as a differential input pair is made negative. That is, the input offset voltage V I0 is
【０００９】[0009]
【数１】 Ｉ：定電流、μ：キャリア移動度であり、μは負の温度
係数を持つ。そこで、定電流Ｉの温度係数を負とするこ
とにより入力オフセット電圧ＶI0の温度係数はキャンセ
ルされるためドリフトは発生しない。図１に本発明の一
実施例による差動増幅回路を示す。[Equation 1] I: constant current, μ: carrier mobility, and μ has a negative temperature coefficient. Therefore, by making the temperature coefficient of the constant current I negative, the temperature coefficient of the input offset voltage V I0 is canceled, so that no drift occurs. FIG. 1 shows a differential amplifier circuit according to an embodiment of the present invention.
【００１０】図１においてＭ１，Ｍ２は差動入力対を構
成するＰチャンネルＭＯＳ ＦＥＴである。Ｑ１，Ｑ２
はＭ１，Ｍ２の負荷となるカレントミラー回路を構成す
るＮＰＮトランジスタ、Ｉは定電流源であり、Ｉ1 ＋Ｉ
2 ＝Ｉである。Ｍ１，Ｍ２のゲート・ソース間の電圧を
それぞれＶGS1 ，ＶGS2 とすると入力オフセット電圧Ｖ
I0は以下のようになる。In FIG. 1, M1 and M2 are P-channel MOS FETs forming a differential input pair. Q1, Q2
Is an NPN transistor forming a current mirror circuit that serves as a load for M1 and M2, I is a constant current source, and I 1 + I
2 = I. If the gate-source voltages of M1 and M2 are V GS1 and V GS2 , respectively, the input offset voltage V
I0 is as follows.
【００１１】[0011]
【数２】 [Equation 2]
【００１２】式（１）〜（５）において添字１，２はそ
れぞれＭ１，Ｍ２のパラメータであることを示してい
る。ｋ＝μp Ｃoxであり、μp は正孔移動度、Ｃoxは単
位面積当たりのゲート酸化膜容量である。またＷはチャ
ンネル幅、Ｌはチャンネル長を表す。The subscripts 1 and 2 in the equations (1) to (5) indicate that they are parameters of M1 and M2, respectively. k = μ p Cox, μ p is the hole mobility, and Cox is the gate oxide film capacitance per unit area. W is the channel width and L is the channel length.
【００１３】式（４）からａ＝ｂ＝ｃ＝１、即ちＩ1 ＝
Ｉ2 、ｋ1 ＝ｋ2 、（Ｗ／Ｌ）1 ＝（Ｗ／Ｌ）2 であれ
ばオフセット電圧ＶI0＝０であり、更にａは温度変動が
小さくｂ，ｃは温度変動が無視できることからドリフト
も殆ど発生しないことがわかる。From equation (4), a = b = c = 1, that is, I 1 =
If I 2 , k 1 = k 2 , and (W / L) 1 = (W / L) 2 , then the offset voltage V I0 = 0. Further, a has a small temperature fluctuation, and b and c have a negligible temperature fluctuation. From this, it can be seen that drift hardly occurs.
【００１４】しかし、実際にはカレントミラー回路Ｑ
１、Ｑ２の誤差、ＩＣ製造時のホトマスクのずれ等によ
り、（１−ａ／ｂｃ）1/2 ＝０にならないためオフセッ
ト電圧が生じる。ここで、ドリフトに着目すると式
（５）はHowever, in reality, the current mirror circuit Q
(1-a / bc) 1/2 due to the error of 1, Q2, the shift of the photomask during IC manufacturing, etc. Since = 0 is not obtained, an offset voltage is generated. Here, focusing on the drift, Equation (5) is
【００１５】[0015]
【数３】 [Equation 3]
【００１６】となる。ｖi0は温度によって変化しないこ
とから、ドリフトは（Ｉ1 ／ｋ1 ）1/2 の温度変動が原
因であることが示される。ｋ＝μp Ｃoxであり、μp は
負の温度係数を持ち、Ｃoxは温度係数を持たない。従っ
てｋは負の温度係数を持つ。一方、Ｉ1 の温度係数は回
路によって自由に設計することが可能である。Ｉ1 の温
度係数をｋ1 の温度係数と等しくなるように設定すれば
温度係数はキャンセルされるためＶI0のドリフトは生じ
なくなる。図２に本発明の差動増幅器を用いて構成した
ＯＰアンプと従来のＯＰアンプのドリフトを示す。[0016] Since v i0 does not change with temperature, the drift is (I 1 / k 1 ) 1/2 It is shown that this is due to the temperature fluctuation of. k = μ p Cox, where μ p has a negative temperature coefficient and Cox has no temperature coefficient. Therefore, k has a negative temperature coefficient. On the other hand, the temperature coefficient of I 1 can be freely designed by the circuit. If the temperature coefficient of I 1 is set to be equal to the temperature coefficient of k 1 , the temperature coefficient is canceled and the drift of V I0 does not occur. FIG. 2 shows drifts of an OP amplifier configured using the differential amplifier of the present invention and a conventional OP amplifier.
【００１７】従来のＯＰアンプでは定電流源として例え
ば（ｋＴ／ｑＲ）ｌn Ｎで表される特性のものを用い
る。ｋはボルツマン定数、Ｔは絶対温度、ｑは電子の電
荷、Ｒは電流値設定用の抵抗値、Ｎは定数である。図２
から明らかなように、本発明によればドリフトを低減す
ることができる。In the conventional OP amplifier, a constant current source having a characteristic represented by (kT / qR) ln N is used. k is a Boltzmann constant, T is an absolute temperature, q is an electron charge, R is a resistance value for setting a current value, and N is a constant. Figure 2
As is apparent from the above, according to the present invention, the drift can be reduced.
【００１８】[0018]
【発明の効果】以上の説明から明らかなように、本発明
によれば、ＭＯＳ型電界効果トランジスタを差動入力対
とする差動増幅器のドリフトを低減することができる。As is apparent from the above description, according to the present invention, it is possible to reduce the drift of a differential amplifier having a MOS field effect transistor as a differential input pair.
【図１】本発明の一実施例による差動増幅回路を示す図
である。FIG. 1 is a diagram showing a differential amplifier circuit according to an embodiment of the present invention.
【図２】本発明の差動増幅器を用いて構成したＯＰアン
プと従来のＯＰアンプのドリフトを比較して示す図であ
る。FIG. 2 is a diagram showing a comparison between drifts of an OP amplifier configured using the differential amplifier of the present invention and a conventional OP amplifier.
Ｍ１、Ｍ２…ＰチャンネルＭＯＳ ＦＥＴ、Ｑ１、Ｑ２
…ＮＰＮトランジスタ、Ｉ…定電流源。M1, M2 ... P-channel MOS FET, Q1, Q2
… NPN transistor, I… Constant current source.
Claims (1)
−半導体（ＭＯＳ）型電界効果トランジスタと、 このＭＯＳ型電界効果トランジスタに定電流を供給する
定電流源とを具備し、 前記定電流源が負の温度係数を有することを特徴とする
差動増幅器。1. A constant current source for supplying a constant current to a metal-oxide film-semiconductor (MOS) type field effect transistor which operates as a differential input pair, and a constant current source for supplying a constant current to the MOS type field effect transistor. A differential amplifier characterized in that the source has a negative temperature coefficient.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4087117A JPH05291845A (en) | 1992-04-08 | 1992-04-08 | Differential amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4087117A JPH05291845A (en) | 1992-04-08 | 1992-04-08 | Differential amplifier |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05291845A true JPH05291845A (en) | 1993-11-05 |
Family
ID=13906012
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4087117A Withdrawn JPH05291845A (en) | 1992-04-08 | 1992-04-08 | Differential amplifier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05291845A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013030830A (en) * | 2011-07-26 | 2013-02-07 | New Japan Radio Co Ltd | Operational amplifier |
| JP2017169092A (en) * | 2016-03-17 | 2017-09-21 | 富士電機株式会社 | Offset correction circuit and transconductance proportional current generation circuit |
-
1992
- 1992-04-08 JP JP4087117A patent/JPH05291845A/en not_active Withdrawn
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013030830A (en) * | 2011-07-26 | 2013-02-07 | New Japan Radio Co Ltd | Operational amplifier |
| JP2017169092A (en) * | 2016-03-17 | 2017-09-21 | 富士電機株式会社 | Offset correction circuit and transconductance proportional current generation circuit |
| US9917552B2 (en) | 2016-03-17 | 2018-03-13 | Fuji Electric Co., Ltd. | Offset correction circuit and transconductance proportional current generation circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19990608 |