JPH05289699A - Encoding and decoding device for signal - Google Patents

Abstract

PURPOSE:To prevent an overflow and decrease quantization errors by decreasing inputs by a multiplier at the preceding stage of ADPCM encoding. CONSTITUTION:This device is equipped with an integrator 1 which makes high frequency components of a signal for reducing the variation width of an input signal hard to pass, an ADPCM(adaptive difference pulse code modulation) encoding part 2, a decoding part 3 which restores an encoded signal, and a differentiator 4 which passes the high frequency components passed little through the integrator 1, much and puts the frequency characteristics back to the original frequency characteristics. Then, the integrator 1 consists of a 1st multiplier (bit shifter) which reduces the input signal to a half level, an adder 12, and a 2nd multiplier (bit shifter) which reduces the output of the adder 12 to a half level, feeds it back to the adder 12 through a delay unit 14, and adds it to the output of the 1st multiplier 11. For example, even if the input signal varies in value greatly between unit samples, the value varying between the unit samples can be made small by this integrator 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to adaptive differential pulse code modulation (Adaptive Dif) used for band compression of voice signals.
ferential pulse code modulation-ADPCM) method.

[0002]

2. Description of the Related Art For example, Japanese Patent Publication No. 63-5926 (H03)
(M3 / 04), a subtracter for obtaining the difference between the input signal x _j and the predicted value, and an adaptive quantization for inputting the output of this subtractor and dividing by the adaptively changing normalization coefficient Δ and then encoding and outputting , An adaptive dequantizer that inputs the output of this quantizer, decodes it with a decoder, and then multiplies it with a normalization coefficient, and the result of multiplying the normalization coefficient with the dequantizer, and obtains a predicted value And an adaptive predictor which modifies the coefficient of a filter for obtaining a predicted value using the input or output of the decoder and an adaptive predictive DPC
An M device is disclosed.

Such a technique has an advantage that it is resistant to an error in a transmission line or a storage medium, has a good band compression characteristic, and has an extremely small scale.

However, in the technique of the above publication, the input signal is
Value (X _j-X_j-1) Is large
The prediction error e_jBecomes larger, the quantization width (normalization coefficient
(Number) Δ is also large, so the quantization error is large.
there were.

[0005]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems in the prior art, and it is an object of the present invention to provide means for suppressing an increase in quantization error when an input signal is encoded. .

[0006]

SUMMARY OF THE INVENTION The present invention is an adaptive differential pulse code modulation encoder for compressing an input signal by encoding,
An adaptive differential pulse code modulation decoder that restores a compressed signal to an original signal, an integrator that is provided in the preceding stage of the encoder to absorb fluctuations of a signal input to the encoder, and a decoder of the decoder. And a differentiator provided in a subsequent stage and functioning as an inverse filter of the integrator.

The integrator sets the magnitude of the input signal to 1 in order to suppress overflow in the integrator.
The first multiplier or bit shifter for changing the output signal of the first multiplier to 1/2, the second multiplier for decreasing the output signal of the first multiplier to 1/2, and the output of the second multiplier are fed back. And an adder for adding to the first output.

[0008]

With the above structure, the integrator placed in the preceding stage of the ADPCM encoder reduces the value that fluctuates between samples of the input signal and reduces the prediction error. Therefore, the value of the quantization width is reduced, and the quantization error can be reduced.

Further, in the integrator, the multiplier or the bit shifter suppresses the overflow of the output of the integrator.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the signal coding / decoding apparatus of the present invention will be described in detail below with reference to the drawings.

FIG. 1 shows a schematic diagram of an encoding / decoding device,
Reference numeral 1 is an integrator that reduces the fluctuation range of the input signal to make it difficult for high-frequency components of the signal to pass therethrough.
The decoding unit 4 for restoring the encoded signal of 1 to the original signal is a differentiator that allows a large amount of high frequency components, which have been slightly passed by the integrator 1, to pass therethrough and restores the original frequency characteristics.

The integrator 1 outputs the first multiplier (bit shifter) 11 for halving the signal input thereto, the adder 12, and the output of the adder 12. It is composed of a second multiplier (bit shifter) that reduces the size to ½ and feeds it back to the adder 12 via the delay device 14 and adds it to the output of the first multiplier 11.

On the other hand, the differentiator 4 includes a third multiplier 41 that doubles the output from the decoding unit 3, a second adder 42 that receives the output of the multiplier 41, and the decoding unit. The delay unit 43 delays the output of the conversion unit 3 and outputs it to the adder 42, and adds the output to the output of the multiplier 41.

In such a structure, the input signal first passes through the integrator 1 on the encoding side. As a result, even if the input signal varies greatly between unit samples, the value that varies between unit samples by the integrator 1 becomes small.

Also, by halving the signal value by the first and second multipliers 11 and 13, the output from the integrator 1 does not overflow.

With this configuration, even when a maximum value of 16 bits is input, for example, the output of the first multiplier 11 becomes 15 bits, and the output of the first multiplier 11 is further bit-shifted by the second multiplier 13. Since they are added, the output of the integrator 1 does not exceed 16 bits.

Next, the output signal of the integrator 1 is ADPCM.
It is encoded by the encoding unit 2. The input signal to the encoding unit 2 at this time has a small value that varies between unit samples by the integrator 1, so that the encoding unit 2 encodes it with high accuracy and a small quantization error. It has become a thing.

On the one decoding side, first, the ADPCM decoding section 3 decodes. And the decoded signal is
It is output through a differentiator 4 which is an inverse filter of the integrator 1.

FIG. 2 is a block diagram showing the details of the ADPCM encoder 2 and decoder 3 shown in FIG. In the figure, the encoder 2 has an input signal x _n at an arbitrary sampling time.
An adder 21 that calculates a difference d _n between the prediction signal y _n and the prediction signal y _n , a quantization width determination unit 22 that determines a quantization width Δ _n ,
From the output of the quantizer 23 and the quantizer 23, which obtains the coded value L _n from the quantization width Δ _n and the difference d _n by the following equation 2 and the quantized value q _n from equation 3 And an encoder 24 for extracting the encoded value L _n .

[0020]

[Equation 1]

[0021]

[Equation 2]

[0022]

[Equation 3]

The output L _n of the encoder 24 is fed back to the quantization width determining unit 22, and the quantization width at the next sampling is changed based on the following equation (4).

[0024]

[Equation 4]

In the above equation 4, the multiplier M (L _n ) is shown in Table 1 below.
It is a numerical value determined based on (in the case of 4-bit encoding).

[0026]

[Table 1]

[0027] 25 adds the said prediction signal y _n and the output q _n of the quantizer 23, an adder for obtaining the w _n by the following equation (5), the w _n is following through the delay unit 26 It becomes the prediction signal y _{n + 1} at the time of sampling.

[0028]

[Equation 5]

The coded value L _n thus obtained after each sampling time is input to the decoding unit 3.

[0030] and the quantization width determination unit 31 for determining a quantization width delta _n based decoder 3 in Table 1 by the input L _n,
A decoder 32 for calculating a quantized value q ′ _n by the following equation 6 using the quantized width Δ _n and the input L _n , and the quantized value
by adding _{n + 1} 'prediction signal y to _n' q and an adder 33 to obtain a decoded value w _'n.

[0031]

[Equation 6]

The decoded value w ′ _n is passed through the delay unit 34 to obtain the predicted signal y ′ _{n + 1} for the next sampling. It should be noted that these calculations are expressed in Equation 7.

[0033]

[Equation 7]

The input signal x _n in FIG. 2 is obtained by reducing the fluctuation width of the original signal by the integrator 1 in FIG. 1, and the difference obtained by the adder 21, that is, the prediction error d _n is small. Has become. Therefore, the reliability of the coded value L _n obtained by the quantizer 23 or the encoder 24 becomes high, and an encoding / decoding device with a small error in the quantized value q _n , that is, a quantization error, can be obtained.

Then, as compared with the case where the encoding / decoding is performed by the conventional device without the integrator 1 and the differentiator 4, the S / N of the input signal to the encoding unit 2 and the output signal from the decoding unit 3 is S / N.
It was found that the ratio was improved by about 5 to 6 dB and that the quantization error was also reduced perceptually.

[0036]

As described above, the present invention is ADPCM.
By reducing the input by the multiplier in the previous stage of encoding, it is possible to prevent the overflow due to encoding and also reduce the quantization error, which is also effective when the input signal fluctuates significantly between unit samples. There is an effect that the encoding / decoding device that is

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a signal coding / decoding apparatus of the present invention.

FIG. 2 is a block diagram showing an embodiment of an encoding unit and a decoding unit in FIG.

[Explanation of symbols]

 1 integrator 2 ADPCM coding unit 3 ADPCM decoding unit 4 differentiator

Claims (2)

[Claims] 1. An adaptive differential pulse code modulation encoder for compressing an input signal by coding, an adaptive differential pulse code modulation decoder for restoring a compressed signal to an original signal, and an upstream stage of the encoder. A coding / decoding apparatus for signals, which comprises an integrator that absorbs fluctuations in a signal input to the encoder, a differentiator that is provided at a subsequent stage of the decoder and functions as an inverse filter of the integrator. 2. The integrator reduces the magnitude of an input signal by half in order to suppress overflow in the integrator.
A first multiplier or a bit shifter, a second multiplier that reduces the magnitude of the output signal of the first multiplier to ½, and an output of the second multiplier by feeding back the output of the second multiplier. 2. The signal coding / decoding apparatus according to claim 1, further comprising an adder for adding the output to the 1 multiplier.