JPH05284466A - Picture memory device - Google Patents

Abstract

PURPOSE:To detect a dropout of picture data and to compensate the dropout with picture data of the same field. CONSTITUTION:Field memories 41, 42, 43, 44 store data missing information data (c) by one field and store picture data (b) for one field period to embed the data missing information data (c) to a missing part of the picture data (b) and store the result. A dropout detection circuit 16 detects data missing information data (c) with respect to output data (h) read by the field memories 41, 42, 43, 44. A dropout compensation circuit 17 compensates the data missing information data included in the output data (h) read by the field memories 41, 42, 43, 44 corresponding to the result of detection of the dropout detection circuit 16 by replacing the data missing information data with picture data included in the output data (h) for the same field.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image memory device used in, for example, a UNIHI standard high-definition video tape recorder having a memory for a plurality of fields, and more particularly to an image memory device suitable for special reproduction.

[0002]

2. Description of the Related Art In recent years, due to the improvement in the integration density of semiconductor memories, there is a VTR which has a memory for a plurality of fields, such as the format of a high definition video tape recorder of the UNIHI standard. It was In such a VTR, various functions can be added by using the above field memory.

Incidentally, even in a VTR having a memory for a plurality of fields, during special reproduction such as fast-forward reproduction and double-speed reproduction, the trace line of the reproducing head deviates from the trace line of normal reproduction, that is, the track pattern. In that case, a sufficient envelope cannot be obtained and dropout occurs in the reproduction signal.

FIG. 4 is an explanatory diagram showing the principle of occurrence of such dropout.

In FIG. 4, reference numeral 91 is a UNIHI VTR magnetic tape, and track patterns 92 are recorded on the magnetic tape 91 at predetermined intervals in an oblique direction. In the case of normal reproduction, the magnetic head traces along the track pattern, but in the case of special reproduction, the magnetic head traces at the trace line 93 having a different inclination from the track pattern. Is a period 94 during which the magnetic head performs a track jump between adjacent track patterns 92.
Therefore, the amplitude is greatly reduced. Therefore, a dropout occurs in the reproduction signal y obtained by performing FM demodulation on the reproduction envelope signal x.

Here, in a VTR having a memory for a plurality of fields, when video information is written in the memory,
Signal loss becomes a problem. In particular, when a dropout as shown in FIG. 4 occurs, no data is written to the memory at the address corresponding to that dropout, and data of one frame or earlier remains, so that past data is lost. It remains as an afterimage, and in special reproduction such as fast-forward reproduction or double-speed reproduction in which the screen changes rapidly, an unnatural image is left on the screen.

[0007]

In the above-mentioned conventional VTR having a memory for several fields, when a dropout occurs due to the track jump of the reproducing head during special reproduction, it corresponds to the dropout. Since data is not written in the memory of the address to be written, and data of one frame or earlier remains, past data remains as an afterimage and an unnatural image is left on the screen.

It is an object of the present invention to eliminate the above-mentioned problems, detect a dropout of image data, and provide an image memory device capable of compensating for this dropout with image data of the same field.

[0009]

An image memory device according to the present invention includes a conversion circuit for converting a video signal reproduced by a video head into image data, and data loss information indicating that the image data is lost. A data missing information generating circuit for creating data, a plurality of multiplexers for dividing the image data into one field period, and alternately guiding the image data and the data missing information data of different one field periods to an output terminal, By storing the data loss information data for one field from the plurality of multiplexers and then storing the image data for one field period, a plurality of field memories for storing the data loss information data by embedding the data loss information data in the missing portion of the image data are stored. , These plural field memories are the image data for one field period. A field memory read control circuit for sequentially reading the plurality of field memories in the stored state; and a dropout detection circuit for detecting the data missing information data with respect to the data read from the plurality of field memories. A dropout compensation circuit that replaces the data missing information data included in the output data read from the plurality of field memories corresponding to the detection result of the dropout detection circuit with the image data included in the same output data. It is characterized by having done.

[0010]

According to this structure, the plurality of field memories store the image data for one field period after storing the data loss information data for one field, so that the data loss information is stored in the missing portion of the image data. The data is embedded and stored, the dropout detection circuit detects the data missing information data in the output data read from the plurality of field memories, and the dropout compensation circuit detects the detection result of the dropout detection circuit. Correspondingly, since the data missing information data included in the output data read from the plurality of field memories is replaced with the image data included in the same output data, the dropout of the image data is detected, and this dropout is detected in the same field. Can be compensated with the image data of.

[0011]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of an image memory device according to the present invention, which is applied to a high definition VTR of the UNIHI standard.

In FIG. 1, reference numeral 11 is an input terminal to which a reproduction signal a obtained by performing FM demodulation on the reproduction envelope signal is introduced, and the reproduction signal a introduced to this input terminal 11 is 8-bit analog / digital conversion. It is supplied to a circuit (hereinafter referred to as an 8-bit A / D conversion circuit) 12. The 8-bit A / D conversion circuit 12 converts the reproduction signal a into 8-bit image data b to convert the multiplexers 21, 22, 23, 2
4 to the input terminal A.

On the other hand, the data loss information generation circuit 13 creates the data loss information data c for indicating that the image data b is lost, and the multiplexers 21, 22, 23 ,.
It is supplied to 24 input terminals B. As the data loss information data in this case, (1, 1, 1, 1, 1, 1, 1, 1, 1) in which all 8-bit data is at a high level is used.

The field memory write control circuit 14 has first to fourth field memory write control signals d1 and d.
2, d3 and d4 are created to generate OR circuits 31 and 3 respectively.
It is supplied to one of the input terminals of 2, 33, and 34. The field memory write control circuit 14 supplies the first to third field memory write control signals d1, d2, d3 to the other input terminals of the OR circuits 32, 33, 34, respectively, and the multiplexers 22, 23 respectively. ，
It is supplied to 24 select terminals SEL. OR circuit 3
4 obtains the logical sum of the field memory write control signals d3 and d4, and outputs the logical sum signal e4 to the multiplexer 2
It is supplied to the select terminal SEL of 1, the other input terminal of the OR circuit 31 and the write control signal input terminal of the field memory 44. The OR circuit 31 takes the logical sum of the field memory write control signal d1 and the signal e4 from the OR circuit 34 and supplies the logical sum signal e1 to the write control signal input terminal of the field memory 41. The OR circuit 32 is
The logical sum of the field memory write control signal d1 and the field memory write control signal d2 is calculated, and the signal e2 of this logical sum is supplied to the write control signal input terminal of the field memory 42. The OR circuit 33 receives the field memory write control signal d2 and the field memory write control signal d.
3, and the signal e3 of this logical sum is supplied to the write control signal input terminal of the field memory 43.

Multiplexers 21, 22, 23, 24
Is an output terminal OUT which uses the image data b supplied to the input terminal A as data f1, f2, f3, and f4, respectively, when the signal supplied to the select terminal SEL is low level.
When the signal supplied to the select terminal SEL is at high level, the data missing information data c supplied to the input terminal B is guided to the output terminal OUT as data f1, f2, f3, f4, respectively.

The data f1, f2, f3, f4 from the output terminals OUT of the multiplexers 21, 22, 23, 24 are supplied to the data input terminals of the field memories 41, 42, 43, 44, respectively.

The field memory read control circuit 15 controls the first to fourth field memory read control signals g1 and g.
2, g3 and g4 are created and the field memories 4
The read control signal input terminals 1, 42, 43 and 44 are supplied.

Field memories 41, 42, 43, 44
Writes the signal from the output terminal of the multiplexer when the signals e1, e2, e3, and e4 supplied to the write control signal input terminals are at a high level, and reads the field memory supplied to the read control signal input terminals. When the control signals g1, g2, g3, g4 are at high level, the stored data is used as the output data h and the signal from the output terminal is read.

Field memories 41, 42, 43, 44
The output data h read from is supplied to the dropout compensation circuit 17 via the dropout detection circuit 16.
The dropout detecting circuit 16 supplies the control signal i indicating the selection result to the dropout compensating circuit 17 by detecting the data missing information data from the output data h. When the control signal i indicates a dropout, the dropout compensating circuit 17 conforms to the UNIHI standard and performs one horizontal period (hereinafter referred to as 1H) for the data missing information data corresponding to the position of the luminance signal of the output data h. The data missing information data corresponding to the position of the color signal of the output data h is replaced with the data 2H before and output as the image data j in which the dropout is compensated. Here, the reason why the data missing information data corresponding to the position of the color signal is replaced with the data of 2H before is that the color signal is inverted and stored every 1H in the magnetic tape in the VTR of the UNIHI standard. This is because Further, the dropout compensation circuit 17 outputs the output data h as it is as the image data j when the control signal i does not indicate the dropout. The image data j output from the dropout compensation circuit 17 is converted into an analog reproduction signal by an 8-bit digital / analog conversion circuit,
The luminance signal and the color difference signal are processed by the reproduction color signal processing circuit and the reproduction luminance signal processing circuit in the subsequent stage, and output as a video signal from the video signal output terminal provided in the cabinet of the VTR.

The operation of this embodiment will be described below.

2 and 3 are timing charts showing the operation of the embodiment shown in FIG. 1, and are shown in FIGS. 2 (a), 2 (b),
2 (c) and 2 (d) show the first to fourth field memory write control signals d1, d2, d3, d4, respectively, and FIGS. 2 (e), 2 (f), 2 (g). ), Fig. 2
3 (h) shows the first to fourth field memory read control signals g1, g2, g3, g4, respectively.
(A), FIG. 3 (b), FIG. 3 (c), and FIG. 3 (d) show the first to fourth field memories 41, 42, 43, respectively.
Data missing information data E1, E2, E stored in 44
3, E4, and FIG. 3 (e), FIG. 3 (f), FIG.
(G) and FIG. 3 (h) show the data written in the first to fourth field memories 41, 42, 43, 44 and the read period thereof, respectively.

Field memory write control signals d1, d2, d3 from the field memory write control circuit 14
d4 is shown in FIG. 2 (a), FIG. 2 (b), FIG. 2 (c), FIG.
As shown in (d), the level becomes high in the first to fourth fields. That is, the field memory write control signals d1, d2, d3, d4 are 1 in 4 field cycles.
The high level during the field period and the high level of the field memory write control signals d1, d2, d3, d4 are d1 → d2 → d3 → d4 → d1. As a result, the multiplexers 22, 23, 24 are respectively arranged in the field memory 4 in the first to third fields.
2, 43, and 44 are supplied with the data loss information data c as data f2, f3, and f4, respectively, and the image data b is stored in the field memories 42, 43, and 44 in fields other than the first to third fields, respectively. , F3, f4. Multiplexer 2
In the third and fourth fields, 1 supplies the missing data information c to the field memory 41 as the data f1 and supplies the image data b to the field memory 41 as the data f1 in the first and second fields, respectively.

On the other hand, the signal e1 supplied to the write control signal input terminal of the first field memory 41 becomes high level in the first, third and fourth fields and becomes low level in the second field. Second field memory 42
The signal e2 supplied to the write control signal input terminal of 1 becomes high level in the first and second fields and becomes low level in the third and fourth fields. The signal e supplied to the write control signal input terminal of the third field memory 43
3 has a high level in the second and third fields and has a low level in the first and fourth fields. The signal e4 supplied to the write control signal input terminal of the fourth field memory 44 becomes high level in the third and fourth fields and becomes low level in the first and second fields.

First to fourth field memories 41, 4
Signals g1, g2, g3, g4 supplied to the write control signal input terminals of Nos. 2, 43, 44 are as shown in FIG.
As shown in (f), FIG. 2 (g), and FIG. 2 (h), the third field, the fourth field, the first field,
High level in the second field.

As a result, the first to fourth field memories 41, 42, 43, and 44 are stored in FIG.
As shown in (b), FIG. 3 (c), and FIG. 3 (d), the fourth field, the first field, the second field,
In the third field, the data loss information data c is written as data loss information data E1, E2, E3, E4, respectively. In the field memory 41, as shown in FIG. 3E, the missing data information E1 is written in the fourth field, and the image data c is written in the first field.
Is written as image data W1 and the data stored in the third field is read as read data R1.
In the field memory 42, as shown in FIG. 3F, the data loss information data E2 is written in the first field, the image data c is written as the image data W2 in the second field, and the data is stored in the fourth field. The read data is read as read data R2. In the field memory 43, as shown in FIG. 3G, the data missing information data E3 is written in the second field,
The image data c is written as the image data W3 in the field, and the data stored in the first field is read as the read data R3. Field memory 44
3H, data loss information data E4 is written in the third field, image data c is written as image data W4 in the fourth field, and data stored in the second field is Read as read data R4. As a result, the field memories 41, 42, 43 and 44 respectively have the third fields,
Read data R1, R2, R3, and R4 are read in the fourth field, the first field, and the second field, respectively. The data R1, R2, R3 and R4 are supplied as output data h to the dropout compensation circuit 17 via the dropout detection circuit 16.

Here, for example, if a dropout occurs in the image data W1 written in the field memory 41 due to a track jump at the time of special reproduction, the memory at the address corresponding to the dropout in the first field is not written. Although not performed, since the data missing information data E1 is written in the memory of the address corresponding to the dropout in the fourth field, the data corresponding to the dropout of the read data R1 read in the third field is written. The data missing information data E1 is embedded. The dropout detection circuit 16 uses the read data R embedded in this way.
The data loss information data E1 of 1 is detected, and the control signal i indicating the selection result is supplied to the dropout compensation circuit 17. Thereby, the dropout compensation circuit 17 replaces the data lacking information data corresponding to the position of the luminance signal of the output data h with the image data of 1H before, and the data corresponding to the position of the luminance signal of the output data h. The missing information data is replaced with the data 2H before and output as the image data j in which the dropout is compensated. The same applies to the field memories 42, 43 and 44.

According to such an embodiment, since the dropout of the image data can be detected and the dropout can be compensated by the image data of the same field, a track jump such as fast forward reproduction or double speed reproduction occurs. The image quality during special playback can be improved.

[0029]

According to the present invention, a dropout of image data can be detected, and the dropout can be compensated by the image data of the same field. Therefore, the image quality during special reproduction in which a track jump occurs is improved. be able to.

[0030]

[Brief description of drawings]

[0031]

FIG. 1 is a block diagram showing an embodiment of an image memory device according to the present invention.

[0032]

2 is a timing chart showing a field memory write control signal and a field memory read control signal in the embodiment of FIG.

[0033]

FIG. 3 is a timing chart showing writing and reading of data in the field memory in the embodiment of FIG.

[0034]

FIG. 4 is an explanatory diagram showing a principle of occurrence of dropout of a conventional VTR.

[0035]

[Explanation of symbols]

 12 8-bit A / D conversion circuit 13 Data loss information generation circuit 14 Field memory write control circuit 15 Field memory read control circuit 16 Dropout detection circuit 17 Dropout compensation circuit 21, 22, 23, 24 Multiplexer 41, 42, 43, 44 field memory

Claims (1)

[Claims] 1. A conversion circuit for converting a video signal reproduced by a video head into image data, a data loss information generation circuit for generating data loss information data for indicating that the image data is lost, and the image. A plurality of multiplexers for dividing the data into one field period and alternately guiding the image data and the data loss information data of different one field periods to the output terminal, and data loss information for one field from the plurality of multiplexers. By storing the image data for one field period after storing the data, a plurality of field memories for storing the missing data information data by embedding the missing data information data in the missing portion of the image data, and the plurality of field memories for the image data for one field period. With these multiple field memos And a dropout detection circuit for detecting the data missing information data in the data read from the plurality of field memories, and a detection result of the dropout detection circuit. An image memory device comprising: a dropout compensating circuit which replaces data loss information data included in output data read from the plurality of field memories correspondingly with image data included in the same output data.