JPH05284000A - Digital signal output stage circuit - Google Patents

Abstract

PURPOSE:To realize a digital signal output stage circuit in which the wired OR of an output signal is possible and the transition to 'H' of the output signal is performed at high speed. CONSTITUTION:Switch circuits (a NOT gate 31, a transistor Tr2) are connected in parallel with a pull-up resistance R1 of an open drain form circuit. The threshold in the input of the NOT gate 31 is set to a value which is smaller than a normal value. By the works of these switch circuits, the wired OR of an output signal is possible and the output signal transits from 'L' to 'H' at high speed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal output stage circuit, and more particularly to a digital signal output stage circuit for driving a digital output signal by a MOS transistor or the like (or bipolar transistor). , Improvement of a so-called open drain type (or open collector type) digital signal output stage circuit.

[0002]

2. Description of the Related Art As a most standard example of a conventional standard digital signal output stage circuit, FIG. 3 shows a digital signal output stage circuit using a CMOS type inverter circuit. Here, 1 is a CMOS inverter, and 2 is a load. CMO
The S inverter 1 receives the input signal A and outputs an output signal Z, which is an inverted signal of the input signal A, to a load 2 including, for example, a gate and a capacitive element. More specifically, when the input signal A is "L", the output signal Z based on the voltage and current from the power source Vcc.
Are supplied to the load 2 via the PMOS transistor. When the input signal A is "H", the ground GND
The output signal Z due to the voltage and current to the load 2 flows from the load 2 via the NMOS transistor. In this way, the output signal Z is output and the load 2 is driven.

However, in this digital signal output stage circuit, when the signal line of the output signal Z is connected to the signal lines of other output signals, the balance of the number of transistors on the signal current supply side and the inflow side cannot be maintained. Therefore, proper drive cannot be guaranteed. Therefore, it is not suitable for wired-ORing the output signal. Therefore, this alone restricts the degree of freedom in circuit design, so that a so-called open drain type digital signal output stage circuit is also used in order to remove the restriction.

FIG. 4 shows an example using a conventional open drain type drive circuit. Where 2 is the load, 3 and 4
Are open drain type circuits. The open drain type circuit 3 also receives the input signal A and outputs the output signal Z which is the inverted signal thereof to the load 2. More specifically, when the input signal A is "L", the output signal Z by the voltage and current from the power source Vcc is supplied to the load 2 via the pull-up resistor R1. When the input signal A is "H", the output signal Z due to the voltage and current to the ground GND flows from the load 2 through the NMOS transistor Tr1. In this way, the output signal Z is output and the load 2 is driven. The same applies to the open drain type circuit 4.

By the way, in this digital signal output stage circuit, the signal line of the output signal Z may be connected to the signal lines of other output signals. In this example, the output signals of the open drain type circuit 3 and the open drain type circuit 4 are wired-ORed. However, unlike the case of the CMOS type, it has a pull-up resistor instead of a transistor on the signal current supply side. Therefore, the resistance value is set to an appropriate value so that the maximum value of the signal current falls within the range of the drive capability of the transistor on the inflow side. Then, this digital signal output stage circuit can be wired-OR. By using such an open drain type circuit together, reduction of the circuit scale and easiness of circuit modification can be ensured.

[0006]

As described above, an open drain type circuit capable of wired OR output is also used as such a conventional digital signal output stage circuit in order to secure a degree of freedom in circuit design. .. However, in the conventional open drain type circuit, a pull-up resistor is used in order to keep the limit of the capacity of the signal current intake side transistor, and the outflow current of the signal current is limited to a small value below a predetermined value. Therefore, even if the transistor is switched from "ON" to "OFF" at high speed, the driving capability tends to be insufficient when the output signal transits from the "L" to the "H" voltage state.

In particular, when the load is capacitive, if the capacitance is large, it takes time to charge and the output signal transition performance to "H" deteriorates. As described above, prioritizing the degree of freedom in circuit design is a problem because the operating speed of the circuit is sacrificed. An object of the present invention is to solve the above-mentioned problems of the prior art, and it is possible to perform a wired-OR of the output signal, and further, the transition of the output signal to "H" is high, and the digital signal output stage circuit is fast. Is to be realized.

[0008]

The structure of the digital signal output stage circuit of the present invention which achieves the above object is an open drain type digital signal output stage circuit in which an output signal is pulled up by a pull-up resistor. A circuit connected to the pull-up resistor in parallel, a switch circuit that conducts when the output signal is equal to or higher than a predetermined threshold value and shuts off when the output signal is equal to or lower than the threshold value, and a circuit that receives the output signal or a load side The threshold value is set to a value smaller than the value at which the output signal is significant.

[0009]

In the digital signal output stage circuit of the present invention having such a configuration, the switch circuit is connected in parallel with the pull-up resistor of the open drain type circuit. And
When the output signal is "L" or becomes "L",
This switch circuit is turned off. Then, the current that flows into the transistor on the suction side of the signal current is only through the pull-up resistor as in the case of the conventional open drain type circuit. Therefore, it is possible to wire-OR the output signal by driving the transistor having the same capacity as the conventional one.

Further, in the opposite case, that is, when the transistor is "ON" and the output signal is "L", the transistor is "OFF". Initially, it is limited via the pull-up resistor. The generated current is supplied to the load side. At this point, the current is the same as the conventional one, and the output signal gradually changes from "L" to "H" by this current. However, in the digital signal output stage circuit of the present invention, the switch circuit is connected to the open drain type circuit, and when the output signal slightly shifts to the "H" side, it immediately reaches the low threshold value of the switch circuit. Conducts.

Then, from this point of time, the current through the switch circuit becomes the current of the output signal in addition to the current through the pull-up resistor, so that the driving capability immediately increases. Therefore, a larger current than the conventional one is supplied as an output signal to the load side, so that the driving capability does not become insufficient even if the output destination is a capacitive load. Therefore, as soon as the transistor switches from "ON" to "OFF",
The output signal can transit from "L" to "H".

Therefore, in this digital signal output stage circuit which also has a switch circuit, the wired OR of the output signals is used.
Therefore, it can be said that the output signal transitions to "H" at a high speed. As a result, by adding the digital signal output stage circuit of the present invention to the conventional digital signal output stage circuit, it becomes possible to achieve both the degree of freedom in circuit design and the speedup of the circuit.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the digital signal output stage circuit having the structure of the present invention will be described below with reference to the circuit diagram of FIG. Here, 2 is a load, and 30 is a digital signal output stage circuit. The load 2 is a circuit or element having a relatively large capacity, and corresponds to, for example, a memory element in a dynamic RAM or a relay to which an arc extinguishing capacitor is connected.

The digital signal output stage circuit 30 comprises an open drain type circuit and a switch circuit added thereto. The open drain type circuit is
An NMOS transistor Tr that receives the input signal A as a base
1 and the pull-up resistor R1 are sequentially connected between the power supply Vcc and the ground GND, and the output signal Z is output to the load 2 from these connection points.

Further, the switch circuit is N in this example.
It is mainly composed of the OT gate 31 and the PMOS transistor Tr2. The NOT gate 31 receives the output signal Z, generates an inverted signal of the output signal Z, and outputs the inverted signal to the base, thereby controlling the conduction interruption of the transistor Tr2. Further, the source and drain of the transistor Tr2 are connected in parallel to the pull-up resistor R1, and when the transistor Tr2 becomes conductive, a current parallel to the pull-up resistor R1 flows.
Therefore, in short, this switch circuit is a switch circuit that is opened and closed in parallel with the pull-up resistor R1 according to the value of the output signal Z. The resistor R2 is a load circuit for adjusting the base current of the transistor and is not essential.

With such a switch circuit connected in parallel to the pull-up resistor R1, the output signal Z
Is "L", the transistor Tr2 is "OFF"
Is. Therefore, even if the existence of the switch circuit in the cutoff state is ignored for the time being, the remaining circuit states are equivalent. Then, since the circuit excluding the switch circuit is the same as that of the conventional open drain type circuit, even if the output signal is wired-OR as in the conventional case, the signal current can be sucked by the transistor Tr1 which is "ON". .. When the output signal is wired-ORed, only one parallel circuit including the pull-up resistor and the switch circuit may be used as a common circuit with other open drain type circuits.

When the input signal A changes from "H" to "L", the transistor Tr1 which has been "ON" accordingly turns "OFF". Then, if the other digital signal output stage circuit that is wired-OR outputs "H", the output signal Z changes from "L" to "H". At this time, initially, the current is supplied to the load 2 via the pull-up resistor R1 and the like. In this state where the switch circuit is still cut off, the operation is similar to the conventional one, and when the load capacitance is large, the output signal gradually changes from "L" to "H".
Transition to.

However, in the NOT gate 31, the threshold value on the input side is set to a value sufficiently lower than that of a normal gate or the like. Note that the threshold value is set by changing the channel width or the impurity concentration of the transistor forming the gate. With such a threshold setting, as soon as the output signal Z slightly shifts to the “H” side, the threshold value of the switch circuit is reached, so that the transistor Tr2 becomes conductive as soon as the input signal A changes. Then, due to the action of the added switch circuit, the current through the switch circuit becomes the current of the output signal Z in addition to the current through the pull-up resistor R1 and the like. Therefore, a larger current than the conventional one is supplied to the load 2 as the output signal Z.

As a result, even if the load 2 has a large capacity, it is charged immediately, and the output signal Z changes from "L" to "H" at a high speed in response to a change in the input signal A. can do. The configuration of the digital signal output stage circuit of the present invention is not limited to the circuit of FIG. For example, FIG. 2 shows an embodiment of a digital signal output stage circuit 40 having a configuration suitable for an IC by substituting the resistors R1 and R2 with transistors. The effect is similar to that of the digital signal output stage circuit 30. As described above, the pull-up resistor may be a pull-up circuit including a transistor or the like.

Further, although illustration and detailed description are omitted, the same applies to so-called totem pole type or open collector type digital signal output stage circuits corresponding to these in the bipolar transistor circuit. In addition, I have described the function realization of wired OR,
The function of wired AND is also realized. This is because the difference between them is merely a difference in logical meaning by associating positive logic with negative logic and has the same circuit configuration.

Such a digital signal output stage circuit is also used, for example, in the output stage of the address decoder in the IC of the dynamic RAM. Then, a plurality of memory elements are connected and an address decode line having a large capacity can be driven at high speed. Therefore,
The higher the integration and the access speed of the memory IC, the higher the effect. In addition, it can be used in gate arrays, custom ICs, and the like, and can exhibit its high degree of freedom in design and high-speed performance.

[0022]

As can be understood from the above description, in the digital signal output stage circuit of the present invention, the switch circuit is connected in parallel with the pull-up resistor of the open drain type circuit. Moreover, the threshold value for the control input is set to a value smaller than usual. By the function of this switch circuit, the output signal can be wired-OR, and the output signal transits from "L" to "H" at high speed. As a result, the degree of freedom in circuit design and the speedup of the circuit can be achieved at the same time.

[Brief description of drawings]

FIG. 1 is an embodiment of a digital signal output stage circuit having the configuration of the present invention.

FIG. 2 is another embodiment of the digital signal output stage circuit having the configuration of the present invention.

FIG. 3 is an example of a conventional CMOS type digital signal output stage circuit.

FIG. 4 is an example of a conventional open drain type circuit.

[Explanation of symbols]

 1 CMOS Inverter 2 Load 3, 4 Open Drain Circuit 30 Digital Signal Output Stage Circuit 31 NOT Gate

Claims (1)

[Claims] 1. An open drain type (or open collector type) digital signal output stage circuit in which an output signal is pulled up by a pull-up resistor or a pull-up circuit, wherein the pull-up resistor or the pull-up circuit is used. Connected in parallel with each other and conducting when the output signal is equal to or higher than a predetermined threshold value, and shutting off when the output signal is equal to or lower than the threshold value, and the output signal is significant at a circuit receiving the output signal or a load side. The digital signal output stage circuit, wherein the threshold value is set to a value smaller than the value.