JPH05275683A - Compound semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To provide a method of manufacturing a compound semiconductor device provided with an electrode low in contact resistance, where the components of an electrode are prevented from diffusing. CONSTITUTION:An AuGe layer 71 of 600Angstrom in thickness and an Ni layer 72 of 200Angstrom in thickness are formed sandwiching a Ge layer 70 of 100Angstrom in thickness on an electrode forming part center a located on an N<+> GaInAs layer 6 between them. Furthermore, an AuGe layer 74 of 100Angstrom in thickness and an Ni layer 75 of 200Angstrom in thickness are formed on an electrode forming region ranging from the center a where the layers are formed to its periphery. By this forming method, the periphery b of an electrode 7 can be set less in Ge content than the center (a) of the electrode 7, so that the components of the electrode 7 can be restrained from diffusing laterally on the surface of a compound semiconductor at the periphery (b), and the surface of a semiconductor is doped with Ge present enough in the center (a) to make the electrode 7 small in contact resistance.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compound semiconductor device having an n-type ohmic junction and its manufacturing method.

[0002]

2. Description of the Related Art In general, epitaxially grown In
When forming an n-type ohmic junction electrode on a compound semiconductor having an AlAs layer or an InGaAs layer, Au, Ni, AuGe are used as electrode materials for obtaining low resistance contact.
(Ge content 12 w%) was used. Figure 5
(A) is a figure which shows an example of the cross section of the electrode part.
As shown in the figure, the InAlAs layer 5 as the doping layer and the spacer layer and the GaInAs layer 6 as the channel layer.
An ohmic electrode 7 is provided on the semiconductor layer in which is laminated. The ohmic electrode 7 is formed by depositing an AuGe layer 71 with a thickness of 1900 Å and a Ni layer 72 with a thickness of 520 Å. According to this structure, an ohmic electrode having a low contact resistance of 0.1 to 0.2 Ω · mm can be obtained. In this case, the material composition in the formed electrode is constant. For details of this structure, refer to the following document “Solid-State Electronics, Vol.30, No.12, pp.1345-.
1349, 1987 ”and the like.

[0003]

As described above, InA
In the n-type ohmic electrode material containing Au, Ge, or Ni as the main component, which has been used for the compound semiconductor device having the 1As layer or the InGaAs layer, their alloying progresses uniformly and, as a result, in the electrode plane. The material composition becomes uniform.

However, after the alloying process, the electrode components described above diffuse irregularly in the lateral direction near the upper portion of the compound semiconductor. FIG. 5B is a top view showing the ohmic electrodes 7 formed on both sides of the gate electrode 8. As shown in the figure, when a transistor or the like having a short distance between electrodes is formed, there is a problem that diffused portions (shown by diagonal lines in the figure) generated under the respective electrodes come close to each other and are short-circuited. there were. Further, if the alloy is formed at a slightly low temperature so that the lateral diffusion does not occur, there is a problem that the contact resistance increases.

[0005]

In the compound semiconductor device according to the present invention, an ohmic electrode is provided on a compound semiconductor in which an InAlAs layer and an InGaAs layer are epitaxially grown, and the ohmic electrode contains Au, Ge and Ni as main components. In the peripheral portion of the ohmic electrode, the ratio of Ge to the total components of the electrode material is smaller than that in the central portion. On the other hand, InAlAs layer and InGaAs
In a method of manufacturing a compound semiconductor device in which an ohmic electrode is formed on a compound semiconductor in which a layer is epitaxially grown, a Ge layer, an Au layer is formed in a central portion of an ohmic electrode forming region.
The method is characterized by including a step of depositing the Ge layer and the Ni layer, a step of depositing the AuGe layer and the Ni layer on the entire surface of the formation region of the ohmic electrode, and a step of alloying these layers. In addition, in the above-described manufacturing method, an AuGe layer, which is laminated on the entire surface of the formation region of the ohmic electrode, and Ni.
A Ge layer may be interposed between the layer and the compound semiconductor.

The present invention further provides an InAlAs layer and In.
In a method of manufacturing a compound semiconductor device in which an ohmic electrode is formed on a compound semiconductor on which a GaAs layer is epitaxially grown, a Ge layer,
The method is characterized by including a step of depositing the AuGe layer and the Ni layer, and a step of alloying after depositing a metal layer on the peripheral portion of the formation region of the ohmic electrode. In this step, the metal layer is preferably Au layer or Ni layer.

[0007]

According to the compound semiconductor device of the present invention, in the ohmic electrode, G for all components of the electrode material is
The existence ratio of e is high in the central part and low in the peripheral part. With this structure, lateral diffusion of the electrode material component on the compound semiconductor surface at the peripheral portion is suppressed, and low resistance contact is realized at the central portion of the electrode.

On the other hand, in the method of manufacturing a compound semiconductor device according to the present invention, a Ge layer and an AuGe layer are formed at the center of the ohmic electrode.
There is a step of depositing the / Ni layer and a step of depositing the AuGe / Ni layer on the entire surface of the formation region of the ohmic electrode.
Through these steps, the Ge abundance ratio in the peripheral portion of the ohmic electrode can be made lower than that in the central portion. Therefore, by performing the alloying treatment at a relatively low temperature, it is possible to suppress the lateral diffusion of the electrode material components in the peripheral portion of the compound semiconductor surface, and moreover, the abundant Ge existing in the central portion of the electrode is generated. Electrodes with low resistance contact can be obtained by doping the semiconductor surface. Such a structure can be more easily obtained by interposing the Ge layer between the AuGe / Ni layer and the compound semiconductor.

Further, in the method of manufacturing a compound semiconductor device according to the present invention, the Ge layer and the A layer are formed on the entire surface of the ohmic electrode formation region.
It has a step of depositing a uGe / Ni layer and a step of depositing a metal layer on the peripheral portion of the formation region of the ohmic electrode.
Therefore, the Ge existence ratio in the peripheral portion can be made lower than that in the central portion, and the compound semiconductor device described above can be obtained. Note that an Au layer or a Ni layer may be used as the metal layer deposited in this step.

[0010]

EXAMPLES Examples of the present invention will be described below.

FIG. 1A shows an F having a modulation doped structure.
1 is a schematic sectional view showing a first example of a compound semiconductor device according to the present invention by using ET. As shown in the figure, on the semi-insulating InP substrate 1, an undoped InP layer 2 that is a buffer layer and an undoped InGaA that is a channel layer are provided.
The s layer 3, the InAlAs layer 4 as a spacer layer, the InAlAs layer 5 as a doping layer, and the n ⁺ GaInAs layer 6 as a contact layer are sequentially stacked, and the n-type ohmic electrode 7 and the gate electrode 8 are provided at predetermined positions. Are formed respectively.

FIG. 1B shows an outline of the sectional structure of the ohmic electrode 7 described above. Ohmic electrode 7
Is an alloy of AuGe and Ni. In the figure,
In the central portion a of the ohmic electrode 7, the abundance ratio of Ge is higher than that in the peripheral portion b because the metal material containing Ge is laminated. According to this structure, it is possible to prevent the electrode material component at the peripheral edge portion b from diffusing in the lateral direction of the compound semiconductor surface, and it is possible to obtain an ohmic electrode with low resistance contact.

FIG. 1C shows a schematic cross-sectional view immediately after the electrode material is laminated and before alloying in the step of forming the ohmic electrode 7. First, as shown in the figure, n ⁺ GaInA
The Au layer is formed by sandwiching the Ge layer 70 having a thickness of 100 angstroms in the central portion a of the electrode formation portion on the s layer 6.
The e layer 71 and the Ni layer 72 are formed to a thickness of 600 angstrom and 200 angstrom, respectively. Further, from the central portion a where the respective layers are formed to the peripheral portion b thereof.
An AuGe layer 74 and a Ni layer 75 are formed to have a thickness of 100 angstroms and 200 angstroms, respectively, on the electrode forming region extending over. The layers thus formed are alloyed by a usual method.

By the above-described forming method, the central portion a of the electrode 7 is formed.
The Ge abundance ratio in the peripheral portion b can be reduced more than that. Therefore, by performing the alloying treatment at a relatively low temperature, it is possible to suppress the diffusion of the electrode material components in the lateral direction of the compound semiconductor surface at the peripheral edge portion b, and, moreover, the abundance existing in the central portion a. Ge can be doped into the semiconductor surface to obtain an electrode with low resistance contact.

In the above electrode forming method, n ⁺ Ga
After depositing the AuGe layer 74 and the Ni layer 75 on the entire surface of the InAs layer 6 where the electrode is formed, the AuGe layer 71 and the Ni layer 72 may be deposited in the region corresponding to the central portion a with the Ge layer 70 interposed therebetween.

FIG. 2 shows a second embodiment of the compound semiconductor device according to the present invention, and FIG. 2 (a) shows an outline of the sectional structure of the ohmic electrode 7 used therein. .. Also in this embodiment, as in the above-described first embodiment, the ohmic electrode 7 is made of an alloy of AuGe and Ni, and the center portion a has a higher Ge content ratio than the peripheral portion b. ing.

FIG. 2B shows a schematic cross-sectional view immediately after the electrode material is laminated and before alloying in the step of forming the ohmic electrode 7. First, as shown in FIG.
⁺ 10 in the central portion a of the electrode formation portion on the GaInAs layer 6
An AuGe layer 71 and a Ni layer 72 each having a thickness of 600 .ANG.
It is formed to a thickness of angstrom and 100 angstrom. Further, the Ge layer 73, on the electrode formation region extending from the central portion a where the respective layers are formed to the peripheral portion b thereof,
The AuGe layer 74 and the Ni layer 75 are formed to have a thickness of 100 Å, 600 Å, and 300 Å, respectively. The layers thus formed are alloyed by a usual method.

The central portion a of the electrode 7 is formed by the above-described forming method.
The Ge abundance ratio in the peripheral portion b can be reduced more than that. Therefore, by performing the alloying treatment at a relatively low temperature, it is possible to suppress the diffusion of the electrode material components in the lateral direction of the compound semiconductor surface at the peripheral edge portion b, and, moreover, the abundance existing in the central portion a. Ge can be doped into the semiconductor surface to obtain an electrode with low resistance contact.

In the above electrode forming method, n ⁺ Ga
The Ge layer 73, Au is formed on the entire surface of the electrode formation region on the InAs layer 6.
After depositing the Ge layer 74 and the Ni layer 75, the AuGe layer 71 and the Ni layer 72 may be deposited in the region corresponding to the central portion a with the Ge layer 70 interposed therebetween.

FIG. 3 shows a third embodiment of the compound semiconductor device according to the present invention, and FIG. 3 (a) shows the structure of the ohmic electrode used therein.
In the figure, in the peripheral portion b of the ohmic electrode 7, by stacking the Au layer 76 on the upper layer portion thereof, the Ge content is lower than that in the central portion a where the Au layer 76 is not stacked. According to this structure, like the structure shown in FIG. 1B described above, it is possible to prevent the electrode material component at the peripheral edge b from diffusing in the lateral direction of the compound semiconductor surface.

FIG. 3B shows a schematic cross-sectional view immediately after the electrode material is laminated and before alloying in the step of forming the ohmic electrode 7. First, as shown in the figure, n ⁺ GaInA
The AuGe layer 7 is formed by sandwiching the Ge layer 70 having a thickness of 100 angstrom in the entire electrode formation region on the s layer 6.
1 and Ni layer 72 each of 600 angstroms,
It is formed to a thickness of 200 Å. Furthermore, N
The Au layer 76 is laminated to 100 angstroms only on the peripheral portion b on the i layer 72. Thereafter, the respective layers are alloyed by a usual method.

In the above electrode forming method, first, n
⁺ Au on the peripheral portion b of the electrode formation region on the GaInAs layer 6
After depositing the layer 76, the AuGe layer 71 and the Ni layer 72 may be deposited on the entire surface of the electrode formation region including the peripheral portion b with the Ge layer 70 interposed therebetween.

In the third embodiment described above, the peripheral edge b
An Au layer 76 was laminated on the Ni layer, but Ni was used instead of this Au layer.
Layers may be used. In that case, n ⁺ GaInA
The AuGe layer 7 is formed by sandwiching the Ge layer 70 having a thickness of 100 angstrom in the entire electrode formation region on the s layer 6.
1 and Ni layer 72 each of 600 angstroms,
It is formed to a thickness of 100 Å. Furthermore, N
It is desirable that the Ni layer 76 is laminated in the thickness of 300 angstrom only on the peripheral portion b on the i layer 72.

The contact resistance of the n-type ohmic electrode produced as described above is 0.1 to 10 as in the case of the conventional electrode.
A low value of 0.2 Ω · mm was obtained. Moreover, as shown in FIG. 4, no lateral diffusion of the electrode material occurred, and all the FETs operated normally.

[0025]

As described above, according to the compound semiconductor device of the present invention, the ratio of Ge existing in the peripheral portion of the electrode is lower than that in the central portion. Therefore, during alloying for electrode formation, lateral diffusion of electrode components from the electrode peripheral portion is suppressed, and moreover, abundant Ge in the electrode central portion is easily doped into the semiconductor surface. Contact resistance is reduced. Therefore, it is very effective when used in a transistor of a compound semiconductor that requires a short distance between electrodes, and the performance of a semiconductor device can be improved.

[Brief description of drawings]

FIG. 1 is a diagram showing a first embodiment of a compound semiconductor device according to the present invention.

FIG. 2 is a second view of the compound semiconductor device according to the embodiment of the present invention.
It is a figure which shows the Example of.

FIG. 3 is a third view of the compound semiconductor device according to the embodiment of the present invention.
It is a figure which shows the Example of.

FIG. 4 is a top view showing an electrode portion of a compound semiconductor device according to an example of the present invention.

FIG. 5 is a structural diagram of a conventional compound semiconductor device.

[Explanation of symbols]

1 ... InP substrate, 2 ... Undoped InP layer, 3 ... Undoped InGaAs layer, 4 ... Undoped InAlAs layer,
5 ... n ⁺ InAlAs layer, 6 ... n ⁺ GaInAs layer, 7
... Ohmic electrodes, 70 and 73 ... Ge layers, 71 and 7
4 ... AuGe layer, 72 and 75 ... Ni layer, 76 ... Au layer (or Ni layer), 8 ... Gate electrode.

Claims (6)

[Claims] 1. An ohmic electrode is provided on a compound semiconductor in which an InAlAs layer and an InGaAs layer are epitaxially grown, and the ohmic electrode contains Au, Ge, and Ni as main components, and a peripheral portion of the ohmic electrode is made of an electrode material. A compound semiconductor device characterized in that the abundance ratio of Ge to all components is lower than that in the central portion. 2. A method of manufacturing a compound semiconductor device, wherein an ohmic electrode is formed on a compound semiconductor in which an InAlAs layer and an InGaAs layer are epitaxially grown, wherein a Ge layer and an Au layer are formed in the center of the ohmic electrode forming region.
Depositing a Ge layer and a Ni layer;
A method of manufacturing a compound semiconductor device, comprising: a step of depositing a layer; and a step of alloying the Ge layer, the AuGe layer, and the Ni layer. 3. AuGe deposited on the entire surface of the formation region
The method for manufacturing a compound semiconductor device according to claim 2, wherein the Ge layer is formed on the compound semiconductor side of the layer and the Ni layer. 4. A method for manufacturing a compound semiconductor device, wherein an ohmic electrode is formed on a compound semiconductor on which the InAlAs layer and the InGaAs layer are epitaxially grown, wherein a Ge layer and AuGe are formed on the entire surface of the ohmic electrode formation region.
A step of depositing a layer and a Ni layer, a step of depositing a metal layer on the peripheral portion of the formation region of the ohmic electrode, and a step of alloying the Ge layer, the AuGe layer, and the Ni layer. A method for manufacturing a compound semiconductor device having the characteristics. 5. The method for manufacturing a compound semiconductor device according to claim 4, wherein the metal layer is an Au layer. 6. The method for manufacturing a compound semiconductor device according to claim 4, wherein the metal layer is a Ni layer.