JPH05275432A - Manufacture of semiconductor wafer - Google Patents

Abstract

PURPOSE:To reduce the manufacturing cost of a semiconductor wafer having a prescribed thickness and, at the same time, to form a gettering source at an arbitrary depth when the semiconductor wafer is manufactured by sticking a thin high-quality wafer to a thick inexpensive wafer. CONSTITUTION:The raw material cost of a semiconductor wafer is reduced by sticking a thin high-quality wafer 1 to a thick inexpensive general purpose wafer 2, with the wafers 1 and 2 respectively used as an active layer and supporting substrate, and, at the same time, a gettering source 3 is formed at an arbitrary depth from the surface of the active layer by selecting the thickness of the wafer 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer in which an active layer portion to be a device manufacturing region and a supporting substrate portion supporting the active layer portion are formed by separately manufactured wafers. The present invention relates to a method for manufacturing a semiconductor wafer.

[0002]

2. Description of the Related Art A general-purpose semiconductor wafer used for manufacturing DRAM, SRAM, etc., usually has a thickness of about 600 μm, and a portion of its surface having a thickness of about 1-10 μm is used as an active layer for manufacturing the above device. used. Therefore, a portion having a thickness of about 500 to 600 μm, that is, a portion not directly related to the transistor structure is provided below the active layer. Then, an IG (intrinsic gettering) layer or the like is formed in this portion. The main purpose of forming the IG layer is minute defects that may occur in the device manufacturing area and may cause deterioration of electrical characteristics, and impurities (mainly heavy metals) mixed in the wafer during movement of the device process. To improve the safety of the device manufacturing area. For the same purpose, EG (extrinsic gettering) has also been developed in which a damage layer such as a polycrystalline silicon layer is deposited on the back surface of the wafer to trap defects. However, the reason why the defect layer is close to the device fabrication area Therefore, IG is frequently used. This method of forming the IG layer is composed of a heat treatment for forming a low oxygen concentration region in the surface layer portion and a heat treatment for forming a defect layer serving as a gettering source in the lower portion thereof. By this first heat treatment (high temperature heat treatment), oxygen contained in the surface portion of the wafer is diffused outward toward the wafer surface, and a low oxygen concentration region of several to several tens of μm is formed. Then, a second heat treatment (low temperature and high temperature heat treatment) is performed to form and grow an oxygen precipitate in the bulk below the low oxygen concentration region, so that a defect region serving as a gettering source and a defect due to low oxygen are generated. A defect-free layer (DZ) that does not exist at all.

[0003]

However, in such a conventional semiconductor wafer, the thickness of the active layer, which is the device formation region, is 1 to 10 μm, except that the lower portion thereof has the IG layer. Although only supporting the active layer, since the semiconductor wafer itself has a single-sheet structure, it is necessary to use a supporting portion having a quality equivalent to that of the surface layer portion requiring high quality. In other words, the surface layer single crystal must naturally meet strict quality characteristic standards, but the supporting portion inside the bulk that is integrated with this surface layer portion must also be made of the same material, so a high-quality single crystal is required. Since the number of wafers cut out from one crystal is limited, there was a lot of waste in terms of cost.

Further, the gettering layer formed inside the bulk is, for example, several hundred μm according to the conventional forming method.
Since the massive oxygen precipitate particles are nonuniformly and widely distributed in the range of m, the trapping region of the metal impurities penetrating from the surface is wide. In addition, this gettering layer,
In order to form a desired depth from the wafer surface, the only method is to control the temperature and time of the first heat treatment, which may complicate the process depending on the case. There may be disadvantages such as being difficult to control.

An object of the present invention is to solve the problems of such a semiconductor wafer and to form a gettering layer at an arbitrary depth and with a constant and accurate width at low cost. And to provide a method of manufacturing a semiconductor wafer having a high gettering ability.

[0006]

Such objects are achieved by the present invention described below. That is, in the present invention, there is provided a semiconductor wafer manufacturing method for bonding a thin first wafer and a second wafer thicker than the first wafer to obtain a junction type semiconductor wafer having a predetermined thickness. At least one of the first and second wafers is deformed and bonded so that strain is generated as a result of a gettering source at the bonding interface of the first and second wafers. As a result, it becomes easy to design the depth of the gettering site, and the gettering layer can be formed by concentrating the gettering site in a very narrow range to a desired depth. Then, as a specific example of this bonding method, for example, the thin first wafer is curved and deformed so as to form a part of a spherical surface by projecting the central portion of the thin first wafer to the central portion of the second wafer from the central portion. Laminate them so that contact is initiated.

[0007]

According to the present invention, the first wafer having a high quality enough to form an element is thinly cut to a thickness of, for example, about 200 μm and polished, and the first wafer having a lower quality than the first wafer is manufactured. The second wafer is made thicker than the first wafer, for example, 400 μm thick. Then, after performing a treatment for imparting hydrophilicity to both polished surfaces, the first wafer is bonded to the second wafer while being curved and deformed. Further, this bonded wafer is subjected to, for example, a predetermined heat treatment. As a result, a semiconductor wafer having a thickness of 600 μm can be obtained. In this case, a portion (bonding interface) having a depth of 200 μm from the main surface of the wafer is obtained.
It is possible to form a desired gettering source. Therefore, in this semiconductor wafer, the high-quality portion (first wafer) used as the active layer can be extremely thin, so that the wafer production cost can be kept low in mass production. Further, as the second wafer, any one can be used as long as it can bond the first wafer, as long as the function as the semiconductor wafer is not impaired, so that the cost can be reduced. Therefore, a general-purpose semiconductor wafer can be manufactured. The main surface of the first wafer may be polished or the like after the bonding step.

The specific constitution of the present invention will be described in detail below. In the present invention, a high-quality wafer 1 having a thickness of about 100 μm used as a device formation region as shown in FIG. 1 and 500 μm for supporting the wafer 1.
A support substrate wafer 2 having a thickness of m is attached to form a single semiconductor wafer 4. With such a configuration, the amount of high-quality semiconductor single crystal used in one semiconductor wafer is significantly reduced, and the supporting wafer 2 impairs the function as the semiconductor wafer 4. A low-cost semiconductor wafer 4 can be manufactured at a lower cost because a low-cost one can be used within a range that does not exist. In this case, the wafer 1 to be the active layer
For the bonding of the supporting wafer and the supporting wafer, for example, the method used for bonding the bonded wafer can be applied. That is, a treatment for imparting hydrophilicity to the wafer surface, for example, SC-1 cleaning (NH ₄ OH / H ₂ O / H ₂ O ₂ ) is performed,
Silanol groups (Si-OH) and hydrogen ions are generated on the surface and activated. Then, using a vacuum chuck or the like, the front surface side of these wafers is bent in a convex shape so that the center part thereof projects, and the centers are brought into contact with each other to gradually release the vacuum state and eliminate the warp. . As a result,
At room temperature, the wafers adhere to each other by hydrogen bonds or van der Waals bonds. Then, heat treatment is performed at a temperature of 1000 ° C. or higher to completely bond the two wafers. Then, since the crystal strain due to the warp of the wafer at the time of bonding at the bonding interface is frozen, a desired gettering source is formed.

By separating the active layer wafer 1 and the supporting wafer 2 in this way, conventionally, it has been necessary to consider the entire wafer. For example, the quality characteristic standards such as the in-plane resistivity distribution (dopant distribution) and the in-plane oxygen concentration distribution may be satisfied only in the extremely thin active layer portion. Therefore, the manufacturing process is simplified and the strict quality check is not required, so that the manufacturing cost can be significantly reduced. Further, since the IG heat treatment of two stages for a long time can be replaced with a treatment of a very short time after the wafer is bonded, similarly, the manufacturing cost can be largely reduced.

In the present invention, at the time of this bonding,
A concentric crystalline strain 3 is generated at the bonding interface between the wafer 1 for active layer and the wafer 2 for supporting substrate. This crystalline strain 3 is used as the gettering site. The defect layer 3 composed of this crystalline strain can be reliably formed by using the above-mentioned bonding method. This defect layer 3 serves as a good gettering source, and further, since gettering sites dispersed in a wide range in the conventional semiconductor wafer 1 can be concentrated near the bonding interface, impurities can be more effectively removed. It is possible to capture and keep them in a narrow area. Furthermore, by selecting the thickness of the active layer wafer 1,
Since the distance from the surface of the active layer to the gettering layer 3 can be accurately controlled, not only the quality control becomes easy, but also the depth of the gettering site 3 can be selected according to the purpose of use. And while the conventional semiconductor wafer has insufficient reproducibility because the formation of the gettering source is controlled by changing the heat treatment time and the heat treatment temperature, according to the method of the present invention, the depth of the gettering source is increased. Can be designed more easily.

[0011]

EXAMPLES Examples of the present invention will be described in detail below. For example, P-type pulled by CZ method, <100> orientation, specific resistance 3 Ω · cm, oxygen concentration [Oi] <1.5 × 10 ₁₈ c
A silicon single crystal having a length of m ⁻³ (formerly ASTM) and a length of 500 μm was cut to have a thickness of, for example, 200 μm. Separately from this, the pulled silicon single crystal was cut out to obtain a wafer having a thickness of 400 μm. The wafer used as this thin active layer is bonded to a thick wafer by the following method,
One semiconductor wafer having a thickness of m was used.

That is, two wafers whose surfaces are mirror-polished are bent at room temperature into a convex bowl shape by vacuum suction (bent so that the central portion is high and the peripheral portion is low), and the central portion thereof is formed. They were made to face each other and brought into contact with each other. Then, the curved deformations of the two wafers are gradually released to bond them. Then
The bonded wafers were heat-treated at 1100 ° C. for 2 hours to complete the bonding of the two wafers and integrate them.

Next, the gettering ability of this semiconductor wafer was evaluated. The evaluation method is as follows: first prepare an aqueous solution in which iron powder is dissolved in a few drops of HNO ₃ and then diluted to a predetermined concentration, drop a few drops on the wafer surface, and apply uniformly to the wafer surface by a method called spin coating. To do. At this point, the Fe ions existing on the wafer surface are about 10 ¹¹ ions / cm ² . Next, a heat treatment is performed at a temperature of 1150 ° C. to diffuse the Fe ions inside the wafer, and how much these Fe ions are gettered to the gettering site is analyzed by a secondary ion analyzer (SIMS).
Was measured and evaluated. The results are shown in Figure 2. It is clear that the semiconductor wafer of the present invention is superior in gettering ability as compared with a normal IG treated wafer (620 μm thick, DZ width ˜20 μm, defect density ˜10 ^x / cm) for comparison. An X-ray topography photograph of a semiconductor wafer was obtained, and it was confirmed that concentric crystal strain was formed at the bonded interface. When a diffraction image was obtained by changing the diffraction angle of the X-rays, it was confirmed that the identical patterns exist in the two images obtained by individually extracting the information from the respective wafers.
From the above results, it is clear that the manufacturing method of the present invention provides an extremely inexpensive and high-quality general-purpose semiconductor wafer.

[0014]

According to the method of manufacturing a semiconductor wafer of the present invention, a general-purpose semiconductor wafer can be obtained by bonding an extremely thin dirty layer wafer and an inexpensive supporting wafer to each other. A general-purpose semiconductor wafer with reduced quality and high quality can be obtained. Further, the position (depth direction) occupied by the gettering source in the inside of the semiconductor wafer can be easily controlled.

[Brief description of drawings]

FIG. 1 is a schematic diagram showing an outline of a method for manufacturing a semiconductor wafer according to the present invention.

FIG. 2 is a graph showing the gettering ability of a semiconductor wafer obtained by the manufacturing method of the present invention.

[Explanation of symbols]

 1 Wafer for Active Layer 2 Wafer for Support Substrate 3 Defect Layer (Gettering Source) 4 Semiconductor Wafer

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takayuki Shinnai 1-297, Kitabukuro-cho, Omiya-shi, Saitama Mitsubishi Materials Corporation Central Research Laboratory

Claims (1)

[Claims] 1. A method of manufacturing a semiconductor wafer, which comprises bonding a thin first wafer and a second wafer thicker than the first wafer to obtain a junction type semiconductor wafer having a predetermined thickness, the method comprising: In order to generate a defect serving as a gettering source at the bonding interface between the first wafer and the second wafer,
A method of manufacturing a semiconductor wafer, which comprises deforming and bonding at least one of these wafers.