JP2840029B2 - Silicon semiconductor wafer and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a directly bonded silicon semiconductor wafer in which two silicon wafers are bonded without substantially interposing a natural oxide film. For more information on intrinsic gettering
The present invention relates to a silicon semiconductor wafer having a gettering source and suitable for manufacturing an LSI such as a DRAM and a method for manufacturing the same.

[0002]

2. Description of the Related Art Intrinsic gettering involves forming defects in advance in a silicon wafer or intentionally adding a dopant impurity at a high concentration to form contamination or defects generated during the subsequent process. This technology absorbs the defect or the high-concentration dopant region itself or a strain field around the region to prevent the generation of a defect or contamination in the vicinity of the wafer surface where the device is formed. In this conventional gettering process, for example, as shown in FIG. 4, after a silicon wafer is annealed at 1150 ° C. for about 4 hours,
Heat treatment is performed at 700 ° C. for about 16 hours, and further heat treatment is performed at 950 ° C. for about 4 hours. Each of the three-stage heat treatments is performed in a nitrogen atmosphere to precipitate excess oxygen in the wafer. In the first stage heat treatment, oxygen in the region from the wafer surface to a depth of several μm was diffused out of the wafer and disappeared, and in the second stage heat treatment, nucleation of oxygen precipitates inside the wafer was performed. Thereafter, these nuclei are further grown by a third stage heat treatment. The oxygen precipitate and a defect layer (intrinsic gettering source) composed of stacking faults formed by using the oxygen precipitate as a nucleus getter the contaminant metals and defects generated in the subsequent process, and leave no defect on the wafer surface. It forms a zone (denuded zone).

[0003]

However, the conventional intrinsic gettering process described above has a drawback that the number of heat treatments is large, the process is complicated, and the process cost is high. Also, by using this processing method, the intrinsic gettering source can be formed in a region close to the region where the device is to be formed by shortening the time of the first heat treatment and reducing the thickness of the defect-free region. However, there is a problem that oxygen is not sufficiently diffused in the vicinity of the surface and defects may be left behind in the vicinity of the wafer surface, and the wafer surface region is not suitable as an element formation region.

An object of the present invention is to provide a silicon semiconductor wafer capable of forming an intrinsic gettering source simply and inexpensively with a single and short-time heat treatment, and a method of manufacturing the same. Another object of the present invention is to provide a silicon semiconductor wafer capable of forming an extremely thin defect-free region by forming an intrinsic gettering source in a region very close to an element region, and a method of manufacturing the same.

[0005]

As shown in FIG. 1 (d), a silicon semiconductor wafer 10 of the present invention comprises a first silicon wafer 11 serving as a support substrate and a second silicon wafer 12 serving as an active layer. After being bonded without interposing a natural oxide film, the second silicon wafer 12 is ground and polished to a predetermined thickness, and as shown in FIG. 2 and FIG. A stacking fault 14 serving as an intrinsic gettering source is formed at a bonding interface 13 with the second silicon wafer 12. Further, in the method for manufacturing a silicon semiconductor wafer of the present invention, as shown in FIGS. 1A to 1D, a first silicon wafer 11 serving as a support substrate and a second silicon wafer 12 serving as an active layer are respectively formed. Dilute hydrofluoric acid solution 15
After removing the natural oxide film on each wafer surface by immersion in
First silicon wafer 11 and second silicon wafer 1
2 is bonded and heat-treated to form a stacking fault 14 serving as an intrinsic gettering source at the bonding interface 13, and the second silicon wafer 12 is ground and polished to a predetermined thickness.

The first silicon wafer serving as the support substrate and the second silicon wafer serving as the active layer according to the present invention are both manufactured by the Czochralski method, the floating zone method, and other methods. The first silicon wafer and the second silicon wafer may be manufactured by the same manufacturing method, or may be manufactured by different manufacturing methods. Whichever method is used, it is preferable to cut the silicon single crystal rod and then perform mirror polishing. FIG.
As shown in (a), these silicon wafers 11,
12 is immersed in a diluted hydrofluoric acid solution 15. The diluted hydrofluoric acid solution is an aqueous solution of hydrofluoric acid having a concentration of about 5 to 10%. By immersing the silicon wafer in a dilute hydrofluoric acid solution at room temperature for about 1 to 2 minutes, the natural oxide film formed on the wafer surface is completely dissolved and removed. The higher the concentration of the diluted hydrofluoric acid solution,
Alternatively, the longer the immersion time in the diluted hydrofluoric acid solution, the more easily the natural oxide film and the like are removed from the wafer surface. After taking out two silicon wafers from the diluted hydrofluoric acid solution, FIG.
Immediately without washing with washing water as shown in FIG.
Joined by superposed silicon wafers, 1000 in a nitrogen (N ₂₎ atmosphere or an oxygen (dryO ₂₎ atmosphere
Heat treatment is performed at a temperature of １1100 ° C. for 1 to 3 hours, preferably for about 2 hours. After bonding as shown in FIG. 1 (d), the second silicon wafer 12 serving as a silicon substrate is ground with a grindstone, and then polished with a polishing cloth to obtain about 5-
Work to a thickness of 10 μm. This makes the thickness about 5-10
An active layer 12 a for device formation of μm is obtained on the junction interface 13. By adjusting the amount of grinding, a defect-free region having a desired thickness can be formed on the surface of the bonded wafers.

[0007]

When the first silicon wafer and the second silicon wafer are bonded under the above conditions, a stacking fault 14 is formed at the joint interface as shown in FIGS. The mechanism by which the stacking faults 14 are formed has not been fully elucidated at this stage, but is inferred as follows. That is, when two silicon wafers are bonded together while leaving the natural oxide film on the wafer surface or after cleaning with a surface cleaning solution, the natural oxide film and the OH groups and H ₂ adsorbed on the natural oxide film are adhered to the wafer surface. Since zero molecules are present, these serve as buffer layers, and no stacking faults occur at the bonding interface. on the other hand,
On the wafer surface immediately after removing the natural oxide film with the diluted hydrofluoric acid solution, silicon atoms at lattice positions are not on a single plane at the atomic level, but have step-like steps and irregularities at the atomic level. When two silicon wafers with surfaces in this state are bonded together, the silicon atoms at lattice positions facing each other at the bonding interface cannot be perfectly matched, and the silicon atoms at lattice positions are displaced or collapsed at the atomic level. And stacking faults are formed due to this. This stacking fault functions as an intrinsic gettering source as is well known.

[0008]

Next, an embodiment of the present invention will be described in detail with reference to the drawings. As shown in FIG. 1 (a), after cutting from a silicon single crystal rod pulled up by the CZ method, a mirror-polished 2 inch of 5 inch diameter and 625 μm thick was obtained.
Two silicon wafers 11 and 12 were prepared, and these silicon wafers 11 and 12 were immersed in a dilute hydrofluoric acid solution 15 having a concentration of 5% at room temperature for one minute. After taking out two silicon wafers from the diluted hydrofluoric acid solution, as shown in FIG. 1B, the two silicon wafers were immediately overlapped and joined without being washed with washing water. Next, as shown in FIG. 1 (c), 10 to 1 was placed in a heat treatment furnace set at room temperature to 800 ° C.
Insert at a rate of 5 cm / min, raise the temperature at a rate of 10 ° C./min from 800 ° C. in a nitrogen atmosphere, maintain for 2 hours when reaching 1100 ° C., and then lower the temperature at a rate of 4 ° C./min.
After cooling to 00 ° C., it was removed from the furnace at room temperature at a rate of 10 to 15 cm / min. Further, as shown in FIG. 1 (d), the surface of the silicon wafer 12 is ground with a grindstone, and then polished with a soft polishing cloth, so that a thickness of 5 to 5
An active layer 12a as a low oxygen concentration layer of 10 μm was formed. A rectangular sample of an arbitrary size was cut out from the silicon semiconductor wafer obtained in the above example, sandwiched between dummy materials and bonded, and then punched out with a circular drill from a direction perpendicular to the cut surface. This cylindrical sample is subjected to dimple polishing using a predetermined polishing machine so that the central portions on both sides are the thinnest. The sample was used for observation with a scanning electron microscope. The vicinity of the bonding interface of the sample was observed at 2,000
It was observed at a magnification of 0000 times. As shown in FIG. 2 and FIG. 3, two amorphous SiOx having a substantially hexagonal size of about 100 to 200 angstroms (2 to 4 cm in the figures).
Stacking faults 14 were observed between the lumps 16 and 17. It is considered that these amorphous SiOx lump were formed due to the natural oxide film locally formed on the wafer surface in a short time after being taken out from the diluted hydrofluoric acid solution and before bonding.

[0009]

As described above, the formation of the conventional intrinsic gettering source required three heat treatments for a long time or a long time, and was complicated and expensive. According to this, it is possible to form a stacking fault easily and at low cost with a single and short-time heat treatment, thereby forming an intrinsic gettering source. In particular, according to the method of the present invention, if the amount of grinding of the second silicon wafer serving as the active layer is increased, an intrinsic gettering source is formed in a region very close to the element region to form an extremely thin defect-free region. Can also be created.

[Brief description of the drawings]

FIG. 1 is a partial sectional view illustrating a method for manufacturing a silicon semiconductor wafer according to an embodiment of the present invention.

FIG. 2 is an electron micrograph of a crystal structure at a bonding interface of a silicon semiconductor wafer according to an example of the present invention.

FIG. 3 is a diagram schematically showing an electron micrograph of FIG. 2;

FIG. 4 is a diagram showing a relationship between temperature and time of a conventional heat treatment for intrinsic gettering.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Silicon semiconductor wafer 11 1st silicon wafer 12 2nd silicon wafer 12a Active layer 13 Bonding interface 14 Stacking fault 15 Dilute hydrofluoric acid solution

──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Hisashi Furuya 1-297 Kitabukuro-cho, Omiya-shi, Saitama Mitsui Materials Co., Ltd. Central Research Laboratory (56) References JP-A-6-69087 (JP, A) ( 58) Surveyed fields (Int.Cl. ⁶ , DB name) H01L 21/02 H01L 21/322

Claims (2)

(57) [Claims] A first silicon wafer serving as a supporting substrate;
1) and a second silicon wafer (12) serving as an active layer are bonded together without substantially interposing a natural oxide film, and the second silicon wafer (12) is ground and polished to a predetermined thickness. A stacking fault (14) serving as an intrinsic gettering source is formed at a bonding interface (13) of the first silicon wafer (11) with the second silicon wafer (12). Silicon semiconductor wafer. 2. A first silicon wafer (1) serving as a support substrate.
1) and a second silicon wafer (12) to be an active layer are each immersed in a dilute hydrofluoric acid solution (15) to remove a natural oxide film on each wafer surface, and then the first silicon wafer (11) and the second silicon wafer (12) are removed. 2 Bonding and heat treatment of the silicon wafer (12) to form a stacking fault (14) serving as an intrinsic gettering source at the bonding interface (13), and grinding the second silicon wafer (12) to a predetermined thickness. A method for manufacturing a silicon semiconductor wafer to be polished.