JPH05275398A - Manufacture of porous silicon member - Google Patents

Manufacture of porous silicon member

Info

Publication number
JPH05275398A
JPH05275398A JP10220392A JP10220392A JPH05275398A JP H05275398 A JPH05275398 A JP H05275398A JP 10220392 A JP10220392 A JP 10220392A JP 10220392 A JP10220392 A JP 10220392A JP H05275398 A JPH05275398 A JP H05275398A
Authority
JP
Japan
Prior art keywords
substrate
silicon
type
plasma
porous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10220392A
Other languages
Japanese (ja)
Other versions
JP3207505B2 (en
Inventor
Toru Inoue
亨 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP10220392A priority Critical patent/JP3207505B2/en
Publication of JPH05275398A publication Critical patent/JPH05275398A/en
Application granted granted Critical
Publication of JP3207505B2 publication Critical patent/JP3207505B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To provide a manufacturing method of a porous silicon member, which does not depend on conductivity types and resistances of silicon substrates, and which can be applied to a semiconductor field. CONSTITUTION:An even electrode 4 is provided on the rear surface of a single crystal silicon substrate 3 chiefly made of P-type and an anode potential is applied to the electrode. Meanwhile, reactive gas 9 containing halogen group elements is made to be plasma state, and ionized halogen element ion 10 is attracted toward the substance by applying a voltage to the substrate to perform fine hole etching on the surface of the silicon substrate 3. The substrate surface is irradiated with light emitted from the plasma. As a result, even on so called n-type silicon substrate which can not supply positive hole, the fine hole etching which is equal to that of p-type is performed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はドライプロセスを用いた
多孔質珪素部材の作製方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a porous silicon member using a dry process.

【0002】[0002]

【従来技術】多孔質シリコンはシリコンの電解研磨の研
究中に偶然発見された構造であり、シリコンの特殊形態
の一つである。一般的な構造としては内径が2〜100
nmの極微細孔もしくは外径が同程度の極微細柱がシリ
コン基板表面に対し垂直に無数に存在し、多孔度10〜
80%、比表面積200〜600m2/cm3 の多孔質構造
を構成している。一部の研究者は20Å以下をマイクロ
ポーラス、20〜500Åをメゾポーラス、500Å以
上をマクロポーラスと分類している。
BACKGROUND OF THE INVENTION Porous silicon is a structure discovered by chance during the study of electropolishing of silicon and is one of the special forms of silicon. Inner diameter is 2-100 as a general structure
Numerous ultra-fine pores of nanometer or ultra-fine pillars of the same outer diameter exist innumerably perpendicularly to the surface of the silicon substrate, and have a porosity of 10
It has a porous structure of 80% and a specific surface area of 200 to 600 m 2 / cm 3 . Some researchers classify less than 20Å as microporous, 20-500Å as mesoporous, and more than 500Å as macroporous.

【0003】この多孔質シリコンは化学的に活性である
とされ様々な応用が期待されているが、中でも近年盛ん
に研究が進められているのがこの多孔質シリコンを用い
たフォトルミネッセンス(PL)、エレクトロルミネッ
センス(EL)発光素子の開発である。この多孔質シリ
コンの登場まで、結晶性シリコン単体からの発光現象の
観測は報告されていない。その理由は、結晶シリコンの
光学的バンドギャップが最大1.2eVであることであ
る。それに対して多孔質シリコンでは、作製条件にもよ
るが約2.5eVの値が得られている。現在のところ、
フォトルミネッセンスとしては紫外線もしくはレーザー
の照射により、室温で強い可視発光が確認されており、
エレクトロルミネッセンスとしては発光セルを用いた方
法において、 680〜 800nmにセンターを有する発光が確
認されている。
This porous silicon is chemically active and is expected to be applied in various ways. Among them, in recent years, much research has been conducted, and photoluminescence (PL) using this porous silicon is being actively pursued. , Development of electroluminescence (EL) light emitting device. Until the advent of this porous silicon, the observation of the light emission phenomenon from crystalline silicon alone has not been reported. The reason is that the optical bandgap of crystalline silicon is a maximum of 1.2 eV. On the other hand, in the case of porous silicon, a value of about 2.5 eV is obtained depending on the manufacturing conditions. at present,
As photoluminescence, strong visible light emission at room temperature has been confirmed by irradiation with ultraviolet rays or laser,
As electroluminescence, light emission having a center at 680 to 800 nm has been confirmed in a method using a light emitting cell.

【0004】この発光現象の原因に関しては、量子サイ
ズシリコンカラム中に励起子が閉じ込められるため、ま
たは多孔質シリコン中の強い格子歪みがバンド構造に影
響を与えているため、あるいは表面の水素終端層による
発光など、多くの仮説が提出されている。
Regarding the cause of this light emission phenomenon, excitons are confined in a quantum size silicon column, strong lattice strain in porous silicon influences the band structure, or the hydrogen termination layer on the surface. Many hypotheses have been submitted, such as luminescence by.

【0005】その他SOI構造作製やヘテロエピタキシ
ャル基板材料、電極材料やガスセンサー等、多孔質シリ
コンは幅広い応用が期待されている。
In addition, porous silicon is expected to have a wide range of applications such as SOI structure fabrication, heteroepitaxial substrate materials, electrode materials and gas sensors.

【0006】現在のところその作製方法は、所謂陽極化
成法のみが行われている。この陽極化成法はHF水溶液
中で単結晶シリコン基板に対して電気化学的にエッチン
グを施すものである。具体的には単結晶シリコン基板を
5〜50%のHF水溶液中に浸積し、陽極電位を加えると
シリコン原子がフッ素イオンによってエッチングされて
ゆく。この時電流密度を約200mA/cm2 以上加える
と基板全体に対する電解研磨となるが、10〜80mA
/cm2 とすると、表面シリコンのエッチング溶出は局所
的に限定されたものとなり、スポンジ状のシリコン層が
形成されることになる。シリコン基板全体での電流密度
に分布があると多孔質層が不均一になるため、基板裏面
にアルミニウム薄膜を蒸着する等、オーミック電極の形
成が必要と言われている。
At present, only the so-called anodization method is used as the manufacturing method. In this anodizing method, a single crystal silicon substrate is electrochemically etched in an HF aqueous solution. Specifically, when a single crystal silicon substrate is immersed in a 5 to 50% HF aqueous solution and an anodic potential is applied, silicon atoms are etched by fluorine ions. At this time, if a current density of about 200 mA / cm 2 or more is applied, electropolishing is performed on the entire substrate.
/ Cm 2 , the surface silicon etching and elution is locally limited, and a sponge-like silicon layer is formed. It is said that it is necessary to form an ohmic electrode by vapor-depositing an aluminum thin film on the back surface of the substrate because the porous layer becomes non-uniform when the current density is distributed over the entire silicon substrate.

【0007】局所的なシリコンのエッチング溶出は、溶
出に必要なホールが電界の集中する孔の先端からのみ供
給されるため、微細孔先端部分においてのみ進行する。
微細孔の径は陽極電流密度によって変化し、深さは時間
によって決まる。またその構造は基板の比抵抗すなわち
不純物濃度によって決定される。比較的低抵抗の場合は
表面に対して垂直に進むが、高抵抗の場合は溶出の進行
方向がランダムとなり、複雑なネットワークを形成する
と言われる。主に使用される基板の比抵抗は 0.001〜10
Ωcmである。
The local elution of silicon by etching proceeds only at the tip of the fine hole because the holes necessary for elution are supplied only from the tip of the hole where the electric field is concentrated.
The diameter of the micropores depends on the anode current density, and the depth depends on the time. The structure is determined by the resistivity of the substrate, that is, the impurity concentration. It is said that when the resistance is relatively low, it proceeds perpendicularly to the surface, but when the resistance is high, the elution progressing direction becomes random and a complicated network is formed. The specific resistance of the main board used is 0.001 to 10
Ωcm.

【0008】〔従来技術の問題点〕この多孔質シリコン
層の作製は、上記のような基板の抵抗値の他にもう一
点、シリコン基板の形式の違いに対する依存性を有して
いる。即ちp型シリコン基板を用いて陽極化成処理を施
した場合、上記の多孔質化は速やかに進行されるが、n
型シリコン基板を用いた場合は多孔質化速度がp型のそ
れに比べて著しく遅い。またp型の場合は多孔質層にお
いて単結晶性を維持出来るのに対し、n型では単結晶性
は維持されない。n型シリコン基板を多孔質化するに
は、n型シリコン基板に5〜50mW/cm2 の光照射を行う
事によるホール供給によって対処されているが、装置構
成の煩雑化を招いている。
[Problems of the Prior Art] In addition to the resistance value of the substrate as described above, the production of the porous silicon layer has another point that it depends on the difference in the type of the silicon substrate. That is, when anodization treatment is performed using a p-type silicon substrate, the above-mentioned porosification is rapidly promoted, but n
When a silicon substrate of the type is used, the rate of porosity is significantly slower than that of the p type. Further, in the case of p type, the single crystallinity can be maintained in the porous layer, whereas in the case of n type, the single crystallinity cannot be maintained. In order to make the n-type silicon substrate porous, it has been dealt with by supplying holes by irradiating the n-type silicon substrate with light of 5 to 50 mW / cm 2 , but this complicates the device configuration.

【0009】また先にあげた応用例において記述した様
に、SOI構造の形成などの電子材料方面への応用が期
待されているが、電解液中での処理等を経由する故にそ
の表面状態は半導体プロセスへ運用できる程清浄とは言
えない。また多孔質構造であるために表面状態の清浄化
は非常に困難である。
Further, as described in the above-mentioned application examples, application to the electronic material field such as formation of SOI structure is expected, but the surface state thereof is changed due to the treatment in the electrolytic solution. It is not clean enough to be used in semiconductor processes. Also, because of the porous structure, it is very difficult to clean the surface state.

【0010】[0010]

【発明が解決しようとする課題】本発明の目的はシリコ
ン基板の導電型や抵抗に依存することのない、半導体分
野への応用が可能な多孔質シリコン部材の作製方法を提
供することにある。
SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for producing a porous silicon member which can be applied to the semiconductor field without depending on the conductivity type and resistance of the silicon substrate.

【0011】[0011]

【課題を解決する手段】本発明は、単結晶シリコン基板
より離れた位置でハロゲン元素を含んだプラズマを形成
し、同時に前記単結晶シリコン基板に陽極電位を印加す
ることによって前記プラズマよりハロゲン元素イオンを
基板方向へ引き寄せ、前記基板表面にnmオーダーの直
径もしくは間隔で微細孔を形成することを特徴とする多
孔質珪素部材の作製方法である。また、上記構成におい
て、原料ガスに稀ガスであるヘリウム、アルゴン、ネオ
ンを添加することにより、プラズマの発光効率を高め、
基板表面に光照射を同時に行うことを特徴とするもので
ある。本発明者らの研究によれば、プラズマCVD法を
用いた成膜またはエッチング技術を応用して、シリコン
基板の形式を問わず、クリーンな表面状態の多孔質シリ
コン部材を形成可能であることが明らかになった。以
下、装置構成と作製方法を説明する。
According to the present invention, a plasma containing a halogen element is formed at a position distant from a single crystal silicon substrate, and at the same time, an anode potential is applied to the single crystal silicon substrate so that the halogen element ions are removed from the plasma. In the direction of the substrate to form fine pores on the surface of the substrate at a diameter of nm order or at intervals, which is a method for producing a porous silicon member. Further, in the above structure, by adding rare gas helium, argon, neon to the source gas, the luminous efficiency of plasma is increased,
It is characterized in that the substrate surface is irradiated with light at the same time. According to the research conducted by the present inventors, it is possible to form a porous silicon member having a clean surface state by applying a film forming or etching technique using a plasma CVD method regardless of the type of a silicon substrate. It was revealed. The device configuration and the manufacturing method will be described below.

【0012】使用する装置は、マイクロ波(2.54G
Hz)や高周波(一般に13.56MHz)等を用いた
プラズマCVD装置で、基板への電位印加を任意に行え
る構造の装置ならば幅広く使用できる。本発明では図1
に示す様な、マイクロ波導波管2に垂直に石英反応管1
を設置した、ダイヤモンド薄膜作製等に広く用いられて
いる、マイクロ波プラズマCVD装置を使用した。
The device used is a microwave (2.54G
Hz) or high frequency (generally 13.56 MHz) plasma CVD apparatus having a structure capable of arbitrarily applying a potential to the substrate can be widely used. In the present invention, FIG.
The quartz reaction tube 1 perpendicular to the microwave waveguide 2 as shown in
The microwave plasma CVD apparatus, which is widely used for diamond thin film production and the like, is used.

【0013】該マイクロ波プラズマCVD装置反応管上
部から、反応ガス9としてCF4 とHe及びH2 を供給
する。CF4 はHeとH2 に対して5%以下、好ましく
は1%を添加するのが適当である。CF4 の濃度をこれ
以上に上げた場合、反応管に対するエッチングが過剰と
なり、装置の損傷が生ずる恐れがある。Heの添加は、
プラズマの発光効率を高めるためと、希釈ガスとしても
用いるためんである。H2 の添加は得られた多孔質シリ
コン表面を安定な水素終端とする為である。
CF 4 , He and H 2 are supplied as reaction gases 9 from the upper part of the reaction tube of the microwave plasma CVD apparatus. CF 4 is suitably added to He and H 2 in an amount of 5% or less, preferably 1%. If the concentration of CF 4 is increased above this range, the reaction tube may be over-etched and the device may be damaged. The addition of He is
This is to increase the luminous efficiency of plasma and also to use as a diluent gas. The addition of H 2 is for making the obtained porous silicon surface a stable hydrogen termination.

【0014】反応ガスが安定になった状態で、電力値で
300〜600Wのマイクロ波を投入し、CF4 、He
及びH2 のプラズマを発生させる。反射波等の調整を慎
重に行い、反応管1の中央で反応管壁に接触のない球状
グロー放電(球状プラズマ放電)5を発生させる。
With the reaction gas stabilized, a microwave with an electric power of 300 to 600 W is applied to remove CF 4 and He.
And H 2 plasma is generated. By carefully adjusting the reflected wave and the like, a spherical glow discharge (spherical plasma discharge) 5 is generated at the center of the reaction tube 1 without contacting the wall of the reaction tube.

【0015】試料であるシリコン基板の導電型や不純物
の含有量(添加量)、そして比抵抗に特に制限はない。
しかし、単結晶シリコン基板を用いることは重要であ
る。モリブデンホルダー7に設置された任意に高さ調節
が可能な石英製の基板ステージ6上に、該試料基板を設
置する。また、試料基板3は陽極化成法同様に陽極電位
に保つ必要がある。そして、基板裏面に基板裏面電極で
あるオーミック電極4としてアルミニウムを蒸着し、基
板ステージ保持管を通して直流電源装置に接続し、約+
10〜50Vの電位を印加する。印加電位の値によって
微細孔の径を調整できる。裏面電極の保護の為、基板ス
テージ6はモリブデンホルダー7内部の水冷により、1
50〜300℃好ましくは約200℃の低温状態に保持
する。
The conductivity type of the sample silicon substrate, the content (addition amount) of impurities, and the specific resistance are not particularly limited.
However, it is important to use a single crystal silicon substrate. The sample substrate is placed on a quartz substrate stage 6 which is placed on a molybdenum holder 7 and whose height can be adjusted arbitrarily. Further, the sample substrate 3 needs to be maintained at the anode potential as in the anodization method. Then, aluminum is vapor-deposited on the back surface of the substrate as an ohmic electrode 4 which is a back surface electrode of the substrate, and is connected to a DC power supply device through a substrate stage holding tube, and about +
A potential of 10 to 50 V is applied. The diameter of the micropores can be adjusted by the value of the applied potential. The substrate stage 6 is cooled by water inside the molybdenum holder 7 to protect the backside electrode.
The temperature is maintained at a low temperature of 50 to 300 ° C, preferably about 200 ° C.

【0016】そして、試料基板を電位印加状態のまま球
状放電領域に接近させる。この時基板を球状放電内部に
挿入してはならない。これは、形成初期状態の微細孔の
エッジ部分において微細放電集中が生じ、微細孔が消滅
してしまうからである。このような微細放電集中を発生
させることなく、微細孔のエッチング形成を行う為に
は、放電外領域においてエッチング種との会合を生じさ
せる必要があり、その役割を果たすのが試料基板3への
陽極電位印加である。エッチングを律速するフッ素イオ
ン(F- ) は、マイナスの電荷をもったイオンであるの
で、イオン流10として、基板に印加された陽極電位に
よって基板表面に引き寄せられ、エッチングを進行させ
る。本発明者らは、p型の場合は正孔供給不純物が点在
する部分に、n型の場合は表面の微細欠陥にフッ素イオ
ンの集中が発生し、微細孔の形成が発生し、進行すると
考えている。
Then, the sample substrate is brought close to the spherical discharge region while the potential is being applied. At this time, the substrate should not be inserted inside the spherical discharge. This is because fine discharge concentration occurs at the edge portion of the fine holes in the initial state of formation, and the fine holes disappear. In order to perform the etching formation of the fine holes without generating such a fine discharge concentration, it is necessary to cause the association with the etching species in the region outside the discharge, and the role thereof is to play a role in the sample substrate 3. Application of anode potential. Fluorine ions (F ) that control the etching rate are ions having a negative charge, and are thus attracted to the surface of the substrate as an ion flow 10 by the anode potential applied to the substrate to advance the etching. In the case of the p-type, the present inventors found that when the hole-supplying impurities are scattered, in the case of the n-type, the concentration of fluorine ions occurs in the fine defects on the surface, and the formation of fine pores occurs, and then progresses. thinking.

【0017】従来例において記述した様に、正孔供給を
行う事の出来ないn型の場合は微細孔の成長はランダム
な方向に成りがちである。またp型の場合も比抵抗値す
なわち不純物濃度によって微細孔形成速度は著しく異な
る。それに対処するために従来の陽極化成法では光照射
による正孔の供給を行っていた訳であるが、本発明の構
成では、微細孔形成と同時に光照射を行うことができる
という特徴を有する。すなわち基板上方にある球状放電
プラズマ5の発光によって、正孔が生成されるので、基
板の導電型や比抵抗にかかわらず基板表面に対して垂直
な微細孔を高速で作製可能となるのである。この時光照
射強度を高めるため、投入電力は条件範囲内部において
出来るかぎり高いほうが良いであろう。また、このプラ
ズマによる光照射強度を高めるためにヘリウム等の稀ガ
スを添加することは効果的である。以下、実施例によっ
て本発明を説明する。
As described in the conventional example, in the case of the n-type in which holes cannot be supplied, the growth of fine holes tends to occur in random directions. Also in the case of p-type, the micropore formation rate remarkably differs depending on the specific resistance value, that is, the impurity concentration. In order to cope with this, in the conventional anodization method, holes are supplied by light irradiation, but the structure of the present invention has a feature that light irradiation can be performed at the same time when the fine holes are formed. That is, since holes are generated by the light emission of the spherical discharge plasma 5 above the substrate, it is possible to rapidly form fine holes perpendicular to the substrate surface regardless of the conductivity type and the specific resistance of the substrate. At this time, in order to increase the light irradiation intensity, the input power should be as high as possible within the condition range. Further, it is effective to add a rare gas such as helium in order to increase the light irradiation intensity by the plasma. Hereinafter, the present invention will be described with reference to examples.

【0018】[0018]

【実施例】「実施例1」実施例では、図1に示すマイク
ロ波プラズマCVD装置により、比抵抗値が10Ωcmのp
型単結晶シリコン基板(100)面に対して多孔質層の
形成を試みた例である。大まかな手順は上述の通りだ
が、以下詳細に説明する。
EXAMPLES Example 1 In Example 1, the microwave plasma CVD apparatus shown in FIG. 1 was used to obtain a p having a specific resistance value of 10 Ωcm.
This is an example in which formation of a porous layer was attempted on the surface of the single crystal silicon substrate (100). The general procedure is as described above, but will be described in detail below.

【0019】装置の反応管1は内径46mmの石英ガラ
ス管を用いた。基板ステージ6は直径36mmの同じく
石英ガラス製であり、内部に水冷機構を有するモリブデ
ン製ホルダー7上に被せて使用する。ただし石英ガラス
基板ステージ6とモリブデン製ホルダー7には、基板に
陽極電位を印加する為のケーブルを通す穴が設けられて
いる。基板ステージ6はモリブデン製ホルダー7の水冷
機構(水流8によって冷却が行われる)によって冷却す
る。基板3の表面温度は光学温度計によって反応管上部
の観察窓から測定したが、装置の構造上、焦点調整等の
点で正確な測定は非常に困難であった。そこで、本実施
例においては、試料表面に熱電対を装着して予備実験を
行い、熱電対温度と光学温度計の表示とを対照して反応
中の基板表面温度を予測した。試料基板には裏面にアル
ミニウム蒸着によるオーミック電極(裏面電極)4を設
けた他は、特に表面処理等は行わなかった。
As the reaction tube 1 of the apparatus, a quartz glass tube having an inner diameter of 46 mm was used. The substrate stage 6 is also made of quartz glass with a diameter of 36 mm, and is used by covering it on a molybdenum holder 7 having a water cooling mechanism inside. However, the quartz glass substrate stage 6 and the molybdenum holder 7 are provided with holes for passing a cable for applying an anode potential to the substrate. The substrate stage 6 is cooled by the water cooling mechanism of the molybdenum holder 7 (cooling is performed by the water flow 8). The surface temperature of the substrate 3 was measured by an optical thermometer from the observation window above the reaction tube, but it was very difficult to accurately measure it in terms of focus adjustment and the like due to the structure of the device. Therefore, in this example, a thermocouple was attached to the surface of the sample to conduct a preliminary experiment, and the temperature of the substrate surface during the reaction was predicted by comparing the thermocouple temperature with the display of the optical thermometer. The surface of the sample substrate was not particularly treated except that the back surface was provided with an ohmic electrode (back surface electrode) 4 formed by aluminum vapor deposition on the back surface.

【0020】実験開始前に反応管1の内部を10-4Torrま
で真空引きする。その後反応ガスを反応管上部から導入
する。反応ガスはCF4 (1%)+He(60%)+H
2 (39%)=100ccmとした。排気系の圧力調整
弁によって反応圧力を1〜40Torrの範囲に設定する。本
実施例では設定圧力を25Torrとした。圧力は低すぎると
プラズマが反応管内部に拡がり、内壁をスパッタし不純
物発生の原因となる。逆に高すぎると非常に小さなプラ
ズマ放電しか得られず、効果が期待出来ない。
Before starting the experiment, the inside of the reaction tube 1 is evacuated to 10 −4 Torr. Then, the reaction gas is introduced from the upper part of the reaction tube. The reaction gas is CF 4 (1%) + He (60%) + H
2 (39%) = 100 ccm. The reaction pressure is set within the range of 1-40 Torr by the pressure control valve of the exhaust system. In this embodiment, the set pressure is 25 Torr. If the pressure is too low, plasma spreads inside the reaction tube, sputters the inner wall, and causes generation of impurities. Conversely, if it is too high, only a very small plasma discharge can be obtained, and the effect cannot be expected.

【0021】ガス導入を開始してから数分後(通常約5
分)にマイクロ波を投入する。マッチング調整を経て、
放電が安定するまでの間は再現性のある実験は出来な
い。よってこの段階では基板は導波管の位置から最低で
も10〜15cm以上下に下げておくことが必要である。
このマッチング調整終了後、反応管中央に球状放電が安
定に得られた事を確認し、試料基板への陽極電位印加を
行う。本実施例では+34Vとした。その後電位印加状態
のままで基板の最高部分の高さが導波管より5mm下に位
置するように調節する。
A few minutes after starting the gas introduction (usually about 5
Microwave). After matching adjustment,
Reproducible experiments cannot be performed until the discharge stabilizes. Therefore, at this stage, it is necessary to lower the substrate from the position of the waveguide to at least 10 to 15 cm or more.
After completion of this matching adjustment, it was confirmed that a spherical discharge was stably obtained at the center of the reaction tube, and the anode potential was applied to the sample substrate. In this embodiment, it is set to + 34V. Then, with the potential applied, the height of the highest part of the substrate is adjusted to be located 5 mm below the waveguide.

【0022】この状態で約10〜15分程度反応させ
る。本実施例では10分間とした。既に記述したよう
に、この段階での基板表面の温度の評価は大変困難であ
る。上部観測窓からの計測では190〜210℃と推定
された。
In this state, the reaction is carried out for about 10 to 15 minutes. In this embodiment, it is set to 10 minutes. As described above, it is very difficult to evaluate the temperature of the substrate surface at this stage. It was estimated to be 190 to 210 ° C by measurement from the upper observation window.

【0023】反応時間経過後、基板ステージを下方に移
動させ、放電とガス供給を停止し、陽極電位印加を止め
て反応を終了させた。試料の冷却は放置により速やかに
行われる。この時H2 を流し水素終端形成を促進した
り、あるいはHeを流して基板冷却を押し進めても良
い。反応終了後は開始前と同様10-4Torrまで真空引きす
る。
After the reaction time had elapsed, the substrate stage was moved downward, the discharge and gas supply were stopped, and the anode potential application was stopped to terminate the reaction. The sample is cooled immediately by leaving it to stand. At this time, H 2 may be flown to promote the formation of hydrogen termination, or He may be flowed to promote the cooling of the substrate. After completion of the reaction, vacuum is pulled to 10 -4 Torr as before starting.

【0024】得られた試料については次の様に評価を行
った。 i 多孔質構造の評価 多孔質層の構造、特にその断面の評価は直接的でかつ重
要である。しかし作製後の多孔質層はオングストローム
・レベルの微細孔や柱状構造となるため、取扱の容易な
走査型電子顕微鏡(以下、SEMとする)の解像度を越
える場合が多い。本実施例でも従来の例に習って、透過
型電子顕微鏡(以下、TEMとする)による断面観察を
行った。試料は上記の実験の試料から作製したものであ
る。観察結果写真から作製した断面図を図2に示す。幾
つかの屈折を示しながらも、微細孔21は概ね下方向へ
順調に成長している。また、微細孔21の分岐等は全く
認められなかった。孔径はおよそ20nm、ピッチは2
0〜30nmと思われる。TEM観察に先駆けたSEM
観察から、多孔質層の厚さは約50μm得られているこ
とがわかった。
The obtained sample was evaluated as follows. i Evaluation of Porous Structure Evaluation of the structure of the porous layer, especially its cross section, is direct and important. However, since the produced porous layer has angstrom-level fine pores and columnar structures, it often exceeds the resolution of a scanning electron microscope (hereinafter referred to as SEM), which is easy to handle. Also in this example, following the conventional example, the cross-section was observed with a transmission electron microscope (hereinafter referred to as TEM). The sample was made from the sample of the above experiment. A cross-sectional view prepared from the observation result photograph is shown in FIG. Although exhibiting some refraction, the micropores 21 are smoothly grown in a generally downward direction. No branching of the fine holes 21 was observed at all. Pore diameter is about 20 nm, pitch is 2
It seems to be 0 to 30 nm. SEM that preceded TEM observation
From the observation, it was found that the thickness of the porous layer was about 50 μm.

【0025】ii 結晶性の評価 多孔質化によってどの程度シリコン基板の結晶性が阻害
されるのかを、X線回折(以下、XRDとする)を用い
て評価した。ここでは、回折チャートの(400)面ピ
ークに注目してその半値幅を本実施例の多孔質化処理前
の基板と多孔質化処理後の基板とについて比較したもの
である。多孔質化処理前の基板の(400)面ピークの
半値幅5(deg) に対して、本実施例で得られた多孔質層
のそれは7(deg) と非常に近い値であり、シリコン基板
の単結晶性が良く保たれていることが確認された。
Ii Evaluation of Crystallinity The extent to which the crystallinity of the silicon substrate is hindered by the porosity was evaluated using X-ray diffraction (hereinafter referred to as XRD). Here, attention is paid to the (400) plane peak of the diffraction chart, and the half width thereof is compared between the substrate before the porosification treatment and the substrate after the porosification treatment of this embodiment. The full width at half maximum of the (400) plane peak of the substrate before the porosification treatment was 5 (deg), which is very close to 7 (deg) in the porous layer obtained in this example. It was confirmed that the single crystal property of was well maintained.

【0026】iii フォトルミネッセンス(PL)の評
価 多孔質シリコンのPLを評価した結果を以下に示す。実
施例1で得られた試料の多孔質層表面に、対してHe−
Cdレーザ光(325nm)を照射して励起したとこ
ろ、図3に示すように700nmにピークを持つ赤色発
光が観測された。
Iii Evaluation of Photoluminescence (PL) The results of evaluation of PL of porous silicon are shown below. On the surface of the porous layer of the sample obtained in Example 1, He-
When excited by irradiation with Cd laser light (325 nm), red emission having a peak at 700 nm was observed as shown in FIG.

【0027】「実施例2」本実施例では陽極電位の値を
変化させ、影響を観察した。実験条件および実験手順は
実施例1と同様であるが、基板ステージ移動前に印加す
る陽極電位を50Vとした。以下評価結果を記述する。
Example 2 In this example, the effect was observed by changing the value of the anode potential. The experimental conditions and experimental procedure are the same as in Example 1, but the anode potential applied before moving the substrate stage was set to 50V. The evaluation results are described below.

【0028】i 多孔質構造の評価 TEM観察結果写真では微細孔は実施例1同様、幾つか
の屈折を示しながらも概ね下方向へ順調に成長してお
り、微細孔の分岐等は全く認められなかった。ただし孔
径はおよそ40nm、ピッチは15〜20nmと全体に
孔の大型化傾向が認められ、またSEM観察から、多孔
質層の厚さも約65μmと厚くなっていることがわかっ
た。陽極電位増加の影響により、基板表面に飛来するフ
ッ素イオンが増加している為と考えられる。
I Evaluation of Porous Structure TEM observation result In the photograph, as in Example 1, the micropores were steadily grown in the general downward direction although showing some refraction, and branching of the micropores was observed at all. There wasn't. However, the pore size was about 40 nm and the pitch was 15 to 20 nm, and there was a tendency for the pores to become larger overall, and it was found from SEM observation that the thickness of the porous layer was as thick as about 65 μm. It is considered that fluorine ions flying to the surface of the substrate are increased due to the influence of the increase in the anode potential.

【0029】ii 結晶性の評価 以下、多孔質層とシリコン基板の結晶性を、実施例1同
様にXRDを用いて評価した結果を示す。ここでは、本
実施例の多孔質化処理前のシリコン基板のXRDによる
(400)面ピークの半値幅と多孔質化処理後のシリコ
ン基板のXRDによる(400)面ピークの半値幅とを
比較したものである。測定の結果、処理前の基板の(4
00)面ピークの半値幅5(deg) に対して多孔質層のそ
れは9(deg) と、実施例1に比べて広くなっており、シ
リコンの結晶性が阻害されていることが確認された。
Ii Evaluation of Crystallinity Below, the results of evaluating the crystallinity of the porous layer and the silicon substrate using XRD as in Example 1 are shown. Here, the full width at half maximum of the (400) plane peak by the XRD of the silicon substrate before the porosification treatment of this example and the half width at the (400) plane peak by the XRD of the silicon substrate after the porosification treatment were compared. It is a thing. As a result of the measurement, (4
It was confirmed that the half width of the (00) plane peak was 5 (deg) and that of the porous layer was 9 (deg), which was wider than that of Example 1, and that the crystallinity of silicon was inhibited. ..

【0030】iii PLの評価 実施例1で得られた試料と同様に、多孔質層表面に対し
てHe−Cdレーザ光(325nm)を照射して励起し
たところ、発光ピークは760nmにシフトしているこ
とがわかった。
Iii Evaluation of PL Similar to the sample obtained in Example 1, when the surface of the porous layer was irradiated with He—Cd laser light (325 nm) for excitation, the emission peak shifted to 760 nm. I found out that

【0031】「実施例3」本実施例では基板の形式をp
型からn型に変更して多孔質シリコンの作製を試みた。
n型の場合は反応に必要な正孔を基板から供給できない
こと、および微細孔形成の起点となる正孔供給不純物が
存在しないため、多孔質層の形成が困難であり、光照射
が必要であるとされてきた。それに対して本発明はプラ
ズマ放電空間からの光により、p型に遜色の無い多孔質
シリコンの作製が可能である。本実施例では基板を比抵
抗値2Ωcmのn型シリコン基板(100)面に変更し
て、影響を観察した。その他の実験条件および実験手順
は実施例1と同様であるが、n型シリコン基板表面に微
細孔形成開始の起点を与える為に、300メッシュのア
ルミナ粉をエタノールに分散させた液を使用して超音波
傷つけ処理を行った。傷つけ処理後のSEM観察結果で
は、確認可能な大きさの傷は確認できなかった(倍率7
万倍まで)。以下評価結果を記述する。
[Embodiment 3] In this embodiment, the substrate type is p
An attempt was made to produce porous silicon by changing the mold to n-type.
In the case of n-type, the holes necessary for the reaction cannot be supplied from the substrate, and since the hole-supplying impurities that are the starting points for forming the micropores do not exist, it is difficult to form the porous layer and light irradiation is required. It has been said that there is. On the other hand, according to the present invention, it is possible to produce porous silicon that is comparable to p-type by the light from the plasma discharge space. In this example, the substrate was changed to the n-type silicon substrate (100) surface having a specific resistance value of 2 Ωcm, and the effect was observed. The other experimental conditions and experimental procedures are the same as in Example 1, but in order to give a starting point for starting the formation of fine pores on the surface of the n-type silicon substrate, a liquid in which 300-mesh alumina powder is dispersed in ethanol is used. Ultrasonic damage treatment was performed. As a result of SEM observation after the scratching treatment, a scratch of a recognizable size could not be confirmed (magnification: 7).
Up to 10,000 times). The evaluation results are described below.

【0032】i 多孔質構造の評価 TEM観察結果写真では微細孔41は実施例1及び2同
様に図4の模式図に示すように、幾つかの屈折を示しな
がらも概ね下方向へ順調に成長しており、微細孔の分岐
等は全く認められなかった。また孔径及びピッチはおよ
そ10〜15nmの間でばらつきが見られた。TEM観
察結果から作製した模式図を図4に示す。SEM観察で
は多孔質層の厚さは約45μmであった。プラズマ光に
よる光照射の効果によって、p型基板に匹敵する多孔質
シリコンの形成に成功したと言えよう。
I Evaluation of Porous Structure As shown in the schematic diagram of FIG. 4, the micropores 41 in the photograph of the TEM observation result show some refraction as shown in the schematic view of FIG. However, no branching of fine pores was observed at all. Further, the hole diameter and the pitch were found to vary within a range of about 10 to 15 nm. FIG. 4 shows a schematic diagram prepared from the TEM observation result. According to SEM observation, the thickness of the porous layer was about 45 μm. It can be said that the formation of porous silicon comparable to the p-type substrate was successful due to the effect of light irradiation by plasma light.

【0033】ii 結晶性の評価 実施例1及び2同様にXRDを用いて本実施例の多孔質
処理前の試料基板における(400)面ピークの半角値
と多孔質処理後の試料基板における(400)面ピーク
の半値幅とを比較したところ、処理前の基板の(40
0)面ピークの半値幅5(deg) に対して多孔質層のそれ
は約12(deg) と、実施例1や2に比べてさらに広くな
っており、シリコンの結晶性が阻害されていることがわ
かる。またピーク位置も若干高角度側へシフトしてお
り、内部応力(圧縮)が生じていた。このシフトは、実
施例1及び2においても甚だ微量ながら検出されていた
ものである。
Ii Evaluation of Crystallinity As in Examples 1 and 2, using XRD, the half-angle value of the (400) plane peak in the sample substrate before the porous treatment of this example and the (400) in the sample substrate after the porous treatment were measured. ) The peak full width at half maximum of the
The half width of the 0) plane peak is 5 (deg), but that of the porous layer is about 12 (deg), which is wider than in Examples 1 and 2, and the crystallinity of silicon is obstructed. I understand. Also, the peak position was slightly shifted to the higher angle side, and internal stress (compression) was generated. This shift was also detected in Examples 1 and 2 although the amount was extremely small.

【0034】iii PLの評価 実施例1及び2で得られた試料と同様に、多孔質層表面
に対してHe−Cdレーザ光を照射して励起したとこ
ろ、図5に示すように発光ピークは610nmにシフト
しており、発光色も赤よりオレンジ色に近い色であっ
た。微細孔の径が細くなるに従って、発光ピークはブル
ー側へシフトする傾向が報告されており、本実施例の結
果はその報告と良く一致する。
Iii Evaluation of PL Similar to the samples obtained in Examples 1 and 2, when the surface of the porous layer was irradiated with He—Cd laser light to be excited, the emission peak was as shown in FIG. It was shifted to 610 nm, and the emission color was closer to orange than red. It has been reported that the emission peak tends to shift to the blue side as the diameter of the fine pores becomes smaller, and the results of this example are in good agreement with the report.

【0035】[0035]

【発明の効果】以上の様に、本発明の方法を用いること
によって基板の形式を問わず多孔質シリコンの作製が可
能である。本発明では石英反応管を使用したマイクロ波
プラズマCVD装置を使用したが、平行平板型の高周波
プラズマCVD装置においても高出力の高周波電源とバ
イアス電位印加機構を組み込むことによっても同様の効
果が得られるだろう。また同じマイクロ波CVD装置で
も、有磁場方式の装置によって大面積化を図ることが可
能である。
As described above, by using the method of the present invention, porous silicon can be produced regardless of the type of substrate. Although a microwave plasma CVD apparatus using a quartz reaction tube is used in the present invention, the same effect can be obtained by incorporating a high output high frequency power source and a bias potential applying mechanism in a parallel plate type high frequency plasma CVD apparatus. right. Even with the same microwave CVD apparatus, it is possible to increase the area by using a magnetic field type apparatus.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明で使用したマイクロ波プラズマCVD
装置
FIG. 1 is a microwave plasma CVD used in the present invention.
apparatus

【図2】 実施例1で得られた試料の断面TEM観察の
模式図
FIG. 2 is a schematic diagram of cross-sectional TEM observation of the sample obtained in Example 1.

【図3】 実施例1で得られた試料のPLスペクトルFIG. 3 is a PL spectrum of the sample obtained in Example 1.

【図4】 実施例3で得られた試料の断面TEM観察の
模式図
FIG. 4 is a schematic diagram of cross-sectional TEM observation of the sample obtained in Example 3.

【図5】 実施例3で得られた試料のPLスペクトルFIG. 5: PL spectrum of the sample obtained in Example 3

【符号の説明】[Explanation of symbols]

1 石英反応管 2 マイクロ波導波管 3 シリコン基板 4 基板裏面電極 5 球状放電プラズマ 6 石英基板ステージ 7 モリブデンステージホルダー 8 冷却水流 9 反応ガス流 10 イオン流 1 Quartz Reaction Tube 2 Microwave Waveguide 3 Silicon Substrate 4 Substrate Backside Electrode 5 Spherical Discharge Plasma 6 Quartz Substrate Stage 7 Molybdenum Stage Holder 8 Cooling Water Flow 9 Reactive Gas Flow 10 Ion Flow

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】単結晶シリコン基板より離れた位置でハロ
ゲン元素を含んだプラズマを形成し、同時に前記単結晶
シリコン基板に陽極電位を印加することによって前記プ
ラズマよりハロゲン元素イオンを基板方向へ引き寄せ、
前記基板表面にnmオーダーの直径もしくは間隔で微細
孔を形成することを特徴とする多孔質珪素部材の作製方
法。
1. A plasma containing a halogen element is formed at a position distant from a single crystal silicon substrate, and at the same time, an anode potential is applied to the single crystal silicon substrate to attract halogen element ions from the plasma toward the substrate.
A method for producing a porous silicon member, characterized in that fine holes are formed on the surface of the substrate at diameters or intervals of nm order.
【請求項2】請求項1のハロゲン系元素イオンが、フッ
素であることを特徴とする多孔質珪素部材の作製方法。
2. A method for producing a porous silicon member, wherein the halogen-based element ion of claim 1 is fluorine.
【請求項3】請求項1において、稀ガスを原料ガスとし
て用いることによって、プラズマの発光効率を高め、基
板表面に光照射を行うことを特徴とする多孔質珪素部材
の作製方法。
3. The method for producing a porous silicon member according to claim 1, wherein the rare gas is used as a source gas to enhance the luminous efficiency of plasma and irradiate the substrate surface with light.
JP10220392A 1992-03-27 1992-03-27 Manufacturing method of porous silicon member Expired - Fee Related JP3207505B2 (en)

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JP3207505B2 JP3207505B2 (en) 2001-09-10

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JP2005086198A (en) * 2003-09-05 2005-03-31 Hynix Semiconductor Inc Method of manufacturing flash memory device
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