JPH05273938A - Method for driving matrix thin film electro-luminescence panel - Google Patents
Method for driving matrix thin film electro-luminescence panelInfo
- Publication number
- JPH05273938A JPH05273938A JP4068261A JP6826192A JPH05273938A JP H05273938 A JPH05273938 A JP H05273938A JP 4068261 A JP4068261 A JP 4068261A JP 6826192 A JP6826192 A JP 6826192A JP H05273938 A JPH05273938 A JP H05273938A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- thin film
- column
- driver
- low
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 26
- 239000010409 thin film Substances 0.000 title claims abstract description 23
- 239000011159 matrix material Substances 0.000 title claims abstract description 14
- 238000005401 electroluminescence Methods 0.000 title claims abstract description 7
- 239000000758 substrate Substances 0.000 claims description 5
- 230000000694 effects Effects 0.000 claims description 2
- 230000007423 decrease Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
- Y02B20/30—Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明はマトリックス薄膜エレク
トロルミネッセンス（以下ＥＬという）パネルの駆動方
法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving a matrix thin film electroluminescence (hereinafter referred to as EL) panel.
【０００２】[0002]
【従来の技術】図５は、一般的によく知られた二重絶縁
構造のマトリックス薄膜ＥＬパネルの構造を示したもの
である。まず、ガラス基板８上にカラム側電極（透明電
極，ＩＴＯ）９をストライプ状に形成し、第１絶縁層１
０を積層する。さらに、発光層１１、第２絶縁層１２を
積層した後、最後にロー側電極（背面電極，Ａｌ）１３
をカラム側電極と直交するようにストライプ状に形成す
る。このようにして作られたマトリックス薄膜ＥＬパネ
ルの駆動方法として、たとえば特公平１−８８２８号公
報に開示されているように、書き込み電圧の印加を１／
２ＶｗとＶｗの２段階でステップ昇圧し、駆動時の消費
電力を低減する駆動方法が提案されている。2. Description of the Related Art FIG. 5 shows a structure of a matrix thin-film EL panel having a well-known double insulation structure. First, the column-side electrodes (transparent electrodes, ITO) 9 are formed in stripes on the glass substrate 8 and the first insulating layer 1 is formed.
Stack 0. Furthermore, after stacking the light emitting layer 11 and the second insulating layer 12, finally, the low-side electrode (back electrode, Al) 13
Are formed in stripes so as to be orthogonal to the column-side electrodes. As a driving method of the matrix thin film EL panel thus manufactured, for example, as disclosed in Japanese Patent Publication No. 1-8828, application of a write voltage is 1 /
A driving method has been proposed in which step-up is performed in two stages of 2Vw and Vw to reduce power consumption during driving.
【０００３】[0003]
【発明が解決しようとする課題】薄膜ＥＬ素子は容量性
素子であり、書き込み電圧を印加する際には、ドライバ
ＩＣのＯＮ抵抗やパネルの電極抵抗などの影響で、充分
な書き込み電圧を印加するのに数μｓの時間が必要であ
る。前述の特公平１−８８２８号に記載された駆動法で
は、書き込み電圧を２段階で印加するため、これに必要
な時間は１０μｓ以上になる。したがって、同様の書き
込み電圧印加時間を確保するためには、１ライン走査時
間を長くしなければならない。図３は、書き込み電圧を
１段で印加するノーマル駆動と、２段で印加するステッ
プ駆動の、１ライン走査時間を比較したものである。こ
のように、ステップ駆動では、消費電力の低減はできる
が、フレーム周波数が低下するために、輝度の低下やフ
リッカが発生し易いという問題があった。A thin film EL element is a capacitive element, and when a write voltage is applied, a sufficient write voltage is applied due to the ON resistance of the driver IC and the electrode resistance of the panel. It takes several μs to complete. In the driving method described in Japanese Patent Publication No. 1-8828, the write voltage is applied in two steps, so the time required for this is 10 μs or more. Therefore, in order to secure the same write voltage application time, it is necessary to lengthen the one-line scanning time. FIG. 3 compares the 1-line scanning time between the normal drive in which the write voltage is applied in one step and the step drive in which the write voltage is applied in two steps. As described above, in the step drive, although the power consumption can be reduced, there is a problem in that the frame frequency is lowered, so that the luminance is easily lowered and flicker is likely to occur.
【０００４】本発明はこのような課題に着目してなされ
たもので、その目的は、書き込み電圧の印加をステップ
駆動にしても、１ライン走査時間を長くせずに駆動でき
るマトリックス薄膜ＥＬパネルの駆動方法を提供するこ
とにある。The present invention has been made in view of such a problem, and an object thereof is to provide a matrix thin film EL panel which can be driven without increasing the 1-line scanning time even if the application of the write voltage is step-driven. It is to provide a driving method.
【０００５】[0005]
【課題を解決するための手段】本発明は、透明基板上に
ストライプ状にカラム側電極を形成し、さらにカラム側
電極上に薄膜エレクトロルミネッセンス層を形成し、さ
らに薄膜エレクトロルミネッセンス層上にカラム側電極
と直交するようにストライプ状にロー側電極を形成し、
カラム側電極とロー側電極間に所定の電圧を印加して電
気光学的表示効果を得るマトリックス薄膜エレクトロル
ミネッセンスパネルの駆動方法に於て、１ライン走査中
に書き込み電圧Ｖｗをステップ状に昇圧して印加する
際、先行して行う変調電圧Ｖｍの印加時間と書き込み電
圧がＶｗに至らないまでの印加時間を、同時またはそれ
ぞれの印加時間が重複するようにしたことを特徴とする
ものである。According to the present invention, a column-side electrode is formed in a stripe pattern on a transparent substrate, a thin film electroluminescent layer is further formed on the column-side electrode, and a column-side electrode is further formed on the thin film electroluminescent layer. The low-side electrode is formed in a stripe shape so as to be orthogonal to the electrode,
In a driving method of a matrix thin film electroluminescence panel which obtains an electro-optical display effect by applying a predetermined voltage between a column side electrode and a row side electrode, a writing voltage Vw is stepwise boosted during one line scanning. When applying, the modulation voltage Vm is applied in advance, and the application time until the write voltage does not reach Vw is set to be the same or overlap each other.
【０００６】（作用）薄膜ＥＬ素子の電圧-輝度特性の
一例を図４に示す。このように薄膜ＥＬ素子は、しきい
値電圧Ｖｔｈ以下ではほとんど発光せず、Ｖｔｈ以上で
急激に輝度が高くなる特徴がある。このためマトリック
ス薄膜ＥＬパネルを駆動する場合、選択画素にＶｔｈ以
上の電圧を印加し、非選択画素にＶｔｈ以下の電圧が印
加されるように駆動する。したがって、いまＶｗ−Ｖｍ
＜Ｖｔｈ＜Ｖｗなる関係がある駆動を行う場合は、まず
カラム側選択電極に変調電圧Ｖｍ、非選択電極にＧＮＤ
を印加し、各画素に充分に変調電圧が印加された後に、
ロー側電極から書き込み電圧Ｖｗを印加するのが一般的
である。このような駆動を行うことにより、選択画素に
は−Ｖｗ、非選択画素には−Ｖｗ＋Ｖｍの電圧が印加さ
れる。しかし、変調電圧が充分印加されていない状態で
書き込み電圧を印加すると、選択画素に印加される電圧
は低下し、逆に非選択画素に印加される電圧が上昇す
る。その結果、選択画素の輝度は低下し非選択画素の輝
度は高くなり、表示品質を著しく低下させる原因にな
る。次に、書き込み電圧を２段階で印加するステップ駆
動の場合を考える。１／２Ｖｗの電圧を印加するときに
は、変調電圧が印加されていなくても各画素に印加され
る電圧は−１／２Ｖｗ＋Ｖｍ〜−１／２Ｖｗである。こ
の値はしきい値電圧−Ｖｔｈに比べて小さく、前述のよ
うな問題は発生しない。したがって、変調電圧の印加と
１／２Ｖｗ印加を同時に、またはそれぞれの印加時間を
重複させても駆動上全く問題ない。そこで、充分変調電
圧が印加された後Ｖｗの書き込み電圧を印加すれば、１
ライン走査時間を長くせずにステップ駆動が可能にな
る。(Operation) An example of the voltage-luminance characteristic of the thin film EL element is shown in FIG. As described above, the thin film EL element has a characteristic that it hardly emits light at the threshold voltage Vth or lower and the brightness rapidly increases at Vth or higher. Therefore, when driving the matrix thin film EL panel, a voltage of Vth or more is applied to the selected pixel and a voltage of Vth or less is applied to the non-selected pixel. Therefore, Vw-Vm
When driving with a relationship of <Vth <Vw, first, the modulation voltage Vm is applied to the column-side selection electrode, and the GND is applied to the non-selection electrode.
, And after sufficient modulation voltage is applied to each pixel,
It is common to apply the write voltage Vw from the low-side electrode. By performing such driving, a voltage of −Vw is applied to the selected pixel and a voltage of −Vw + Vm is applied to the non-selected pixel. However, when the write voltage is applied in a state where the modulation voltage is not sufficiently applied, the voltage applied to the selected pixel decreases, and conversely the voltage applied to the non-selected pixel increases. As a result, the brightness of the selected pixel decreases and the brightness of the non-selected pixel increases, which causes the display quality to deteriorate significantly. Next, consider the case of step driving in which the write voltage is applied in two steps. When the voltage of 1/2 Vw is applied, the voltage applied to each pixel is -1/2 Vw + Vm to -1/2 Vw even if the modulation voltage is not applied. This value is smaller than the threshold voltage −Vth, and the above-mentioned problem does not occur. Therefore, there is no problem in driving even if the application of the modulation voltage and the application of 1/2 Vw are applied simultaneously or the application times thereof are overlapped. Therefore, if the write voltage of Vw is applied after the sufficient modulation voltage is applied, 1
Step driving becomes possible without increasing the line scanning time.
【０００７】[0007]
【実施例】以下、本発明の一実施例について説明する。
図１に本発明の方法で使用される駆動回路の一実施例
を、図２にこの回路の印加電圧波形を示す。なお、図中
ＶｗはＥＬパネルの書き込み電圧、Ｖｍは変調電圧であ
り、Ｖｗ−Ｖｍ＜Ｖｔｈ＜Ｖｗ（Ｖｔｈはパネルのしき
い値電圧）とする。第１図で、１はマトリックス薄膜Ｅ
Ｌパネル、２，３はロー側ドライバＩＣ、４はカラム側
ドライバＩＣである。また、５，６，７は各ドライバＩ
Ｃの論理回路を示す。ロー側ドライバＩＣには、スイッ
チを介して書き込み電源Ｖｗ及び１／２Ｖｗを接続し、
カラム側ドライバＩＣには、スイッチを介して書き込み
電源Ｖｗ、１／２Ｖｗ及びフローティング可能な変調電
源Ｖｍを接続する。EXAMPLE An example of the present invention will be described below.
FIG. 1 shows an embodiment of a drive circuit used in the method of the present invention, and FIG. 2 shows an applied voltage waveform of this circuit. In the figure, Vw is a write voltage of the EL panel, Vm is a modulation voltage, and Vw-Vm <Vth <Vw (Vth is a threshold voltage of the panel). In FIG. 1, 1 is a matrix thin film E
L panel, 2 and 3 are row side driver ICs, and 4 is a column side driver IC. Also, 5, 6 and 7 are the drivers I
The logic circuit of C is shown. The write power supply Vw and 1/2 Vw are connected to the low side driver IC via a switch,
A write power supply Vw, 1/2 Vw and a floating modulation power supply Vm are connected to the column side driver IC via a switch.
【０００８】次に図２を用いて、図１の駆動回路の具体
的な駆動法について説明する。ここで、ロー側電極を線
順次駆動する際、ロー側選択電極にＶｗを印加する駆動
をＰＯＳ駆動、ロー側選択電極にＧＮＤを印加する駆動
をＮＥＧ駆動と呼び、ロー側奇数電極に対してＰＯＳ駆
動、ロー側偶数電極に対してＮＥＧ駆動を行うフィール
ドを第１フィールド、逆にロー側奇数電極に対してＮＥ
Ｇ駆動、ロー側偶数電極に対してＰＯＳ駆動を行うフィ
ールドを第２フィールドと呼ぶことにする。Next, a specific driving method of the driving circuit shown in FIG. 1 will be described with reference to FIG. Here, when line-sequentially driving the low-side electrodes, drive for applying Vw to the low-side selection electrodes is called POS drive, and drive for applying GND to the low-side selection electrodes is called NEG drive. The field for performing POS drive and NEG drive for the low-side even electrodes is the first field, and conversely NE for the low-side odd electrodes.
A field in which the G drive and the POS drive for the low-side even electrode are performed will be referred to as a second field.
【０００９】(1)ＰＯＳ駆動 変調及び書き込み過程 スイッチＳＷ２、ＳＷ６をＯＮにし、他のスイッチはＯ
ＦＦにする。これと同時にカラム側選択電極のドライバ
ＩＣはプルダウン側電位（ＧＮＤ）、カラム側非選択電
極のドライバＩＣはプルアップ側電位（Ｖｍ）を出力す
る。また、ロー側選択電極のドライバＩＣはプルアップ
側電位（１／２Ｖｗ）を出力し、ロー側非選択電極のド
ライバＩＣはプルダウン側電位（フローティング）にす
る。このとき、ロー側選択電極の選択画素には−１／２
Ｖｗ、ロー側選択電極の非選択画素には−１／２Ｖｗ＋
Ｖｍの電圧が印加される。他の非選択画素には、−Ｖｍ
〜Ｖｍの電圧が印加される。(1) POS drive Modulation and writing process Switches SW2 and SW6 are turned on and the other switches are turned on.
Set to FF. At the same time, the driver IC of the column-side selection electrode outputs the pull-down side potential (GND), and the driver IC of the column-side non-selection electrode outputs the pull-up side potential (Vm). The driver IC of the low-side selection electrode outputs the pull-up side potential (1/2 Vw), and the driver IC of the low-side non-selection electrode is set to the pull-down side potential (floating). At this time, the selected pixel of the low-side selection electrode has -1/2
Vw, -1/2 Vw + for the non-selected pixel of the low-side selection electrode
A voltage of Vm is applied. -Vm for other non-selected pixels
A voltage of ~ Vm is applied.
【００１０】(2)ＰＯＳ駆動 書き込み過程 スイッチＳＷ２をＯＦＦ、スイッチＳＷ１をＯＮにし、
各ドライバＩＣの出力は前過程と同じ状態を保持する。
これによって、ロー側選択電極の選択画素には−Ｖｗの
電圧が印加され発光するが、ロー側選択電極の非選択画
素には−Ｖｗ＋Ｖｍの電圧しか印加されず発光しない。
また、それ以外の非選択画素には前過程に印加された電
圧が保持される。(2) POS drive writing process Switch SW2 is turned off and switch SW1 is turned on,
The output of each driver IC maintains the same state as in the previous process.
As a result, a voltage of -Vw is applied to the selected pixel of the low-side selection electrode to emit light, but only a voltage of -Vw + Vm is applied to the non-selected pixel of the low-side selection electrode to emit no light.
The voltage applied in the previous process is held in the other non-selected pixels.
【００１１】(3)ＰＯＳ駆動 放電過程 スイッチＳＷ１をＯＦＦにし、ロー側全ドライバＩＣの
出力をプルダウン側にする。これによって、前書き込み
過程時にロー側選択電極の画素に蓄えられた電荷は放電
される。(3) POS drive Discharging process The switch SW1 is turned off, and the outputs of all low-side driver ICs are set to the pull-down side. As a result, the electric charge stored in the pixel of the low-side selection electrode during the pre-writing process is discharged.
【００１２】(4)ＮＥＧ駆動 変調及び書き込み過程 スイッチＳＷ４、ＳＷ５をＯＮにし、他のスイッチはＯ
ＦＦにする。これと同時にカラム側選択電極のドライバ
ＩＣはプルアップ側電位（１／２Ｖｗ）、カラム側非選
択電極のドライバＩＣはプルダウン側電位（１／２Ｖｗ
−Ｖｍ）を出力する。また、ロー側選択電極のドライバ
ＩＣはプルダウン側電位（ＧＮＤ）を出力し、ロー側非
選択電極のドライバＩＣはプルアップ側電位（フローテ
ィング）にする。このとき、ロー側選択電極の選択画素
には１／２Ｖｗ、ロー側選択電極の非選択画素には１／
２Ｖｗ−Ｖｍの電圧が印加される。他の非選択画素に
は、−Ｖｍ〜Ｖｍの電圧が印加される。(4) NEG drive Modulation and writing process Switches SW4 and SW5 are turned on, and other switches are turned on.
Set to FF. At the same time, the driver IC of the column side selection electrode has a pull-up side potential (1/2 Vw) and the driver IC of the column side non-selection electrode has a pull-down side potential (1/2 Vw).
-Vm) is output. Further, the driver IC of the low-side selection electrode outputs the pull-down side potential (GND), and the driver IC of the low-side non-selection electrode is set to the pull-up side potential (floating). At this time, 1/2 Vw is applied to the selected pixel of the low-side selection electrode and 1 / Vw is applied to the non-selected pixel of the low-side selection electrode.
A voltage of 2Vw-Vm is applied. A voltage of −Vm to Vm is applied to the other non-selected pixels.
【００１３】(5)ＮＥＧ駆動 書き込み過程 スイッチＳＷ４をＯＦＦ、スイッチＳＷ３をＯＮにし、
各ドライバＩＣの出力は前過程と同じ状態を保持する。
これによって、ロー側選択電極の選択画素にはＶｗの電
圧が印加され発光するが、ロー側選択電極の非選択画素
にはＶｗ−Ｖｍの電圧しか印加されず発光しない。ま
た、それ以外の非選択画素には前過程に印加された電圧
が保持される。(5) NEG drive writing process Switch SW4 is turned off and switch SW3 is turned on,
The output of each driver IC maintains the same state as in the previous process.
As a result, the voltage of Vw is applied to the selected pixel of the low-side selection electrode to emit light, but only the voltage of Vw-Vm is applied to the non-selected pixel of the low-side selection electrode to emit no light. The voltage applied in the previous process is held in the other non-selected pixels.
【００１４】(6)ＮＥＧ駆動 放電過程 スイッチＳＷ３及びＳＷ５をＯＦＦ、スイッチＳＷ６を
ＯＮにし、ロー側全ドライバ ＩＣの出力をプルダウン
側にする。これによって、前書き込み過程時にロー側選
択電極の画素に蓄えられた電荷は放電される。上記(1)
〜(3)のＰＯＳ駆動と(4)〜(6)のＮＥＧ駆動をフィール
ド毎に交互に行うことで、マトリックス薄膜ＥＬパネル
の各画素には対称電圧が印加される。(6) NEG drive discharge process Switches SW3 and SW5 are turned off, switch SW6 is turned on, and the outputs of all low-side driver ICs are set to the pull-down side. As a result, the electric charge stored in the pixel of the low-side selection electrode during the pre-writing process is discharged. Above (1)
By alternately performing the POS drive of (3) to the NEG drive of (4) to (6) for each field, a symmetrical voltage is applied to each pixel of the matrix thin film EL panel.
【００１５】[0015]
【発明の効果】本発明により、１ライン走査時間を長く
することなく低消費電力のステップ駆動を行うことがで
きる。According to the present invention, low power consumption step driving can be performed without increasing the one-line scanning time.
【図１】本発明の方法の回路図である。1 is a circuit diagram of the method of the present invention.
【図２】図１の回路の印加電圧波形のグラフである。2 is a graph of an applied voltage waveform of the circuit of FIG.
【図３】駆動の走査時間を説明するグラフである。FIG. 3 is a graph illustrating driving scan time.
【図４】薄膜ＥＬ素子の電圧-輝度特性のグラフであ
る。FIG. 4 is a graph of voltage-luminance characteristics of a thin film EL device.
【図５】薄膜ＥＬ素子の一部切欠斜視図である。FIG. 5 is a partially cutaway perspective view of a thin film EL element.
１．マトリックス薄膜ＥＬパネル ２．ロー側奇数ドライバＩＣ ３．ロー側偶数ドライバＩＣ ４．カラム側ドライバＩＣ ５〜７．ドライバＩＣ論理回路 ８．ガラス基板 ９．カラム側電極 １０．第１絶縁層 １１．発光層 １２．第２絶縁層 １３．ロー側電極 1. Matrix thin film EL panel 2. Low side odd driver IC 3. Low side even driver IC 4. Column side driver IC 5-7. Driver IC logic circuit 8. Glass substrate 9. Column side electrode 10. First insulating layer 11. Light emitting layer 12. Second insulating layer 13. Low side electrode
Claims (2)
を形成し、さらにカラム側電極上に薄膜エレクトロルミ
ネッセンス層を形成し、さらに薄膜エレクトロルミネッ
センス層上にカラム側電極と直交するようにストライプ
状にロー側電極を形成し、カラム側電極とロー側電極間
に所定の電圧を印加して電気光学的表示効果を得るマト
リックス薄膜エレクトロルミネッセンスパネルの駆動方
法に於て、１ライン走査中に書き込み電圧Ｖｗをステッ
プ状に昇圧して印加する際、先行して行う変調電圧Ｖｍ
の印加時間と書き込み電圧がＶｗに至らないまでの印加
時間を、同時またはそれぞれの印加時間が重複するよう
にしたことを特徴とするマトリックス薄膜エレクトロル
ミネッセンスパネルの駆動方法。1. A stripe-shaped column-side electrode is formed on a transparent substrate, a thin-film electroluminescent layer is further formed on the column-side electrode, and a stripe-shaped electrode is formed on the thin-film electroluminescent layer so as to be orthogonal to the column-side electrode. In the method of driving a matrix thin film electroluminescence panel, in which a row-side electrode is formed on a substrate and a predetermined voltage is applied between the column-side electrode and the row-side electrode to obtain an electro-optical display effect, a write voltage is applied during one line scanning. When Vw is stepped up and applied, the modulation voltage Vm that is performed in advance
The method for driving a matrix thin film electroluminescence panel, characterized in that the application time and the application time until the writing voltage does not reach Vw are made simultaneous or overlapped.
２ＶｗとＶｗの２段階であり、変調電圧Ｖｍの印加時間
と書き込み電圧１／２Ｖｗの印加時間が、同時またはそ
れぞれの印加時間が重複するようにした請求項１記載の
マトリックス薄膜エレクトロルミネッセンスパネルの駆
動方法。2. The step of boosting the write voltage is approximately 1 /
2. The driving of the matrix thin film electroluminescence panel according to claim 1, wherein the application time of the modulation voltage Vm and the application time of the write voltage 1/2 Vw are simultaneous or overlapped in two stages of 2 Vw and Vw. Method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4068261A JPH05273938A (en) | 1992-03-26 | 1992-03-26 | Method for driving matrix thin film electro-luminescence panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4068261A JPH05273938A (en) | 1992-03-26 | 1992-03-26 | Method for driving matrix thin film electro-luminescence panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05273938A true JPH05273938A (en) | 1993-10-22 |
Family
ID=13368639
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4068261A Pending JPH05273938A (en) | 1992-03-26 | 1992-03-26 | Method for driving matrix thin film electro-luminescence panel |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05273938A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000356973A (en) * | 1999-04-14 | 2000-12-26 | Denso Corp | Driving circuit for display device |
| EP1193673A2 (en) * | 2000-09-29 | 2002-04-03 | Fujitsu Hitachi Plasma Display Limited | Capacitive-load driving circuit capable of properly handling temperature rise and plasma display apparatus using the same |
| JP2005024816A (en) * | 2003-07-01 | 2005-01-27 | Fuji Xerox Co Ltd | Driving device for display medium |
| JP2005526291A (en) * | 2002-05-16 | 2005-09-02 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Discharge of light emitting device capacitance by limited current |
-
1992
- 1992-03-26 JP JP4068261A patent/JPH05273938A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000356973A (en) * | 1999-04-14 | 2000-12-26 | Denso Corp | Driving circuit for display device |
| JP4501206B2 (en) * | 1999-04-14 | 2010-07-14 | 株式会社デンソー | Display device drive circuit |
| EP1193673A2 (en) * | 2000-09-29 | 2002-04-03 | Fujitsu Hitachi Plasma Display Limited | Capacitive-load driving circuit capable of properly handling temperature rise and plasma display apparatus using the same |
| US8928646B2 (en) | 2000-09-29 | 2015-01-06 | Hitachi Maxell, Ltd. | Capacitive-load driving circuit and plasma display apparatus using the same |
| US9305484B2 (en) | 2000-09-29 | 2016-04-05 | Hitachi Maxell, Ltd. | Capacitive-load driving circuit and plasma display apparatus using the same |
| JP2005526291A (en) * | 2002-05-16 | 2005-09-02 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Discharge of light emitting device capacitance by limited current |
| JP2005024816A (en) * | 2003-07-01 | 2005-01-27 | Fuji Xerox Co Ltd | Driving device for display medium |
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