JPH05267568A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To sharply increase storage capacity while improving high integration and high reliability by masking halfway with a formation protective film having a strong side wall protective property at the time of forming a storage electrode. CONSTITUTION:An opening part 3 is provided on a storage capacity forming region of an insulating film 2 on a semiconductor substrate, the whole surface on the semiconductor substrate 1 is covered with a first polysilicon film 4 followed by covering with a resist film 5 for being patterned in order to leave the resist film 5 on the opening part 3. Next, anisotropic etching is performed with the resist film 5 as a mask so as to perform etching to the extent not to expose an insulating film 2, which is a backing film, while protecting the side wall of the first polysilicon film 4 by a formation protective film 7 formed by reaction between the first etching gas 6 and the first polysilicon film 4. Continuously, isotropic etching is performed having the resist film 5 and the formation protective film 7 as masks until the insulating film 2 exposes the first polysilicon film 4 in order to form an undercut part 9 on the side lower part of the first polysilicon film 4 so as to form a fin type accumulated electrode.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cell storage capacity manufacturing method. Along with the higher integration and higher speed of semiconductor devices, the size of each pattern of device elements has been reduced.

On the other hand, the storage capacity must be made as large as possible, and the capacity is earned by digging a groove on the substrate or stacking the groove on the substrate to extend it in the vertical direction.

[0003]

2. Description of the Related Art FIG. 3 is an explanatory view of a conventional example. In the figure, 20 is a silicon (Si) substrate, 21 is a field silicon dioxide (SiO ₂ ) film, 22 is a polycrystalline silicon (poly Si) storage electrode, and 23 is a trench.

Conventionally, it was technically difficult to form a storage capacitor electrode having a large cell storage capacity. That is, in order to make three-dimensionalization remarkable in the conventional stack type,
As shown in (a), it was effective to form the storage electrode 19 with a thick poly-Si film and utilize its side area.

However, the step difference of the poly-Si film storage electrode 19 was severe and it was difficult to form a pattern in the subsequent steps. In addition, the multi-layer fin type storage electrode has a long process and is complicated, and technically lacks reliability.

The trench type shown in FIG. 3 (b) is complicated to form a device inside the Si substrate and is difficult to control. Further, the sidewall of the trench 23 has a defect. There is a problem in that the characteristics tend to occur and the characteristics deteriorate.

[0007]

Therefore, it is difficult to form a storage capacitor electrode having a large cell capacity, which hinders high integration and high reliability of semiconductor devices.

In order to solve the above problems, the present invention provides
Provided is a manufacturing method of a turtle that easily obtains a stack type storage capacitor having a fin structure.

[0009]

FIG. 1 is a diagram illustrating the principle of the present invention. In the figure, 1 is a semiconductor substrate, 2 is an insulating film, 3
Is an opening, 4 is a first poly-Si film, 5 is a resist film, 6 is a first etching gas, 7 is a protective film for protection, 8 is a second etching gas, 9 is an undercut portion, and 10 is a dielectric. film,
Reference numeral 11 is a second poly-Si film, 12 is a cover insulating film, and 13 is an Al electrode film.

Regarding the present invention which solves the above problems,
It demonstrates in order of a process with reference to FIG. In the method of manufacturing a fin-type storage capacitor on a semiconductor substrate 1, as shown in FIG. 1A, an opening 3 is provided in a storage capacitor forming region of an insulating film 2 coated on the semiconductor substrate 1, The first poly-Si film 4 is coated on the entire surface of 1 and then the resist film 5 is coated and patterned to leave the resist film 5 on the opening 3.

Next, as shown in FIG. 1 (b), anisotropic etching is performed using the resist film 5 as a mask, and the reaction between the first etching gas 6 and the first poly-Si film 4 is performed. While protecting the side wall of the first poly-Si film 4 with the generated protection film 7, the etching is performed to the extent that the insulating film 2 which is the base film of the first poly-Si film 4 is not exposed.

Subsequently, as shown in FIG. 1C, the first poly-Si film 4 is isotropic until the insulating film 2 is exposed, using the resist film 5 and the protective film 7 as a mask. Etching is performed to form an undercut portion 9 below the side surface of the first poly-Si film 4 to form a fin type storage electrode.

Thereafter, as shown in FIG. 1D, a dielectric film 10 is formed on the first poly-Si film 4, and the dielectric film 10 is formed.
The second poly-Si film 11 is covered with the vias and patterned to form a counter electrode.

[0014]

According to the present invention, when the storage electrode to be the lower extraction electrode is formed, the storage electrode is anisotropically etched by masking the storage electrode with a strong side wall protective property up to the middle. By forming the undercut portion under the storage electrode by etching the formation isotropically or by a method close to it, the capacitance can be increased by using this region as the area of the fin of the storage electrode.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a schematic cross-sectional view of the principle of the present invention and the process sequence of one embodiment, and FIG. 2 is an RIE used in one embodiment of the present invention.
It is a device schematic cross section.

In the figure, 1 is a semiconductor substrate, 2 is an insulating film, 3 is an opening, 4 is a first poly-Si film, 5 is a resist film, 6 is a first etching gas, 7 is a protective film, and 8 is a protective film. Is the second etching gas, 9 is the undercut portion, 10 is the dielectric film, 11 is the second poly-Si film, 12 is the cover insulating film, and 13 is
Al electrode film, 14 is a chamber, 15 is a stage, 16 is a gas inlet, 17 is a gas shower, 18 is an exhaust port, and 19 is an RF power source. An embodiment of the present invention will be described in order of steps with reference to FIGS.

As shown in FIG. 1A, an opening 3 is provided in the storage electrode forming region of an insulating film 2 made of a field SiO ₂ film coated on a semiconductor substrate 1 made of a Si wafer. The first poly-Si film 4 is formed on the entire surface by the CVD method.
Cover to a thickness of 2,000Å. A resist film 5 is formed on it 5,
It is coated to a thickness of 000Å and patterned for fin formation of the storage electrode.

Next, as shown in FIG. 1B, the first poly-Si film 4 is used as a mask, and the resist film 3 is used as a mask. The RIE apparatus shown in FIG. As etching gas 6, hydrogen bromide (HBr) 90sccm and oxygen (O ₂ ) 10sc
A mixed gas of cm is introduced into the chamber 14 of the RIE device through the gas shower 17, and the vacuum degree in the chamber 14 is 0.1 Torr and RF.
With the power of 30 W, of the 2,000 Å thickness of the first poly-Si film 4, only the upper half, 1,000 Å, is subjected to primary etching by anisotropic dry etching.

At this time, the etched first poly-Si film 4
A SiBrOx-based generated protective film 6 is formed on the side wall of the Si by reacting the first etching gas 6 and the first poly-Si film 4, and this becomes a protective film. The sidewall of 4 is not etched.

Then, as shown in FIG. 1C, 100 sccm of sulfur hexafluoride (SF ₆ ) was used as the second etching gas 8 in the same chamber 14, and the degree of vacuum in the chamber 14 was 0.4 Tor.
The remaining first poly-Si film 4 is isotropically etched at a r and RF power of 100 W using the resist film 5 and the protective film 7 as a mask until the insulating film 2 is exposed.

The etching at this time may be 1,000 Å,
Further, when overetching is performed for 2,000Å, isotropic etching in the lateral direction of the lower portion of the first poly-Si film 4 proceeds, and an undercut portion 9 is formed in the first poly-Si film 4. As a result, the surface area of the storage electrode increases. As a result, the fin of the storage electrode made of the first poly-Si film 4 is formed.

Thereafter, as shown in FIG. 1D, a silicon nitride (Si ₃ N ₄ ) film to be the dielectric film 10 is formed into a C film in a normal process.
The second poly-Si film 11 is formed after being formed to a thickness of 100Å by the VD method.
Is deposited by CVD to a thickness of 2,000Å and patterned to form the counter electrode.

Further, a PSG film is coated as the cover insulating film 12 by the CVD method, a through hole is opened, and an extraction electrode of a capacitor made of an aluminum (Al) electrode film 13 is formed to complete a storage capacitor.

[0024]

As described above, according to the present invention,
It is possible to form a stacked cell storage capacitor having fins, which significantly increases the storage capacitor, which greatly contributes to high integration and high reliability of semiconductor devices.

[Brief description of drawings]

FIG. 1 is an explanatory view of the principle of the present invention.

FIG. 2 is a schematic sectional view of an apparatus used in one embodiment of the present invention.

FIG. 3 is an explanatory diagram of a conventional example.

[Explanation of symbols]

 1 semiconductor substrate 2 insulating film 3 opening 4 first poly-Si film 5 resist film 6 first etching gas 7 generated protective film 8 second etching gas 9 undercut part 10 dielectric film 11 second poly-Si film 12 Cover insulating film 13 Al electrode film 14 Chamber 15 Stage 16 Gas inlet 17 Gas shower 18 Exhaust port 19 RF power supply

Claims (1)

[Claims] 1. A method of manufacturing a fin type storage capacitor on a semiconductor substrate (1), wherein an opening (3) is provided in a storage capacitor forming region of an insulating film (2) coated on the semiconductor substrate (1), The whole surface of the semiconductor substrate (1) is covered with a first polycrystalline silicon film (4), and then a resist film (5) is covered and patterned, and the resist film (5) is formed on the opening (3). 5) is left and anisotropic etching is performed by using the resist film (5) as a mask, and is generated by the reaction between the first etching gas (6) and the first polycrystalline silicon film (4). A step of etching the insulating film (2), which is a base film of the first polycrystalline silicon film (4), by the generation protective film (7) to such an extent that the insulating film (2) is not exposed; and the resist film (5) and the generation protective film. Using the (7) as a mask, the first polycrystalline silicon film (4) is isotropically etched until the insulating film (2) is exposed, and then the first polycrystalline silicon film (4) is etched. Forming a fin type storage electrode on the side surface lower side of the emission layer (4) formed undercut portion (9), thereafter, the dielectric film on the first polycrystalline silicon film (4)
Forming a counter electrode by forming (10), covering the second polycrystalline silicon film (11) through the dielectric film (10), and patterning to form a counter electrode. Manufacturing method.