JPH05266127A - Method and device for cell ular representation/simple boolean expression transformation - Google Patents

Abstract

PURPOSE:To transform logic circuit data in cell ular representation into Boolean expression including no constant by performing specific processing for all cells of an extracted combinational logic circuit. CONSTITUTION:This method and device have a cell ular representation logic circuit data storage means 2 wherein the constitution of the combinational logic circuit 1 is represented with data including connection relation between a cell name and a cell terminal and a sum of cell ular products type logical data storage means 3 storing data represented in the form of the sum of products of the logical functions of the respective cells constituting the combinational logic circuit 1. Then a clip cube generating means 4 generates a clip cube for discriminating a constant and a variable of each input of a cell when a '0' or '1'-fixed clip is connected to the input terminal of the cell. A simple Boolean expression transforming means 5 processes an ON cube in a group of input values generating an output '1' and the chip cube and represents the logical function of the cell in Boolean expression including no constant according to the arithmetic result.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used for designing an ASIC logic circuit and the like, and is a cell expression for converting a combinational logic circuit represented by a cell name and a connection relation between cell terminals into a Boolean expression containing no constant. / It relates to a simple boolean expression conversion method and device.

[0002]

2. Description of the Related Art In an ASIC logic circuit, it is necessary to convert logic circuit design data in a cell expression into a Boolean expression for logical processing by a test pattern generation device, a timing analysis device and a logic synthesis device.

For example, an AND gate 20, an inverter 21, and an OR gate 2 in the combinational logic circuit shown in FIG.
2, exclusive or gate 23, and gate 2
4, 1 clip cell 30 and 0 clip cell 31 are cells in the cell library. The 1-clip cell 30 and the 0-clip cell 31 output fixed values of "1" and "0", respectively, and are physically a power supply line and a ground line. This logic circuit has a Boolean formula F4 = (1 · B · C ++ D + E) · (F · 0 + * F ·
1) can be represented.

[0004]

However, since the Boolean expressions include constants "0" and "1" as well as the variables B to F, the expression of the Boolean expressions on the computer becomes complicated, and the logical optimum. It is not possible to easily and quickly perform logical processing such as conversion.

In view of the above problems, an object of the present invention is to provide a cell expression / simple Boolean expression conversion method and apparatus capable of converting logic circuit data of a cell expression into a Boolean expression which does not include a constant. Especially.

[0006]

FIG. 1 shows the principle configuration of a cell expression / simple Boolean conversion device according to the first invention.

In this cell expression / simple Boolean type conversion device, a cell expression logic circuit data storage means 2 in which the configuration of the combinational logic circuit 1 is expressed and stored by data including a cell name and a connection relation between cell terminals, With respect to each of the cells forming the combinational logic circuit 1 and the cell product-summation type logical data storage means 3 in which the data representing the logical function of each cell forming the combinational logic circuit 1 is stored, the input of the cell is performed. '0' on the edge
If fixed or fixed '1' clip cells are connected, for each of the cells forming the combinational logic circuit 1 and the clip cube creating means 4 for creating a clip cube that distinguishes the constant and variable of each input of the cell. , An on-cube, which represents each term of the product-sum form data, which is a set of input values whose output is “1”, and the clip cube,
Based on the operation result, a simple Boolean expression conversion means 5 expressing the logical function of the cell by a Boolean expression that does not include a constant.
It has and.

According to the first aspect of the present invention, the logic circuit data in the cell representation can be efficiently and easily converted into a Boolean expression that does not include a constant. By using this Boolean expression, it becomes possible to perform logic processing such as logic optimization for a complicated ASIC logic circuit more easily and quickly.

In the first aspect of the first aspect of the invention, the cell product-sum logic data storage means 3 stores data representing the logical function of each cell constituting the combinational logic circuit 1 in a product-sum Boolean expression. Further, each term of the product-sum Boolean expression is represented by an on-cube that is a set of input values whose output is '1', and the product-sum Boolean expression is an on-set cover that is a set of the on-cubes. The on-set cover conversion means for converting into.

In the case of this configuration, when the clip cell is not connected to the input end of the cell, the logical function of the cell can be easily and quickly expressed by the Boolean expression by referring to the cell product-sum logic data storage means 3. You can On the other hand, since the number of clip cells is usually relatively small, this configuration can reduce the processing time, which is preferable.

In the second aspect of the first aspect of the invention, the cell product-sum type logic data storage means 3 stores data representing the logic function of each cell forming the combinational logic circuit 1 by an onset cover, The onset cover is composed of a set of oncubes, which is a set of input values for which the output of the cell is “1”.

In the case of this structure, the onset cover converting means is not necessary.

In the third aspect of the first aspect of the present invention, the simple Boolean conversion means 5 is an intersection operation means for performing an intersection operation for detecting an on-cube that conflicts with the clip cube, and an on-cube that does not conflict with the clip cube. And means for performing an operation on the clip cube and converting the result into a Boolean expression that does not include a constant.

In this case, since the on-cubes that conflict with the clip cube are excluded in advance, the individual processing becomes simpler.

According to the second aspect of the present invention, in the cell expression / simple Boolean conversion method for converting a combinational logic circuit expressed by a cell and its terminal connection relationship into a cell-independent boolean network, the input / output logic of the cell is changed. Expressed by the sum-of-products Boolean expression, if a fixed "0" clip cell is connected to the input end of the cell, set a constant 0 to the input end of the cell and set "1" to the input end of the cell. 'If a fixed clip cell is connected, a constant 1 is set to the cell input end, and in the product-sum Boolean expression of the cell, the deletion operation of the variable at the input end to which the constant is set This is applied on the form logical expression to convert the product-sum Boolean expression into a Boolean expression irrelevant to the variable at the input end in which the constant is set.

According to the second aspect of the present invention, the logic circuit data in the cell representation can be efficiently and easily converted into a Boolean expression that does not include a constant. By using this Boolean expression, it becomes possible to perform logic processing such as logic optimization for a complicated ASIC logic circuit more easily and quickly.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 shows the hardware configuration of the cell expression logic circuit optimizing device. The computer 10 reads the cell expression logic circuit data file 12 and the cell product-sum logic data file 14, performs the processing shown in FIG. 3, and outputs the cell expression optimization logic circuit data file 16. The cell representation logic circuit data file 12 is an AS designed using cells in a cell library without considering logic optimization.
It is a CAD data file of an IC logic circuit, and is a netlist consisting of cell specific names and cell terminal connection data. The cell product-sum logic data file 14 is a file of data representing the function of each cell in the cell library in a product-sum (Boolean product sum form) Boolean expression.

Next, the outline of this processing will be described with reference to FIG. Hereinafter, the numerical value in the parenthesis represents the step identification number in the figure.

(50) A combinational logic circuit is extracted from the cell representation logic circuit data file 12.

(51) The extracted logic circuit is converted into a Boolean expression that does not include a constant by the processing described later.

(52) This Boolean expression is modified to perform a known logic optimization process.

(53) The optimized Boolean expression is converted back into the logic circuit data of the cell expression.

Next, details of the processing in step 51 will be described with reference to FIG. FIG. 4 shows a process of converting a cell expression into a Boolean expression that does not include a constant for one cell, and this process is performed for all cells of the combinational logic circuit extracted in step 50. ..

(60) It is checked whether a clip cell fixed at "0" or fixed at "1" is connected to the input end of the cell.

(61) If the clip cell is not connected, the logical function of the cell is expressed by a Boolean expression by referring to the product-sum logic data file 14.

(62) If the clip cell is connected, the Boolean expression in the case where all the inputs are variables is converted to the onset cover by referring to the cell product-sum logic data file 14. For example, in the exclusive OR gate 23 shown in FIG. 5, the on-cube (1,0) and the on-cube (0,1), which are a set of input values whose output is “1”
To a set of. This set is an onset cover. On-cube (1,0) corresponds to Boolean expression F * G, and on-cube (0,1) corresponds to Boolean expression * F- *
Corresponding to G, the onset cover is a Boolean F3 =
It corresponds to F * G + * F * G.

(63) If clip cells are connected, a clip cube for distinguishing constants and variables of each input is created. In the case of the exclusive OR gate 23, since the input F is a variable and the input G is a constant “0”, this clip cube can be expressed as (X, 0). Here, X represents a variable.

(64) Perform an intersection operation between the on cube and the clip cube. This calculation is performed for the on-cube element p and the corresponding clip-cube element q according to Table 1 below.

Table 1

[0031]

[Table 1]

For example, in the case of the exclusive OR gate 23, the operation result of the on-cube (1,0) and the clip-cube (X, 0) shows that the intersection of the element "1" and the element X is "1", element "." Since the intersection of 0'and element '0' is '0', cube (1,
0). Similarly, the operation results of the on-cube (0,1) and the clip-cube (X, 0) show that the intersection of the element “0” and the element X is “0”, and the intersection of the element “1” and the element “0”. Is C, cube (0, C) is obtained.

C represents a conflict, and if even one bit of C is present in the cube of the operation result, the on-cube corresponding to it is considered to be empty and is excluded from the following cow factor operation. In the above example, OnCube (0,1) is considered empty.

(65) The result of the intersection calculation,
It is determined whether all the on-cubes that make up the onset cover are empty.

(66) When all the on-cubes are empty, the cell of interest is set as a 0 clip cell whose output is fixed at "0", and the processing is terminated. This data is used in the Bouryan conversion process of the subsequent cell.

(67) If there is a non-empty on-cube, the cow factor calculation of the on-cube and the clip cube is performed. This calculation is performed for the on-cube element p and the corresponding clip-cube element q according to Table 2 below.

Table 2

[0038]

[Table 2]

For example, in the case of the exclusive OR gate 23, the calculation results of the non-empty on-cube (1,0) and clip-cube (X, 0) are as follows. Since the Cough factor of the element “0” and the element “0” is X, the cube is (1, X).

NE in Table 2 indicates that there is no such factor operation due to the exclusion of empty on-cubes.

(68) It is determined whether all the elements in the cube resulting from the intersection calculation are X.

(69) When all the elements are X, the cell of interest is set as one clip cell whose output is fixed at "1", and the processing is terminated. This data is used in the Bouryan conversion process of the subsequent cell.

(70) Convert the cube resulting from the Kow factor calculation into a Boolean expression. This transformation maps the cube element '1' to the non-inverted variable, the cube element '0' to the inverted variable, and the cube element X to the don't care '1'. To do. When the cell inputs are a and b and the cell output is f, the relationship between the cube of the cofactor operation result and the Boolean expression is as follows when the logical NOT is represented by * and the logical product is represented by.

(1,1): f = a.b (1,0): f = a. * B (0,1): f = * a.b (0,0): f = * a. * b (1, X): f = a (0, X): f = * a (X, 1): f = b (X, 0): f = * b The above processing was extracted in the above step 50. By performing this for all the cells of the combinational logic circuit, the logic circuit data of the cell expression can be converted into a Boolean expression that does not include a constant. This conversion allows the logic optimization in step 52 of FIG. 3 to be performed more easily and quickly.

In the above description, a 2-input cell is taken as an example, but it is obvious that the same processing as above may be performed for a 3-input cell or more.

The present invention includes various modifications other than the above.

For example, the cell product-sum logic data file 1
If 4 is a data file in which the function of each cell in the cell library is represented by an onset cover, then step 6 above is performed.
The process of 2 becomes unnecessary. If the on-cube whose element of the result of the cow factor calculation is NE is excluded as an empty on-cube, the processing of the above step 64 becomes unnecessary. In this case, step 67 is replaced with step 63
Place it next to.

[0048]

As described above, according to the cell expression / simple Boolean expression conversion method and device of the present invention, the logic circuit data of the cell expression can be efficiently and easily converted into a Boolean expression that does not include a constant. It has an excellent effect of being able to perform, and contributes to easy and speedy logic processing such as logic optimization for a complicated ASIC logic circuit.

According to the first aspect of the present invention, when the clip cell is not connected to the input end of the cell, the logical function of the cell can be easily and quickly referred to by referring to the cell product-sum logic data storage means. It can be expressed by a formula, while the number of clip cells is usually relatively small, so that the processing time can be shortened.

According to the second aspect of the present invention, there is an effect that the onset cover converting means becomes unnecessary.

[Brief description of drawings]

FIG. 1 is a block diagram showing the principle configuration of a cell expression / simple Boolean conversion device according to the present invention.

FIG. 2 is a hardware configuration diagram of a cell expression logic circuit optimization device.

FIG. 3 is a flowchart showing a general procedure for optimizing a cell expression logic circuit.

FIG. 4 is a flowchart showing details of the process of step 51 of FIG. 3 for one cell.

FIG. 5 is an example combinational logic circuit diagram including clip cells.

[Explanation of symbols]

 20, 24 AND gate 21 Inverter 22 OR gate 23 Exclusive OR gate 30 1 clip cell 31 0 clip cell

Claims (4)

[Claims] 1. A cell representation logic circuit data storage means (2) in which the structure of a combination logic circuit (1) is stored by being expressed by data including a cell name and a connection relation between cell terminals, and the combination logic circuit. A cell sum-of-products type logic data storage means (3) in which data representing the logical function of each of the cells forming the sum-of-products form is stored, and for each cell constituting the combinational logic circuit If 0'fixed or '1' fixed clip cells are connected, a clip cube creating means (4) for creating a clip cube for distinguishing a constant and a variable of each input of the cell and the combinational logic circuit are configured. For each cell, an operation is performed between the on-cube, which is a set of input values whose output is “1”, and the clip cube, and based on the operation result, the logical function of the cell is a Boolean expression that does not include a constant. Represents And Rian type converting means (5), the cell expression / simple Boolean type conversion device characterized by having a. 2. The cell product-sum logic data storage means (3) stores data representing the logical function of each cell forming the combinational logic circuit (1) in a product-sum Boolean expression. , Each term of the product-sum Boolean expression is represented by an on-cube that is a set of input values whose output is '1', and the product-sum Boolean expression is converted to an onset cover that is a set of the on-cubes The cell expression / simple Boolean conversion device according to claim 1, further comprising an onset cover conversion means. 3. The cell sum-of-products type logical data storage means (3) stores data representing a logical function of each cell constituting the combinational logic circuit (1) by an onset cover. 2. The cell expression / simple Boolean conversion device according to claim 1, wherein the onset cover is composed of a set of oncubes which are a set of input values whose output of the cell is "1". 4. A cell expression / simple Boolean conversion method for converting a combinational logic circuit represented by a cell and its connection relation between terminals into a cell-independent Boolean network, wherein the input / output logic of the cell is a product-sum form. Expressed in the Boolean formula, if a clip cell fixed to "0" is connected to the input end of the cell, set a constant 0 to the input end of the cell and set "1" fixed to the input end of the cell. If the clip cell is connected,
A constant 1 is set at the cell input end, and in the product-sum Boolean expression of the cell, a deletion operation of the variable at the input end where the constant is set is performed on the product-sum logical expression to obtain the product-sum form. A cell expression / simple Boolean expression conversion method characterized by converting a Boolean expression into a Boolean expression irrelevant to a variable at an input end in which the constant is set.