JPH0525410B2 - - Google Patents

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Publication number
JPH0525410B2
JPH0525410B2 JP21838485A JP21838485A JPH0525410B2 JP H0525410 B2 JPH0525410 B2 JP H0525410B2 JP 21838485 A JP21838485 A JP 21838485A JP 21838485 A JP21838485 A JP 21838485A JP H0525410 B2 JPH0525410 B2 JP H0525410B2
Authority
JP
Japan
Prior art keywords
signal
phase
interference
interference wave
wave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP21838485A
Other languages
Japanese (ja)
Other versions
JPS6277719A (en
Inventor
Shigeru Takahara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP21838485A priority Critical patent/JPS6277719A/en
Publication of JPS6277719A publication Critical patent/JPS6277719A/en
Publication of JPH0525410B2 publication Critical patent/JPH0525410B2/ja
Granted legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は干渉波除去装置に関し、特に他ルート
からのFM干渉波が存在するマイクロ波デイジタ
ル伝送システムに用いられる干渉波除去装置に関
する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an interference wave removal device, and more particularly to an interference wave removal device used in a microwave digital transmission system in which FM interference waves from other routes exist.

〔従来の技術〕[Conventional technology]

マイクロ波デイジタル伝送システムが同一周波
数帯のマイクロ波FM伝送システムから干渉を受
ける場合、マイクロ波デイジタル伝送システムに
干渉波除去装置を付加してFM干渉波の影響を除
く必要がある。
If a microwave digital transmission system receives interference from a microwave FM transmission system in the same frequency band, it is necessary to add an interference wave removal device to the microwave digital transmission system to remove the influence of the FM interference waves.

かかる干渉波除去装置の従来例の一つに特開昭
58−131853号公報に記載されているものがある。
この従来例は、干渉波を含む入力信号から狭帯域
波回路により干渉波信号を抽出し、抽出した干
渉波信号の振幅および位相を制御信号によつて制
御して相殺信号を作り、入力信号から相殺信号を
減算して干渉波の除去された出力信号を得る。制
御信号は、抽出した干渉波信号および出力信号を
直交乗算することにより得られる。すなわち、相
殺信号に振幅誤差または位相誤差があれば出力信
号に残留干渉波が存在するので、直交乗算の二出
力の一方に振幅誤差信号が、他方に位相誤差信号
が発生し、これら誤差信号が制御信号となる。
One of the conventional examples of such an interference wave removal device is the Japanese Patent Application Laid-open No.
Some of these are described in Publication No. 58-131853.
In this conventional example, an interference wave signal is extracted from an input signal containing an interference wave using a narrowband wave circuit, and the amplitude and phase of the extracted interference wave signal are controlled by a control signal to create a cancellation signal. The canceling signal is subtracted to obtain an output signal from which the interference wave has been removed. The control signal is obtained by orthogonally multiplying the extracted interference wave signal and the output signal. In other words, if there is an amplitude error or a phase error in the cancellation signal, there will be a residual interference wave in the output signal, so an amplitude error signal will be generated in one of the two outputs of orthogonal multiplication, and a phase error signal will be generated in the other, and these error signals will be It becomes a control signal.

狭帯域波回路の実現手段として、干渉波に位
相同期する位相同期ループが知られている。ルー
プ中の低域波器により波回路としての帯域幅
を決定できるので、位相同期ループは良好な狭帯
域波回路として動作する。
A phase-locked loop that is phase-locked to an interference wave is known as a means for realizing a narrowband wave circuit. The phase-locked loop operates as a good narrowband wave circuit because the band width of the wave circuit can be determined by the low frequency filter in the loop.

しかし、かかる狭帯域波回路はもしもループ
の位相同期が外れると干渉波と無関係な位相およ
び周波数の出力を発生し、この出力は入力信号中
の干渉波を相殺する相殺信号を作るどころか、か
えつて新しい妨害波になり入力信号に注入される
ことになる。
However, such narrowband wave circuits generate an output whose phase and frequency are unrelated to the interfering wave if the loop is out of phase lock, and this output does not create a canceling signal that cancels out the interfering wave in the input signal. This becomes a new interference wave and is injected into the input signal.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

以上説明したように従来の干渉波除去装置は、
狭帯域波回路の動作が正常でないとき入力信号
に妨害波を注入し、干渉波を抑圧するどころか、
かえつて回線の品質を劣化させてしまうという欠
点がある。
As explained above, conventional interference wave removal devices are
When the operation of the narrowband wave circuit is not normal, interference waves are injected into the input signal, and instead of suppressing the interference waves,
The drawback is that it actually degrades the quality of the line.

本発明の目的は、上記欠点を解決して狭帯域
波回路の動作が正常でないときも回線の品質を劣
化させない干渉波除去装置を提供することにあ
る。
SUMMARY OF THE INVENTION It is an object of the present invention to provide an interference wave removal device that solves the above-mentioned drawbacks and does not deteriorate line quality even when the operation of a narrowband wave circuit is not normal.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の干渉波除去装置は、干渉波を含む入力
信号から干渉波信号を抽出する狭帯域波手段
と、前記干渉波信号の振幅および位相を制御信号
によつて制御する振幅位相制御手段と、前記入力
信号から前記振幅位相制御手段の出力を減算する
減算手段と、前記入力信号または前記干渉波信号
のいずれか一方と前記減算手段の出力とを直交乗
算して前記制御信号を得る制御信号発生手段とを
備える干渉波除去装置において、前記狭帯域波
手段の動作が正常でないとき前記振幅位相制御手
段の出力を禁止する手段を備えて構成される。
The interference wave removal device of the present invention includes narrowband wave means for extracting an interference wave signal from an input signal including an interference wave, and an amplitude phase control means for controlling the amplitude and phase of the interference wave signal by a control signal. subtraction means for subtracting the output of the amplitude and phase control means from the input signal; and control signal generation for obtaining the control signal by orthogonally multiplying either the input signal or the interference wave signal and the output of the subtraction means. The interference wave removing device comprises means for inhibiting the output of the amplitude and phase control means when the operation of the narrowband wave means is not normal.

〔実施例〕〔Example〕

以下施実例を示す図面を参照して本発明につい
て詳細に説明する。
The present invention will be described in detail below with reference to the drawings showing embodiments.

第1図は、本発明の干渉波除去装置の一実施例
を示すブロツク図である。
FIG. 1 is a block diagram showing an embodiment of an interference wave removal device of the present invention.

第1図に示す実施例は、干渉波を含む入力信号
101を入力し抽出干渉信号102,103を出
力する干渉波抽出回路1と、干渉波抽出回路1に
接続され同期外れ信号104を出力する同期外れ
検出回路2と、抽出干渉信号102・振幅誤差信
号107および位相誤差信号108を入力し相殺
信号105を出力する振幅位相制御回路3と、同
期外れ信号104が入力しないとき相殺信号10
5をそのまま通過させ、入力したとき相殺信号1
05を減衰させる減衰器4と、入力信号101か
ら減衰器4の出力を減算し出力信号106を出力
する減算器5と、抽出干渉信号103および出力
信号106を入力し振幅誤差信号107および位
相誤差信号108を出力する制御信号発生回路6
とを具備して構成されている。
The embodiment shown in FIG. 1 includes an interference wave extraction circuit 1 that inputs an input signal 101 containing interference waves and outputs extracted interference signals 102 and 103, and an interference wave extraction circuit 1 that is connected to the interference wave extraction circuit 1 and outputs an out-of-synchronization signal 104. An out-of-synchronization detection circuit 2, an amplitude phase control circuit 3 that inputs the extracted interference signal 102, amplitude error signal 107, and phase error signal 108 and outputs a cancellation signal 105, and outputs a cancellation signal 10 when the out-of-synchronization signal 104 is not input.
5 is passed through as is, and when input, the cancellation signal 1
05, a subtracter 5 that subtracts the output of the attenuator 4 from the input signal 101 and outputs the output signal 106, and receives the extracted interference signal 103 and the output signal 106 and outputs the amplitude error signal 107 and the phase error. Control signal generation circuit 6 that outputs signal 108
It is configured with the following.

干渉波抽出回路1は、入力信号101を入力し
干渉波以外の成分を抑圧する帯域波器11と、
帯域波器11,15の出力を位相比較する位相
比較器12と、位相比較器12の出力を帯域制限
する低域波器13と、低域波器13の出力に
より周波数が制御される電圧制御発振器14と、
電圧制御発振器14の出力に帯域波器11の遅
延と等価な遅延を与える帯域波器15とを備え
て構成されている。電圧制御発振器14・帯域
波器15の出力は分岐されて抽出干渉信号10
2,103となる。
The interference wave extraction circuit 1 includes a bandpass filter 11 that receives an input signal 101 and suppresses components other than interference waves;
A phase comparator 12 that compares the phases of the outputs of the bandpass converters 11 and 15, a low-pass converter 13 that limits the band of the output of the phase comparator 12, and a voltage control whose frequency is controlled by the output of the low-band converter 13. an oscillator 14;
It is configured to include a band wave generator 15 that provides a delay equivalent to the delay of the band wave generator 11 to the output of the voltage controlled oscillator 14. The outputs of the voltage controlled oscillator 14 and band wave generator 15 are branched to extract an interference signal 10.
It becomes 2,103.

同期外れ検出回路2は、干渉波抽出回路1の位
相比較器12および低域波器13を接続する接
続線に接続された掃引発振器21と、掃引発振器
21が発振したとき同期外れ信号104を出力す
るレベル検出器22とを備えて構成されている。
The out-of-synchronization detection circuit 2 outputs an out-of-synchronization signal 104 when the sweep oscillator 21 oscillates with a sweep oscillator 21 connected to a connection line connecting the phase comparator 12 and the low-frequency amplifier 13 of the interference wave extraction circuit 1. The level detector 22 is configured to include a level detector 22 that

次に第1図に示す実施例の動作について説明す
る。
Next, the operation of the embodiment shown in FIG. 1 will be explained.

まず干渉波抽出回路1の動作について説明す
る。
First, the operation of the interference wave extraction circuit 1 will be explained.

帯域波器11は、位相比較器12に入力する
干渉波のC/Nを向上させる。位相比較器12・
低域波器13・電圧制御発振器14・帯域波
器15からなる位相同期ループの作用により、抽
出干渉信号102,103の周波数は帯域波器
11の出力である干渉波の周波数に一致する。抽
出干渉信号102,103の帯域幅は低域波器
13により決定される。抽出干渉信号103の位
相は帯域波器11の出力の位相に一致してお
り、干渉波の周波数が変動すると帯域波器11
の通過位相が変動するから、この位相変動分だけ
抽出干渉信号103の位相も変動する。一方、帯
域波器11,15の通過位相はたがいに打消す
関係にあるから、干渉波の周波数が変動しても抽
出干渉信号102の位相は変動しない。なお、帯
域波器15は帯域波器11の遅延特性を打消
す機能をはたすものであるから、帯域波器15
のかわりに、遅延特性が帯域波器11のそれと
等価な遅延回路を用いることもできる。
The bandpass filter 11 improves the C/N of the interference wave input to the phase comparator 12. Phase comparator 12・
The frequency of the extracted interference signals 102 and 103 matches the frequency of the interference wave output from the bandpass generator 11 due to the action of the phase locked loop consisting of the low frequency wave generator 13, the voltage controlled oscillator 14, and the bandpass wave generator 15. The bandwidth of the extracted interference signals 102 and 103 is determined by the low frequency filter 13. The phase of the extracted interference signal 103 matches the phase of the output of the band wave generator 11, and when the frequency of the interference wave changes, the phase of the output of the band wave generator 11 changes.
Since the passing phase of the interference signal 103 changes, the phase of the extracted interference signal 103 also changes by the amount of this phase change. On the other hand, since the passing phases of the bandpass filters 11 and 15 cancel each other out, even if the frequency of the interference wave changes, the phase of the extracted interference signal 102 does not change. Note that since the band waver 15 has the function of canceling the delay characteristics of the band wave waver 11, the band wave waver 15
Instead, a delay circuit whose delay characteristics are equivalent to that of the bandpass converter 11 may be used.

次に同期外れ検出回路2の動作について説明す
る。
Next, the operation of the out-of-sync detection circuit 2 will be explained.

干渉波抽出回路1の位相同期ループを、掃引発
振器21の負荷インピーダンスの一部となるよう
に掃引発振器21に接続する。掃引発振器21か
ら位相同期ループを見込んだインピーダンスは、
位相同期ループが同期状態にあれば低インピーダ
ンス、同期外れの状態にあれば高インピーダンス
になる。掃引発振器21を、位相同期ループを見
込んだインピーダンスが高インピーダンスになつ
たとき発振し、低インピーダンスになつたとき発
振しないように調整する。この調整により、掃引
発振器21は、干渉波抽出回路1の動作が正常で
あり位相同期ループが同期状態にあれば発振せ
ず、したがつて掃引発振器21の出力レベルを検
出するレベル検出器22は同期外れ信号104を
出力しない。干渉波抽出回路1の動作が正常でな
くなり位相同期ループが同期外れの状態になる
と、掃引発振器21は発振し、レベル検出器22
は同期外れ信号104を出力する。なお、かかる
同期外れ検出回路の詳細な構成が特公昭55−
34619号公報に示されているので、必要とあらば
この公報を参照されたい。
The phase locked loop of the interference wave extraction circuit 1 is connected to the sweep oscillator 21 so as to become part of the load impedance of the sweep oscillator 21. The impedance from the sweep oscillator 21 to the phase-locked loop is:
When the phase-locked loop is in lock, it has low impedance, and when it is out of lock, it has high impedance. The sweep oscillator 21 is adjusted so that it oscillates when the impedance considering the phase-locked loop becomes high impedance, and does not oscillate when the impedance becomes low. With this adjustment, the sweep oscillator 21 will not oscillate if the interference wave extraction circuit 1 is operating normally and the phase-locked loop is in a synchronized state. Therefore, the level detector 22 that detects the output level of the sweep oscillator 21 The out-of-synchronization signal 104 is not output. When the operation of the interference wave extraction circuit 1 becomes abnormal and the phase-locked loop becomes out of synchronization, the sweep oscillator 21 oscillates, and the level detector 22
outputs an out-of-sync signal 104. The detailed configuration of such an out-of-synchronization detection circuit is
This is disclosed in Publication No. 34619, so please refer to this publication if necessary.

干渉波抽出回路1が入力信号101中の干渉波
に位相同期して正常に抽出干渉信号102,10
3を出力している場合、振幅位相制御回路3は抽
出干渉信号102の振幅および位相を制御して相
殺信号105を作り、この場合同期外れ信号10
4が入力していないので減衰器4は相殺信号10
5をそのまま出力する。減算器5は、入力信号1
01と相殺信号105とを逆位相で合成すること
により、入力信号101が含む干渉波を抑圧し、
干渉波の抑圧された出力信号106を出力する。
制御信号発生回路6は、出力信号106中に残留
する干渉波を帯域波器で抽出し、抽出した残留
干渉波と抽出干渉信号103とを直交乗算して振
幅誤差信号107および位相誤差信号108を発
生する。振幅誤差信号107および位相誤差信号
108は振幅位相制御回路3にフイードバツクさ
れる。振幅位相制御回路3・減衰器4・減算器
5・制御信号発生回路6からなるループによる干
渉波抑圧動作については、既に挙げた特開昭58−
131853号公報に詳細に説明されているので、必要
とあればこの公報を参照されたい。なお第1図に
示す実施例においては、干渉波の周波数が変動し
ても抽出干渉信号102の位相が変動せず、また
出力信号106から残留干渉波を抽出する帯域
波器によつて直交乗算の一方の入力が位相変動し
ても、この位相変動はもう一方の入力である抽出
干渉信号103の位相変動により打消されて、直
交乗算の位相関係が正しく保たれるので、干渉波
の周波数が変動しても干渉波の抑圧度が劣化しな
いという特徴がある。
The interference wave extraction circuit 1 normally extracts interference signals 102 and 10 in phase synchronization with the interference wave in the input signal 101.
3, the amplitude and phase control circuit 3 controls the amplitude and phase of the extracted interference signal 102 to create a cancellation signal 105, in which case the out-of-synchronization signal 10
4 is not input, the attenuator 4 has a cancellation signal of 10.
Output 5 as is. Subtractor 5 receives input signal 1
By combining 01 and the cancellation signal 105 with opposite phases, the interference wave included in the input signal 101 is suppressed,
An output signal 106 with suppressed interference waves is output.
The control signal generation circuit 6 extracts the interference wave remaining in the output signal 106 using a bandpass filter, and orthogonally multiplies the extracted residual interference wave and the extracted interference signal 103 to generate an amplitude error signal 107 and a phase error signal 108. Occur. The amplitude error signal 107 and the phase error signal 108 are fed back to the amplitude and phase control circuit 3. The interference wave suppression operation using a loop consisting of the amplitude phase control circuit 3, attenuator 4, subtractor 5, and control signal generation circuit 6 is described in the already mentioned Japanese Patent Application Laid-Open No.
It is explained in detail in Publication No. 131853, so please refer to this publication if necessary. In the embodiment shown in FIG. 1, even if the frequency of the interference wave changes, the phase of the extracted interference signal 102 does not change, and the bandpass filter that extracts the residual interference wave from the output signal 106 performs orthogonal multiplication. Even if the phase of one input varies, this phase variation is canceled by the phase variation of the extracted interference signal 103, which is the other input, and the phase relationship of orthogonal multiplication is maintained correctly, so the frequency of the interference wave changes. It has the characteristic that the degree of suppression of interference waves does not deteriorate even if the interference waves fluctuate.

さて、干渉波抽出回路1の位相同期ループが同
期外れの状態になつた場合、抽出干渉信号102
は周波数、位相共に入力信号101が含む干渉波
とは無関係な信号となり、振幅位相制御回路3は
もはや正常な相殺信号105を作り得ず、かえつ
て妨害波を出力するようになる。しかしこの場
合、同期外れ信号104が発生し、減衰器4は振
幅位相制御回路3の出力に大きな減衰を与えるこ
とによつて妨害波が減算器5へ入力するのを阻止
する。このようにして第1図に示す実施例は、干
渉波抽出回路1の動作が正常でない場合、入力信
号101に妨害波が注入されるのを防止する。
Now, when the phase-locked loop of the interference wave extraction circuit 1 becomes out of synchronization, the extracted interference signal 102
becomes a signal that is unrelated to the interference wave included in the input signal 101 in both frequency and phase, and the amplitude and phase control circuit 3 can no longer generate a normal cancellation signal 105, but instead outputs an interference wave. However, in this case, an out-of-synchronization signal 104 is generated, and the attenuator 4 provides large attenuation to the output of the amplitude and phase control circuit 3 to prevent the interference wave from inputting to the subtracter 5. In this way, the embodiment shown in FIG. 1 prevents interference waves from being injected into the input signal 101 when the operation of the interference wave extraction circuit 1 is not normal.

減衰器4は、同期外れ信号104が入力したと
き振幅位相制御回路3の出力が減算器5に入力す
るのを禁止する機能があればよく、したがつて減
衰器4のかわりに、同期外れ信号104によつて
制御されるスイツチを用いてもよく、また振幅位
相制御回路3が備える振幅制御機構を同期外れ信
号104で直接制御するようにもできる。
The attenuator 4 only needs to have a function of prohibiting the output of the amplitude phase control circuit 3 from being input to the subtracter 5 when the out-of-synchronization signal 104 is input. 104 may be used, or the amplitude control mechanism included in the amplitude and phase control circuit 3 may be directly controlled by the out-of-synchronization signal 104.

制御信号発生回路6の一方の入力に、干渉波抽
出回路1の出力でなく入力信号101そのものを
用いることもできる。
It is also possible to use the input signal 101 itself instead of the output of the interference wave extraction circuit 1 as one input of the control signal generation circuit 6.

なお、干渉波の種別については、FM干渉波の
みならず、キヤリア成分が支配的であるすべての
干渉波に本発明を適用できる。
Regarding the type of interference waves, the present invention is applicable not only to FM interference waves but also to all interference waves in which carrier components are dominant.

〔発明の効果〕〔Effect of the invention〕

以上詳細に説明したように、本発明の干渉波除
去装置は狭帯域波回路の動作が正常でないとき
入力信号に妨害波を注入するということがないの
で、狭帯域波回路の動作が正常でないときも回
線の品質を劣化させることはないという効果があ
る。
As explained in detail above, the interference wave removal device of the present invention does not inject interference waves into the input signal when the operation of the narrowband wave circuit is not normal. This also has the effect of not degrading the quality of the line.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の干渉波除去装置の一実施例
を示すブロツク図である。 1……干渉波抽出回路、2……同期外れ検出回
路、3……振幅位相制御回路、4……減衰器、5
……減算器、6……制御信号発生回路。
FIG. 1 is a block diagram showing an embodiment of an interference wave removal device of the present invention. DESCRIPTION OF SYMBOLS 1... Interference wave extraction circuit, 2... Out-of-synchronization detection circuit, 3... Amplitude phase control circuit, 4... Attenuator, 5
...Subtractor, 6...Control signal generation circuit.

Claims (1)

【特許請求の範囲】 1 干渉波を含む入力信号から干渉波信号を抽出
する狭帯域波手段と、前記干渉波信号の振幅お
よび位相を制御信号によつて制御する振幅位相制
御手段と、前記入力信号から前記振幅位相制御手
段の出力を減算する減算手段と、前記入力信号ま
たは前記干渉波信号のいずれか一方と前記減算手
段の出力とを直交乗算して前記制御信号を得る制
御信号発生手段とを備える干渉波除去装置におい
て、 前記狭帯域波手段の動作が正常でないとき前
記振幅位相制御手段の出力を禁止する手段を備え
ることを特徴とする干渉波除去装置。
[Scope of Claims] 1. Narrowband wave means for extracting an interference wave signal from an input signal including an interference wave; amplitude and phase control means for controlling the amplitude and phase of the interference wave signal by a control signal; subtracting means for subtracting the output of the amplitude phase control means from the signal; and control signal generating means for obtaining the control signal by orthogonally multiplying either the input signal or the interference wave signal and the output of the subtracting means. An interference wave removal device comprising: means for inhibiting the output of the amplitude phase control means when the operation of the narrowband wave means is not normal.
JP21838485A 1985-09-30 1985-09-30 Interference wave eliminating device Granted JPS6277719A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21838485A JPS6277719A (en) 1985-09-30 1985-09-30 Interference wave eliminating device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21838485A JPS6277719A (en) 1985-09-30 1985-09-30 Interference wave eliminating device

Publications (2)

Publication Number Publication Date
JPS6277719A JPS6277719A (en) 1987-04-09
JPH0525410B2 true JPH0525410B2 (en) 1993-04-12

Family

ID=16719056

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21838485A Granted JPS6277719A (en) 1985-09-30 1985-09-30 Interference wave eliminating device

Country Status (1)

Country Link
JP (1) JPS6277719A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0773225B2 (en) * 1992-03-25 1995-08-02 石川工業高等専門学校長 Anti-fading medium wave receiver
WO2012132216A1 (en) * 2011-03-31 2012-10-04 ルネサスエレクトロニクス株式会社 Signal processing circuit and signal processing method

Also Published As

Publication number Publication date
JPS6277719A (en) 1987-04-09

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