JPH05252217A - Delay detecting system - Google Patents

Abstract

PURPOSE:To provide a delay detection system in which a code error rate is not deteriorated even when a reception frequency is changed in the delay detection system. CONSTITUTION:The delay detection system in which a reception signal is branched, the one branched signal is left as it is and the other passes through a delay circuit, the signal is demodulated based on phase comparison between both branched signals is provided with a phase correction section 4 added to the delay circuit and with an error detection section 5 integrating an error signal resulting from eliminating the modulation component from the demodulation output, and the phase correction section 4 controls so that the level of the demodulation output is constant based on the output of the error detection section 5. The reception signal is the phase modulation signal preferably. Furthermore, the reception signal is a signal on a phase plane resulting from applying quasi-synchronization quadrature detection to the quadrature modulation wave signal and applying polar coordinate transformation to the result.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a differential detection system, and more specifically, it divides a received signal, one of them is left as it is, and the other is passed through a delay circuit to perform demodulation based on a phase comparison between the two signals. The present invention relates to a differential detection method. 2. Description of the Related Art In satellite communication and mobile communication, a method of digitizing a voice signal and modulating the radio frequency for transmission is becoming popular in satellite communication and mobile communication. This modulation method includes BPSK, QPSK, π / 4 shift QPSK, QA
M, etc., and the demodulation methods thereof are roughly classified into a synchronous detection method and a differential detection method.

In the synchronous detection system, a reference carrier wave having no phase fluctuation is reproduced from the received modulated wave, and demodulation is performed by comparing the phases of the reference wave and the received modulated wave. According to the synchronous detection method, if the same C / N can be obtained, the code error rate of demodulation can be made smaller than that of the differential detection method.
However, in mobile communication in particular, it is difficult to reproduce the reference carrier because severe fading occurs as the mobile moves. For this reason, in mobile communication, a differential detection method that does not require reproduction of a reference carrier is generally used.

[0003]

2. Description of the Related Art FIG. 5 is a diagram for explaining a conventional differential detection system. In the figure, 1 is a power divider, 2 is a delay element having a delay time .tau. Of one time slot, and 3 is a phase comparator. In FIG. 5A, the power divider 1 splits the received IF signal of the BPSK modulated wave into two, one of which is left as it is and the other of which is passed through the delay element 2 to input each to the phase comparator 3. The phase comparator 3 outputs the demodulated baseband signal proportional to the phase difference by comparing the phases of the reception signal φ of the current time slot and the reception signal φ ₋₁ of the previous time slot.

In FIG. 5B, the delay time τ of such a delay element 2 is selected to be an integral multiple of the reception IF signal period (1 / f ₀ ). Therefore, when there is no fluctuation in the frequency f ₀ of the received IF signal, the received signals φ and φ ₋₁ with a phase difference of 0 or π are obtained at the respective inputs of the phase comparator 3 depending on the modulation. However, in an actual device, there are variations in the transmission frequency, the frequency of the reception local oscillator, etc., and the reception I
The frequency f _{0 of the} F signal also changes. However, if the delay time τ is fixed as in the conventional case, the relationship of an integral multiple of the reception IF signal period can no longer be maintained, and the output of the delay element 2 has a phase difference of 0 or π which is the original modulation component. The phase error Δθ = τ × Δω due to the angular frequency variation Δω is superimposed.
For this reason, there is a problem that the demodulation level of the demodulated baseband signal fluctuates, and the code points are often erroneously identified, resulting in deterioration of the code error rate.

[0005]

As described above, the conventional differential detection system has a problem that the code error rate deteriorates when the reception frequency changes. An object of the present invention is to provide a differential detection method in which the code error rate does not deteriorate even if the reception frequency changes.

[0006]

The above problems can be solved by the structure shown in FIG. That is, in the differential detection method of the present invention, the received signal is branched and one is left as it is, and the other is passed through the delay circuit so that the delay circuit can perform demodulation based on the phase comparison between the two signals. And an error detection unit 5 for integrating the error signal obtained by removing the modulation component from the demodulation output.
The phase correction unit 4 is controlled so that the level of the demodulation output becomes constant by the output of.

[0007]

In the differential detection system of the present invention, the received signal is branched into two, one of them is left as it is, and the other is passed through the delay circuit 2 and the phase correction section 4, so that the phase comparator 3
To enter. When there is no fluctuation in the reception frequency, the phase comparator 3 compares the phases of the reception signal φ of the current time slot and the reception signal φ ₋₁ ′ of the previous time slot,
The demodulated baseband signal S ₀ of each code point proportional to the phase difference 0 or π is output.

However, when the reception frequency fluctuates, a phase error Δθ = τ × Δω due to the angular frequency fluctuation Δω occurs between the respective inputs of the phase comparator 3, so that the demodulated baseband signal S ₀ is originally Will be deviated from the code point level of. Therefore, the error detection unit 5 extracts the phase error component from the demodulated baseband signal S ₀ by removing the code point level which is the original modulation component, and further removes the noise component by integrating this phase error component. , And outputs the negative feedback to the phase corrector 4. As a result, the phase correction unit 4
The received signal φ _-1 one time slot before is phase-shifted in the direction in which the phase error Δθ is canceled, so that the phase error Δθ between the respective inputs of the phase comparator 3 is canceled. Therefore, the phase comparator 3
Always outputs the demodulation baseband signal S ₀ of each code point proportional to the phase difference 0 or π according to the modulation, and thus provides the differential detection method in which the code error rate does not deteriorate even if the reception frequency changes. it can.

[0009] Preferably, the received signal is a phase modulated wave signal. Further, preferably, the received signal is a signal on a phase plane obtained by performing quasi-synchronous quadrature detection on the quadrature modulated wave signal and converting them into polar coordinates.

[0010]

Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Note that the same reference numerals denote the same or corresponding parts throughout the drawings. FIG. 2 is a diagram showing the configuration of the differential detection system of the first embodiment, in which 1 is a power divider, 2 is a delay element having a delay time τ of one time slot, 3 is a phase comparator, and 4 is variable. The phase shifter (phase correction unit in FIG. 1), 5 is an error detection unit, 5 ₁ is an identification circuit, 5 ₂ is an analog switch, 5 ₃ is a subtraction circuit, and 5 ₄ is an integration circuit.

FIG. 3 shows the operation of the differential detection system of the first embodiment.
In the following figures, the operation will be described with reference to FIGS. 2 and 3.
Reveal In FIG. 3, for example, binary data x to be transmitted
_K= “01101001”. On the sending side not shown
Is y_K= Y_K-1+ X_KTransmit signal sequence by sum operation of
y _K= “10110001”, and further y_K=
In the case of 1, the carrier signal is modulated to the phase π, and y_K= 0
In the case of, the BPSK modulated wave can be obtained by modulating the phase 0.
Send.

On the other hand, the received IF signal which has received this is as shown in the figure. Although the figure shows only one waveform for one time slot for the sake of simplicity of description, a plurality of waves are actually included. When there is no fluctuation in the reception frequency, the phase comparator 3 compares the phases of the reception signal φ of the current time slot and the reception signal φ ₋₁ ′ of the previous time slot,
Each code point level M ₀ or M ₁ proportional to the phase difference 0 or π
The demodulated baseband signal S ₀ is output. This differential conversion _{x K = y K -y K-} 1 receives the binary data if demodulated by x _K = "01101001" is obtained.

However, when the frequency of the reception IF signal fluctuates, the phase between the reception signal φ of the current time slot and the reception signal φ _-1 ′ of one time slot before is + Δθ or − depending on the direction of fluctuation of the reception frequency. The fluctuation of Δθ is superimposed. Further, accordingly, the level of the demodulated baseband signal S ₀ is also deviated from the original code point level M ₀ or M ₁ , and the error signal + ER or −ER is added.

Therefore, the discrimination circuit 5 ₁ of the error detection section 5 is
Determine demodulated baseband signal S ₀ by comparing the demodulated baseband signal S ₀ and a predetermined threshold value T _H is present on the side of any code point, the connection of the switch 5 ₂ to the identification code point Switch to the appropriate side. As a result, the subtraction circuit 5 ₃ removes the level M ₀ or M ₁ corresponding to the identification code point from the demodulated baseband signal S ₀ and extracts the error signal ER corresponding to the phase error. Furthermore, the integration circuit 5 ₄ removes noise components by integrating the error signal ER, to form a control signal C based on the frequency variation of the received IF signal negative feedback to the variable phase shifter 4. Thereby, the variable phase shifter 4 delays the signal φ ₋₁ of the output of the delay element 2 in order to correct the excessive wraparound of the phase when the frequency is high, and when the frequency is low, The signal φ ₋₁ output from the delay element 2 is advanced in order to correct the shortage of wraparound.

Therefore, between the inputs of the phase comparator 3, the received signals φ, φ having a phase difference of 0 or π depending on the modulation component are always provided.
₋₁ ′ is obtained, and the phase comparator 3 outputs the demodulated baseband signal S ₀ at each code point proportional to this.
FIG. 4 is a diagram showing the configuration of the differential detection system of the second embodiment. In this example, the present invention is applied to the demodulation baseband signal θ on the phase plane in which the received IF signal is quasi-coherently detected and polar coordinate converted. The differential detection method of is applied.

In the figure, 11 is a π / 2 phase shifter, and 12 is
Power distributor, 13, 14 are phase comparators, 15 and 16 are A
/ D converter (A / D), 17 has the same frequency as the received IF signal
Number oscillator, 18 is a polar coordinate converter, 2 is a memory (see FIG. 1).
Delay circuit), 3 is a subtraction circuit (phase comparator of FIG. 1), 4 is
Adder circuit (phase correction unit in FIG. 1), 5 is an error detection unit, 5 ₁
Is an identification circuit, 5₂Is a selector (SEL), 5₃Is the subtraction time
Road 5,_FourIs an integrating circuit.

Using the fixed oscillator 17 as a local source, the received IF signal is quasi-coherently detected by the phase comparators 13 and 14 in quadrature, and the obtained two series of signals I'and Q'are respectively converted into A / D converters 15 and 15. A / D conversion is performed by 16. Further, these digital I and Q signals (orthogonal coordinate signals) are polar coordinate-converted by the polar coordinate converter 18 to obtain the phase θ of the received IF signal. The conversion to polar coordinates can be performed by the calculation of θ = tan ⁻¹ Q / I. However, if such a calculation result is stored in the ROM in advance, the phase θ can be increased at high speed by addressing the digital I and Q signals. Can be read. By comparing the phase θ thus obtained with the phase θ ₋₁ ′ one time slot before, differential detection is performed in the same manner as in the first embodiment.

As an example, in the case of QPSK modulation, codes close to 0, π / 2, 2π / 2 and 3π / 2 are obtained in the demodulated output. The subtraction circuit 5 ₃ subtracts the closest code nπ / 2 of the four codes from the demodulation output according to the discrimination output n (= 0 to 3) of the identification circuit 5 ₁ . Thus the phase error ER is obtained, further the after the error ER was integrated by the integrating circuit 5 _4, which is added to the delayed output theta _-1 of the memory 2 as the correction amount theta _C of the phase error [Delta] [theta]. Therefore, between the respective inputs of the subtraction circuit 3, the phase error component Δθ corresponding to the fluctuation of the reception frequency is always canceled out, so that the subtraction circuit 3 causes the phase 0, π / 2, or 2 depending on the modulation component.
The demodulation output of 2π / 2 or 3π / 2 is stably output.

[0019]

As described above, according to the present invention, the received signal is branched and one is left as it is and the other is passed through the delay circuit to perform the delay detection for demodulating based on the phase comparison between the two signals. The system includes a phase correction unit 4 added to a delay circuit and an error detection unit 5 that integrates an error signal obtained by removing a modulation component from a demodulation output, and the output of the error detection unit 5 makes the level of the demodulation output constant. Since the phase correction unit 4 is controlled as described above, it is possible to perform the delay detection such that the code error rate does not deteriorate even if the reception frequency changes.

[Brief description of drawings]

FIG. 1 is a principle configuration diagram of the present invention.

FIG. 2 is a diagram showing a configuration of a differential detection system of the first embodiment.

FIG. 3 is a diagram for explaining the operation of the differential detection method of the first embodiment.

FIG. 4 is a diagram showing a configuration of a differential detection system according to a second embodiment.

FIG. 5 is a diagram illustrating a conventional differential detection method.

[Explanation of symbols]

 2 delay circuit 3 phase comparator 4 phase corrector 5 error detector

Claims (3)

[Claims] 1. A phase correction added to a delay circuit in a differential detection system in which a received signal is branched, one of the signals is left unchanged and the other is passed through a delay circuit to perform demodulation based on a phase comparison between the two signals. A section (4) and an error detection section (5) for integrating an error signal obtained by removing the modulation component from the demodulation output, and phase correction so that the level of the demodulation output becomes constant by the output of the error detection section (5). A differential detection system characterized by controlling a section (4). 2. The differential detection system according to claim 1, wherein the received signal is a phase modulation wave signal. 3. The differential detection system according to claim 1, wherein the received signal is a signal on a phase plane obtained by quasi-synchronous quadrature detection of a quadrature modulated wave signal and polar-converting these signals.