JPH05251972A - Automatic gain controller - Google Patents

Abstract

PURPOSE:To prevent the amplification factor of an amplifier from bring changed by mis-recognizing a noise as a regular signal. CONSTITUTION:A peak level detection circuit 2 detects a peak level of an output signal of an amplifier 1 for each period specified by a frame generating circuit 4 and the peak level is held by a sample-and-hold circuit 3. A comparator 5 compares the level with a reference level and outputs an up/down signal. When the up(down) signal is outputted consecutively for a prescribed number of times, a run/stop control circuit 8 outputs a run instruction to an AGC control counter 9 and the AGC control counter 9 revises the amplification factor of the amplifier 1 in response to an output signal of the comparator 5.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic gain controller, and more particularly to an automatic gain controller that detects a peak value of a data signal output from an amplifier and changes the amplification factor of the amplifier.

[0002]

2. Description of the Related Art In a data communication device, communication data is attenuated in a communication path, but the attenuation rate is not uniform depending on the distance between communication devices and the type of signal cable. Therefore, some communication devices have an auto gain controller (AGC) to compensate for the amount of attenuation. The auto-gain controller detects the peak voltage of the data signal attenuated in the communication path within a certain period and changes the amplification factor of the amplifier by comparing the peak value and the reference value so that the signal is always amplified to a level at which data can be identified. It is a circuit that controls the amplifier. The amplification factor controlled by the auto gain controller changes depending on the peak voltage of the data signal,
The change in the amplification factor is digital. When the peak voltage exceeds a certain value, the amplification factor is decreased by one step, and when it becomes lower than a certain value, the amplification factor is increased by one step. Changes to.

FIG. 3 is a block diagram of a conventional automatic gain controller of this type. In the figure, 1 is an amplifier that amplifies an input signal and transmits it to a data identification circuit, the amplification factor changes stepwise, 2 is a peak value detection circuit that detects the peak value of the output signal of the amplifier 1, and 3 is a peak. It is a sample and hold circuit that holds the detection value of the value detection circuit 2.

Further, 4 is a frame generation circuit which resets the peak value detection circuit 2 and generates a frame signal which defines the sampling timing of the sample and hold circuit 3, and 5 is a peak value held by the sample and hold circuit 3. A comparator for comparing with a reference value, 9a counts the output value of the comparator 5 at the timing of the frame signal, and increases the amplification factor to the amplifier 1 by the count value,
It is an AGC control counter that gives a down instruction.

Next, the operation of this conventional example will be described with reference to the timing chart of FIG. The frame generation circuit 4 outputs a frame signal at regular intervals, as shown in FIG. Here, one frame is defined between the frame signals. The received data signal is
It is input to the amplifier 1, amplified by the amplification factor of the amplifier 1 at that time, and output to the data identification circuit. The amplified data signal is also input to the peak value detection circuit 2 and used for detecting the peak value of the data signal [(b) of FIG. 4].

The sample and hold circuit 3 to which the output signal of the peak value detection circuit 2 is input holds the peak value of the data signal for one frame [(c) of FIG. 4]. During this hold operation, the peak value detection circuit 2 is reset by the frame signal and searches for the peak value of the next frame. The held peak voltage is compared with the reference voltage by the comparator 5.

The comparison result ((d) of FIG. 4) shows that the peak voltage> the reference voltage → the amplification factor is lowered (step down) depending on the relationship between the peak voltage and the reference voltage. The peak voltage <the reference voltage → the amplification factor is increased. It is input to the AGC control counter 9a as an up / down signal for controlling (step-up), and the count value is increased / decreased in synchronization with the frame signal [(e) in FIG. 4]. A
The amplification factor determined by the count value is instructed to the amplifier 1 from the GC control counter 9a, and the amplifier amplifies the data signal at the amplification factor.

FIG. 5 is a graph showing the relationship between the peak value of the data signal and the amplification factor. As shown in the figure, when the peak value is A, the amplification factor of the amplifier is adjusted to B.

[0009]

In the conventional peak value detection type auto gain controller described above, when the data signal contains noise, the original peak value is A as shown in FIG. Will be detected as A ', and as a result, an inappropriate amplification factor B'will be adjusted. Therefore, the conventional example has a problem that an error occurs during data identification.

[0010]

SUMMARY OF THE INVENTION An autogain controller according to the present invention comprises a peak value detection circuit for detecting a peak voltage of an output signal of an amplifier for amplifying a data signal, and a sample and hold circuit for sampling and holding data. When,
A comparator for comparing the peak voltage and the reference voltage, a first counter for counting a continuous period in which the output value of the comparator is a fixed value or more, and a continuous period for which the output value of the comparator is a fixed value or less. A second counter for counting, and means for changing the amplification factor of the amplifier according to the output value of the comparator when the count value of the first counter or the second counter exceeds a predetermined value. It is equipped with.

[0011]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, 1 is an amplifier that amplifies an input signal and transmits it to a data identification circuit, the amplification factor changes stepwise, 2 is a peak value detection circuit that detects the peak value of the output signal of the amplifier 1, and 3 is a peak. It is a sample and hold circuit that holds the detection value of the value detection circuit 2.

Further, 4 is a frame generation circuit which resets the peak value detection circuit 2 and generates a frame signal which defines the sampling timing of the sample and hold circuit 3, and 5 is a peak value held by the sample and hold circuit 3. A comparator for comparing with a reference value, 6 is a counter for counting continuous up signals output from the comparator 5, 7 is a counter for counting continuous down signals output by the comparator 5, and 8 is a counter for the counters 6 and 7. A run / stop control circuit that outputs a run instruction when the value exceeds a predetermined value, and 9 indicates that the count value is up according to the output value of the comparator 5 when the run instruction is issued from the run / stop control circuit 8. Or down
This is an AGC control counter that instructs the amplifier 1 to step up / down the amplification factor according to the count value.

Next, the operation of this embodiment will be described.
Similar to the conventional example, the up / down signal corresponding to the peak value of the data signal output from the amplifier 1 is transmitted to the comparator 5
Is output from. This output signal is input to the counters 6 and 7 for each frame, and the counters 6 and 7 perform the following operations, respectively.

The counter 6 counts up when a "step-up signal" is input, and a "step-down signal"
Is input, the value is reset (count value = 0). The counter 7 counts up when a "step-down signal" is input, and is reset (count value = 0) when a "step-up signal" is input.

The run / stop control circuit 8 outputs the following instructions to the AGC counter 9 according to the values of the counters 6 and 7. When the counter 6 is 4 or more or the counter 7 is 4 or more → The run instruction is output. When the counter 6 is less than 4 and the counter 7 is less than 4, → stop command is output. The run command of the run / stop control circuit 8 causes AG
The C control counter 9 performs a step change operation on the amplifier 1, and stops the step change operation (stops the counting operation) by the stop command. Counters 6, 7 and run /
FIG. 2 shows an operation example of the stop control circuit.

In the conventional example, the step change is repeated without interruption as shown in FIG. 4, but in the present embodiment, the step change is made only when the up signal or the down signal continues for a predetermined number of times. The number of times decreases. Then, the amplification factor is prevented from being erroneously changed due to noise or the like, so that the amplification factor of the amplifier can be appropriately maintained. In this embodiment, the counter r
Although the un / stop determination value is set to 4, this value can be changed as appropriate.

[0017]

As described above, according to the present invention, when the comparator for comparing the peak voltage and the reference voltage continuously outputs the up signal or the down signal, the amplification factor of the amplifier is changed in steps. Therefore, according to the present invention, the amplification factor is not changed by erroneously recognizing noise as a normal signal. Therefore, according to the present invention, it becomes possible to always maintain the amplification factor of the amplifier appropriately.
It is possible to prevent data misreading accidents.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is an operation explanatory diagram of the embodiment of FIG.

FIG. 3 is a block diagram of a conventional example.

FIG. 4 is an operation explanatory diagram of a conventional example.

FIG. 5 is a characteristic diagram for explaining an AGC operation.

[Explanation of symbols]

 1 Amplifier 2 Peak value detection circuit 3 Sample and hold circuit 4 Frame generation circuit 5 Comparator 6 and 7 counter 8 run / stop control circuit 9 and 9a AGC control counter

Claims (1)

[Claims] 1. A peak value detection circuit that detects a peak voltage of a signal output from an amplifier and is reset at regular intervals, a comparator that compares the peak voltage and a reference voltage within a constant period, and an output of the comparator. A first counter for counting a continuous period in which a value is a certain value or more; a second counter for counting a continuous period in which an output value of the comparator is a certain value or less; the first counter or the first counter; And a means for changing the amplification factor of the amplifier according to the output value of the comparator when the count value of the second counter exceeds a predetermined value.