JPH05251969A - Amplifier circuit with level detection function - Google Patents

Abstract

PURPOSE:To provide the amplifier circuit with a level detection function by implementing excellent linear amplification regardless of an input level and detecting accurately an input level. CONSTITUTION:Each amplification factor of plural stages of linear amplifier circuits 1, 2, 3 is selectable. Plural level discrimination circuits 4, 5 discriminate whether or not outputs of each of the linear amplifier circuits 1, 2 have a prescribed level or over. Plural switches 11, 13 are used to select the amplification factor of the linear amplifier circuits 2, 3 of the next stage and to decrease the amplification factor when the level discrimination circuits 4, 5 discriminate that the output of the linear amplifier circuits 1, 2 is a prescribed level or larger. A level detection circuit 7 detects a level of the input signal based on the result of discrimination of the level discrimination circuits 4, 5.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention has a wide level range of an input signal and is a level required to accurately detect the level of the input signal as used in, for example, a mobile phone or a digital cordless telephone. The present invention relates to an amplifier circuit with a detection function.

[0002]

2. Description of the Related Art As a conventional amplifier circuit with a level detecting function, for example, Motorola 90 year linear IC catalog 8
-40 to 45. This conventional amplifier circuit with a level detection function is as shown in FIG.
It is provided with a plurality of stages of amplifiers 31 to 34 and a level detection circuit 35. Specifically, as shown in FIG. 5, resistors R _{21 to} R are provided.
₄₇ , transistors Q _{11 to} Q ₃₁ , and capacitors C _{1 to} C
It had ₃ and. In other words, the signal inputted to the base of the transistor Q ₁₁ is differentially amplified by transistors Q _11, Q _12, is supplied to the base of the transistor Q _13. The signal inputted to the base of the transistor Q ₁₃ is differentially amplified by transistors Q _13, Q _14, is supplied to the base of the transistor Q _15. After that, the signals are sequentially amplified in the same manner, amplified by the limiter to such a level, and then output.

[0003]

[Pi] / 4 offset PSK such as mobile phones and digital cordless telephones.
It is known that in a system using a modulation method, if nonlinear amplification is performed before passing through the Nyquist filter, the error rate after demodulation increases. However, since the limiter amplification is performed in the above-described conventional amplification circuit with level detection function, the signal may be distorted. Therefore, when used in mobile phones and digital cordless phones,
There was a risk that the error rate after demodulation would increase.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an amplifier circuit with a level detecting function, which can perform good linear amplification regardless of the input level and can accurately detect the input level. And

[0005]

SUMMARY OF THE INVENTION According to the present invention, a plurality of stages of linear amplification circuits each of which the amplification factor can be switched and a plurality of determination circuits for judging whether or not the output of each of these linear amplification circuits is above a predetermined level are provided. Level determination circuits, a plurality of switch means for switching the amplification factor of the next stage linear amplification circuit to reduce it when the output of the linear amplification circuit is determined to be equal to or higher than a predetermined level by the level determination circuits, And a level detection circuit that detects the level of the input signal based on the determination result of each level determination circuit.

[0006]

The amplification factor of each of the plurality of stages of linear amplifier circuits can be switched. The plurality of level determination circuits determine whether the output of each linear amplification circuit is equal to or higher than a predetermined level. The plurality of switch means switches the amplification factor of the linear amplification circuit of the next stage to be small when the level determination circuit determines that the output of the linear amplification circuit is equal to or higher than a predetermined level. The level detection circuit detects the level of the input signal based on the determination result of each level determination circuit.

[0007]

Embodiments of the present invention will now be described in detail with reference to the drawings.
explain. FIG. 1 shows level detection in one embodiment of the present invention.
In the configuration diagram of the amplifier circuit with circuit, this amplifier circuit is
Amplifier circuit 1, second linear amplifier circuit 2, and third linear amplifier circuit
The amplification circuit 3, the first level determination circuit 4, and the second level
And a level detection circuit 7. First
The linear amplifier circuit 1 includes a first amplifier 8 and a resistor R ₁，
R₂And a resistor R₁One end of is connected to input terminal 9
Has been continued. Resistance R₁The other end of the input of the first amplifier 8
Edge and resistance R₂Is connected to one end of. First amplifier
The output terminal of 8 is a resistor R₂Other end of the first level determination circuit 4
Is connected to the input end of. Second linear amplifier circuit 2
Is a second amplifier 10, a first switch 11, a resistor
R₃~ R_FiveAnd a resistor R₃One end of the first increase
Output terminal of the width device 8 and resistance R₂The other end of the first level judgment
It is connected to the connection end of the path 4 with the input end. Resistance R₃of
The other end is connected to the input end of the second amplifier 10 and the resistor R._FourOne end and the
The first switch 11 is connected to one end of the switch 11.
The other end of the switch 11 has a resistance R _FiveIs connected to one end of.
The output terminal of the second amplifier 10 is a resistor R_Four, R_FiveThe other end and the
It is connected to the input terminal of the second level judgment circuit 5,
One output terminal of the level determination circuit 4 of 1 is the first switch
It is connected to 11 control signal input terminals. Third linear increase
The width circuit 3 includes a third amplifier 12 and a second switch 13
And resistance R₆~ R₈And a resistor R₆One end of
The output terminal of the second amplifier 10 and the resistor R_Four, R_FiveThe other end and the
2 is connected to the connection terminal with the input terminal of the level determination circuit 5
There is. Resistance R₆The other end of the resistor and the input end of the third amplifier 12
Anti-R₇Is connected to one end of the second switch 13 and one end of the second switch 13.
The other end of the second switch 13 has a resistor R₈At one end of
It is connected. The output terminal of the third amplifier 12 is a resistor
R₇, R₈And the other input terminal of the level detection circuit 7
Connected to the output terminal 14 and the second level
One output end of the determination circuit 5 controls the second switch 13.
It is connected to the signal input terminal. First level determination circuit 4
The other output terminal of the first input terminal 1 of the level detection circuit 7
5 of the second level determination circuit 5
The output terminal is connected to the second input terminal 16 of the level detection circuit 7.
Has been done. The level detection circuit 7 has an output terminal 18.
There is.

As shown in FIG. 2, the level detecting circuit 7 includes transistors Q ₁ , Q ₂ , Q _{4 to} Q ₉ and resistors R _{9 to} R _9.
19 and a capacitor C, the first input terminal 1
5 is connected to the base of the transistor Q ₄ via the resistor R ₁₀ . The second input terminal 16 is connected to the base of the transistor Q ₆ via the resistor R ₁₁ , and the third input terminal 17 is connected to the base of the transistor Q ₈ via the resistor R ₁₂ and the capacitor C. Grounded through. The collector of the transistor Q ₄ are being connected to the base of one end and the transistor Q ₅ of the resistor R _13, the collector of the transistor Q ₅ is connected to one end of a resistor R _14. The collector of the transistor Q ₆ is connected to the base of one end and the transistor Q ₇ of the resistor R _15, the collector of the transistor Q ₇ is connected to one end of the resistor R _16. The collector of the transistor Q ₈ is connected to one end of the resistor R ₁₇ and the base of the transistor Q ₉ . The emitters of the transistors Q ₄ , Q ₅ , Q ₆ , and Q ₇ are grounded, and the emitter of the transistor Q ₈ is grounded via the resistor R ₁₈ . The emitter of the transistor Q ₉ is grounded via the resistor R ₁₉ , and the resistors R ₁₃ , R ₁₅ , R
The other end of ₁₇ and the bases of the transistors Q ₁ and Q ₂ are connected to a bias power supply. The other end of the resistor R ₁₄ is connected to the emitter of the transistor Q ₁ , and the other end of the resistor R ₁₆ is connected to the emitter of the transistor Q ₂ . The collectors of the transistors Q ₁ , Q ₂ , Q ₉ and one end of the resistor R ₉ are connected to the output terminal 18, and the other end of the resistor R ₉ is connected to the power supply.

Next, the operation will be described. The signal input to the input terminal 9 is amplified by the first linear amplification circuit 1 and supplied to the second linear amplification circuit 2 and the first level determination circuit 4. The first level determination circuit 4 supplies a high level signal to the first switch 11 and the level detection circuit 7 when the output of the first linear amplification circuit 1 is equal to or higher than a predetermined threshold level, When the output of the linear amplifier circuit 1 is smaller than a predetermined threshold level, the first
A low level signal is supplied to the switch 11 and the level detection circuit 7.

When the output of the first level judgment circuit 4 is low level, the first switch 11 is opened and the amplification factor of the second linear amplification circuit 2 becomes R ₄ / R ₃ . For example, R ₄ =
Assuming 10R ₃ , the gain of the second linear amplification circuit 2 is 2
It becomes 0 dB. Therefore, when the output of the first linear amplification circuit 1 is smaller than the predetermined threshold level,
The output of the first linear amplifier circuit 1 is amplified by the second linear amplifier circuit 2 with a gain of 20 dB and supplied to the third linear amplifier circuit 3.

On the other hand, when the output of the first level judgment circuit 4 is high level, the first switch 11 is closed and the second switch 11 is closed.
The amplification factor of the linear amplification circuit 2 is (R ₅ ‖R ₄ ) / R ₃ . For example, when R ₅ = (10/9) R ₃ , the gain of the second linear amplification circuit 2 becomes 0 dB. Therefore, when the output of the first linear amplifier circuit 1 is equal to or higher than the predetermined threshold level, the output of the first linear amplifier circuit 1 is not amplified by the second linear amplifier circuit 2 and is output by the third linear amplifier circuit 3. Is supplied to.

That is, from the first linear amplifier circuit 1 to the second linear amplifier circuit
The signal input to the linear amplification circuit 2 is amplified by the second linear amplification circuit 2 with a gain of 20 dB or 0 dB, and is supplied to the third linear amplification circuit 3 and the second level determination circuit 5. The second level determination circuit 5 supplies a high level signal to the second switch 13 and the level detection circuit 7 when the output of the second linear amplification circuit 2 is equal to or higher than a predetermined threshold level, When the output of the linear amplifier circuit 2 is smaller than a predetermined threshold level,
A low level signal is supplied to the second switch 13 and the level detection circuit 7.

When the output of the second level judgment circuit 5 is low level, the second switch 13 is opened and the amplification factor of the third linear amplification circuit 3 becomes R ₇ / R ₆ . For example, R ₇ =
Assuming 10R ₆ , the gain of the third linear amplifier circuit 3 is 2
It becomes 0 dB. Therefore, when the output of the second linear amplifier circuit 2 is smaller than the predetermined threshold level,
The output of the second linear amplifier circuit 2 is amplified by the third linear amplifier circuit 3 with a gain of 20 dB and supplied to the output terminal 14.

On the other hand, when the output of the second linear amplifier circuit 2 is at the high level, the second switch 13 is closed and the amplification factor of the third linear amplifier circuit 3 is (R ₈ ‖R ₇ ) / Become R ₆ . For example, when R ₈ = (10/9) R ₆ , the gain of the third linear amplifier circuit 3 becomes 0 dB. Therefore, when the output of the second linear amplifier circuit 2 is equal to or higher than the predetermined threshold level, the output of the second linear amplifier circuit 2 is supplied to the output terminal 14 without being amplified by the third linear amplifier circuit 3. ..

That is, the second linear amplifier circuits 2 to 3
The signal input to the linear amplification circuit 3 of the
Amplified by circuit 3 with a gain of 20 dB or 0 dB
The output terminal 14 and the third input terminal of the level detection circuit 7.
And 17 are supplied. The level determination circuits 4 and 5
Since the threshold levels are equal to each other, the first linear increase
If the output of the width circuit 1 is above the threshold level,
Output, the output of the first linear amplifier circuit 1 is directly output terminal 1
4 and the overall amplification factor is R₂/ R ₁become. Conclusion
The relationship between the input level and the gain of the entire station and circuit is shown in Fig. 3.
Growls

On the other hand, the level detection circuit 7 uses the outputs of the level determination circuits 4 and 5 as switches of a constant current circuit, and flows a current when each output is at a low level, and supplies a current when each output is at a high level. It is designed so that it does not flow. Therefore, when the output of the first level determination circuit 4 is at the high level, the output of the second level determination circuit 5 is also at the high level, and each constant current circuit of the level detection circuit 7 does not draw a current. The terminal 18 is almost at the power supply voltage. To be exact, the voltage corresponds to the input from the third input terminal 17. When the output of the first level determination circuit 4 is low and the output of the second level determination circuit 5 is high, one of the constant current circuits is turned on, so that the output terminal 1
8 is substantially the V _CC -I _O · R _9. Further, when the outputs of the first level determination circuit 4 and the second level determination circuit 5 are low level, both constant current circuits are turned on, so that the output terminal 18 is almost V _CC −2 · _IO · R. Become ₉ . That is, the potential of the output terminal 18 of the level detection circuit 7 changes according to the input signal level to the input terminal 9.

As described above, the level determination circuits 4 and 5 determine whether or not the outputs of the linear amplifier circuits 1 and 2 are above a predetermined threshold level, and when the outputs are above the threshold level, the switches 11 and 13 are turned on. Since the gains of the linear amplification circuits 2 and 3 are controlled to be 1, the linear amplification can be performed well regardless of the input level. Further, since the level detection circuit 7 detects the level of the input signal based on the judgment results of the level judgment circuits 4 and 5, the input level can be accurately detected.

Although the linear amplifier circuit has three stages in the above embodiment, the present invention is not limited to such a configuration, and the linear amplifier circuit may have a plurality of stages. Further, in the above embodiment, the amplification factors of the linear amplifier circuits 1, 2 and 3 are made equal and the threshold levels of the level judgment circuits 4 and 5 are made equal, but the present invention is not limited to such a configuration. The amplification factors of the linear amplification circuits 1, 2, 3 and the threshold levels of the level determination circuits 4, 5 may be different from each other. In this case, the currents of the constant current circuits of the level detection circuit 7 are made different from each other accordingly, and the determination results of the level determination circuits 4 and 5 are weighted.

[0019]

As described above, according to the present invention, a plurality of stages of linear amplification circuits each of which the amplification factor can be switched, and whether the output of each linear amplification circuit is above a predetermined level or not are determined. A plurality of level determination circuits, a plurality of switch means for switching the amplification factor of the linear amplification circuit at the next stage to reduce the output when the level determination circuit determines that the output of the linear amplification circuit is equal to or higher than a predetermined level, and Since it has a level detection circuit that detects the level of the input signal based on the judgment result of the level judgment circuit, since it does not perform limiter amplification, it can perform linear amplification satisfactorily regardless of the input level and accurately Can be detected.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an amplifier circuit with a level detection circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram of a level detection circuit.

FIG. 3 is an explanatory diagram of a relationship between an input level and a gain of the entire amplifier circuit.

FIG. 4 is a configuration diagram of a conventional amplifier circuit with a level detection circuit.

FIG. 5 is a circuit diagram of a conventional amplifier circuit with a level detection circuit.

[Explanation of symbols]

 1 1st linear amplification circuit 2 2nd linear amplification circuit 3 3rd linear amplification circuit 4 1st level determination circuit 5 2nd level determination circuit 7 Level detection circuit

Claims (1)

[Claims] 1. A plurality of stages of linear amplification circuits each capable of switching an amplification factor, a plurality of level determination circuits for determining whether or not the output of each linear amplification circuit is a predetermined level or higher, and the level determination. When the output of the linear amplification circuit is determined to be equal to or higher than a predetermined level by the circuit, a plurality of switch means for switching the amplification factor of the linear amplification circuit of the next stage to be small, and the determination result of each level determination circuit An amplifier circuit with a level detecting function, which comprises: a level detecting circuit for detecting the level of an input signal based on