JPH05251869A - Multilayered printed wiring board - Google Patents
Multilayered printed wiring boardInfo
- Publication number
- JPH05251869A JPH05251869A JP4084637A JP8463792A JPH05251869A JP H05251869 A JPH05251869 A JP H05251869A JP 4084637 A JP4084637 A JP 4084637A JP 8463792 A JP8463792 A JP 8463792A JP H05251869 A JPH05251869 A JP H05251869A
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- flat
- multilayer printed
- copper foil
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は内層銅箔と絶縁基板とを
多層に積層してなる多層印刷配線板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board in which an inner layer copper foil and an insulating substrate are laminated in multiple layers.
【0002】[0002]
【従来の技術】近年、電気部品の表面実装化が進み、そ
れらを実装する多層印刷配線板において、電気部品実装
用のパッドを有する多層印刷配線板が増加している。従
来、この種の多層印刷配線板は電源層および接地層とし
て全面銅箔状の層により内層が構成されている。2. Description of the Related Art In recent years, surface mounting of electric parts has progressed, and in multilayer printed wiring boards for mounting them, the number of multilayer printed wiring boards having pads for mounting electric parts is increasing. Conventionally, in this type of multilayer printed wiring board, the inner layers are formed by copper foil-like layers over the entire surface as power supply layers and ground layers.
【0003】[0003]
【発明が解決しようとする課題】図3は多層印刷配線板
の内層銅箔の平面図である。内層銅箔14の電源層およ
び接地層には、多層印刷配線板11に設けられたスルー
ホールに対して、その接続の必要性に応じてクリアラン
ス13および導通ランド8を設けていた。これにより、
電源層および接地層に対する接続および非接続を図って
いる。なお、図3では理解を容易にするために銅箔部に
斜線を施してある。FIG. 3 is a plan view of an inner copper foil of a multilayer printed wiring board. In the power supply layer and the ground layer of the inner copper foil 14, the clearances 13 and the conductive lands 8 are provided for the through holes provided in the multilayer printed wiring board 11 depending on the necessity of connection. This allows
Connection and disconnection are made to the power supply layer and the ground layer. In FIG. 3, the copper foil portion is shaded for easy understanding.
【0004】図4(a)は従来の多層印刷配線板の一例
を示す平面図、(b)はBーB断面図である。しかしな
がら、従来の多層印刷配線板は図4(a)の破線の斜線
で示すように表面実装用のパッド2に対してはスルーホ
ールと異なり、内層に対する影響は発生しないため図4
(b)に示すように全面が銅箔状の内層銅箔14となっ
ていた。FIG. 4A is a plan view showing an example of a conventional multilayer printed wiring board, and FIG. 4B is a sectional view taken along line BB. However, in the conventional multilayer printed wiring board, unlike the through hole for the pad 2 for surface mounting, as shown by the dashed diagonal line in FIG.
As shown in (b), the entire surface was the copper foil-shaped inner layer copper foil 14.
【0005】図5はフラットICを実装した図4の多層
印刷配線板の平面図である。図5において、破線の斜線
部分は図4の内層銅箔14を示している。多層印刷配線
板1の表面パッド部に実装されたフラットIC5のリー
ド6の隣接するリード間には半田ブリッジ7が発生しや
すいという問題があった。本発明の目的は多層印刷配線
板を光に透すなどしてパッド部の欠損およびフラットI
Cのリード間の半田ブリッジを容易に発見できるように
した多層印刷配線板を提供することにある。FIG. 5 is a plan view of the multilayer printed wiring board of FIG. 4 on which the flat IC is mounted. 5, the hatched portion of the broken line shows the inner layer copper foil 14 of FIG. There is a problem that a solder bridge 7 is easily generated between the adjacent leads of the leads 6 of the flat IC 5 mounted on the surface pad portion of the multilayer printed wiring board 1. An object of the present invention is to make a multi-layer printed wiring board transparent to light so that a pad portion may be damaged and flat I
It is an object of the present invention to provide a multilayer printed wiring board in which a solder bridge between leads of C can be easily found.
【0006】[0006]
【課題を解決するための手段】前記目的を達成するため
に本発明による多層印刷配線板はフラットIC部品実装
用のパッドを有する多層印刷配線板において、前記パッ
ド位置に対応する内層銅箔部に多角形状のクリアランス
を設けて構成されている。In order to achieve the above object, a multilayer printed wiring board according to the present invention is a multilayer printed wiring board having pads for mounting flat IC components, wherein an inner copper foil portion corresponding to the pad position is provided. It is configured by providing a polygonal clearance.
【0007】[0007]
【実施例】以下、図面を参照して本発明をさらに詳しく
説明する。図1(a)および(b)は本発明による多層
印刷配線板の実施例を示す平面図およびA−A断面図で
ある。多層印刷配線板1aの表面に設けたパッド2の形
成領域に対応する内層銅箔4に多角形のクリアランス3
を設けている。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in more detail below with reference to the drawings. 1 (a) and 1 (b) are a plan view and an AA sectional view showing an embodiment of a multilayer printed wiring board according to the present invention. The polygonal clearance 3 is formed in the inner layer copper foil 4 corresponding to the formation area of the pad 2 provided on the surface of the multilayer printed wiring board 1a.
Is provided.
【0008】図2は図1の多層印刷配線板にフラットI
Cを実装したときの平面図である。図2に示すように多
層印刷配線板1にフラットIC5を実装したときは、多
層印刷配線板のパッド2に半田付けされたフラットIC
5のリード6のリード間に半田ブリッジ7が発生した場
合、図2に破線の斜線を示す内層銅箔4にクリアランス
3が設けてあるので、光を透すことにより半田ブリッジ
7を発見し易すくなる。FIG. 2 is a plan view of the flat printed circuit board of FIG.
It is a top view when C is mounted. When the flat IC 5 is mounted on the multilayer printed wiring board 1 as shown in FIG. 2, the flat IC soldered to the pad 2 of the multilayer printed wiring board
When the solder bridge 7 is generated between the leads 6 of the No. 5 lead, the clearance 3 is provided in the inner layer copper foil 4 shown by the broken line in FIG. I'm getting better.
【0009】[0009]
【発明の効果】以上、説明したように本発明はフラット
IC実装用のパッドを有する多層印刷配線板において、
パッド位置に対応する内層銅箔にクリアランスを設ける
ことにより、印刷配線板を光に透す等してパッド部の欠
損およびフラットICのリード間の半田ブリッジを容易
に発見できる。また、クリアランスを多角形で構成する
ことにより、フラットIC直下で接続する導通ランドへ
の電気供給容量を確保することができる。As described above, the present invention provides a multilayer printed wiring board having pads for mounting flat ICs,
By providing a clearance in the inner copper foil corresponding to the pad position, it is possible to easily find a defect in the pad portion and a solder bridge between the leads of the flat IC by transmitting the printed wiring board to light. Further, by forming the clearance in a polygonal shape, it is possible to secure the electric supply capacity to the conductive land connected directly under the flat IC.
【図1】(a)は本発明による多層印刷配線板の実施例
を示す平面図、(b)はA−A断面図である。1A is a plan view showing an embodiment of a multilayer printed wiring board according to the present invention, and FIG. 1B is a sectional view taken along line AA.
【図2】フラットICを実装したときの図1の多層印刷
配線板の平面図である。FIG. 2 is a plan view of the multilayer printed wiring board of FIG. 1 when a flat IC is mounted.
【図3】多層印刷配線板の内層銅箔の平面図である。FIG. 3 is a plan view of an inner layer copper foil of a multilayer printed wiring board.
【図4】(a)は従来の多層印刷配線板の一例を示す平
面図、(b)はBーB断面図である。FIG. 4A is a plan view showing an example of a conventional multilayer printed wiring board, and FIG. 4B is a sectional view taken along line BB.
【図5】フラットICを実装したときの図4の印刷配線
板の平面図である。5 is a plan view of the printed wiring board of FIG. 4 when a flat IC is mounted.
1,11…多層印刷配線板 2…パッド 3,13…クリアランス 4,14…内層銅箔 5…フラットIC 6…リード 7…半田ブリッジ 8…導通ランド 1, 11 ... Multilayer printed wiring board 2 ... Pads 3, 13 ... Clearance 4, 14 ... Inner layer copper foil 5 ... Flat IC 6 ... Lead 7 ... Solder bridge 8 ... Conductive land
Claims (1)
る多層印刷配線板において、 前記パッド位置に対応する内層銅箔部に多角形状のクリ
アランスを設けたことを特徴とする多層印刷配線板。1. A multilayer printed wiring board having a pad for mounting a flat IC component, wherein an inner copper foil portion corresponding to the pad position is provided with a polygonal clearance.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4084637A JPH05251869A (en) | 1992-03-06 | 1992-03-06 | Multilayered printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4084637A JPH05251869A (en) | 1992-03-06 | 1992-03-06 | Multilayered printed wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05251869A true JPH05251869A (en) | 1993-09-28 |
Family
ID=13836209
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4084637A Pending JPH05251869A (en) | 1992-03-06 | 1992-03-06 | Multilayered printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH05251869A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103747610A (en) * | 2013-12-24 | 2014-04-23 | 苏州欢颜电气有限公司 | PCB thermal pad |
-
1992
- 1992-03-06 JP JP4084637A patent/JPH05251869A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103747610A (en) * | 2013-12-24 | 2014-04-23 | 苏州欢颜电气有限公司 | PCB thermal pad |
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