JPH05250478A - Graphic display device - Google Patents

Abstract

PURPOSE:To improve the operational efficiency of a plotting pipeline section and to improve the plotting performance. CONSTITUTION:In plotting, MPU 3 accesses the only a plotting pipeline section 5 and not access a frame buffer data control section (FBDC) 6. The plotting pipeline section 5 is connected to the FBDC 6 via a bus 10. A plotting pipeline section 5 addresses the FBDC 6 to give attribute information to the FBDC 6 based on the result of the pipeline processing, and the FBDC 6 outputs data written in a frame buffer (FB) 7 according to this. Therefore, it is not necessary to provide synchronization of the plotting pipeline section 5 and the FBDC 6, the operational efficiency of the plotting pipeline section 5 is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a frame buffer (F
B) A graphic display device for displaying a graphic on a screen by writing data on the screen.

[0002]

2. Description of the Related Art Conventionally, various graphic display devices have been known. FIG. 2 shows the configuration of a graphic display device according to a conventional example.

The graphic display device 1 shown in this figure includes a host interface 2, a processor (MPU) 3, a segment buffer (SB) 4, a drawing pipeline unit 5, a frame buffer data control unit (FBDC) 6, an FB 7 and a CRT 8. It consists of The host interface 2 is an interface for communication with a host computer (not shown). The MPU 3 communicates with the host computer via this interface 2. Further, the MPU 3 reads the graphic information and the attribute information from the SB 4 when displaying the graphic on the screen of the CRT 8.

The SB 4 is a memory in which graphic information such as segment data created by a user is stored together with attribute information. The graphic information and the attribute information read from the SB 4 are output to the drawing pipeline unit 5 or the FBDC 6, respectively. A bus 9 connects between them.

First, the drawing pipeline unit 5 includes a coordinate conversion processing unit (VMAC) 5a and a clipping processing unit (XYC).
L) 5b and a DDA processing unit (XYAC) 5c. The VMAC 5a stores graphic information registered on the SB 4 in a logical coordinate system called a world coordinate system,
Convert to the physical coordinate system corresponding to the address of FB7. X
The YCL 5b performs clipping processing (processing to remove the protruding portion) on the data coordinate-converted by the VMAC 5a, and the XYAC 5c performs digital differential analysis on the processing result of the XYCL 5b to generate a vector. These processes are executed in a pipeline manner, and the coordinate values of the dots forming the vector are used as the write address of the FB7.

The FBDC 6 is a member that determines the data to be written in the FB 7 based on the attribute information added to the graphic information. That is, the attribute information includes attributes indicating the color of the line forming the figure, the type of the line, and the filling pattern, and the FBDC 6 determines the F based on these attribute information.
Determine the data to write to B7.

The FB 7 is a memory for storing data in a coordinate system corresponding to the screen of the CRT 8. When the data output from the FBDC 6 is written to the address designated by the pipeline unit 5 on the FB 7, the video signal generation circuit (not shown) generates a video signal in response to this,
A graphic is displayed on the CRT 8 based on the data stored in the FB 7.

[0008]

However, in the conventional device, when writing to the FB 7, the addressing by the drawing pipeline unit 5 and the output of data by the FBDC 16 had to be synchronized. That is, when writing to the FB 7, the MPU 3 accesses both the drawing pipeline unit 5 and the FBDC 6. That is, when writing data to the FB 7, it is necessary to synchronize the two whenever the drawn figure changes. Therefore, as the number of graphics to be displayed on the screen of the CRT 8 increases, the operation efficiency of the drawing pipeline unit 5 does not increase, resulting in a problem that the drawing performance of the device is not improved.

The present invention has been made to solve the above problems, and for example, the FB can be obtained only by accessing the drawing pipeline unit 5 by the MPU 3.
It is an object of the present invention to provide a device capable of writing data on the device 7.

[0010]

In order to achieve such an object, in the graphic display device of the present invention, the drawing pipeline unit supplies the attribute information to the FBDC together with the designation of the write address of the FB and stores the data. It is characterized by outputting.

[0011]

In the graphic display device of the present invention, when writing data on the FB, the writing address of the FB is specified by the drawing pipeline unit and the attribute information is supplied to the FBDC. The FBDC outputs data based on the supplied attribute information, and this data is written on the FB. Therefore, it is not necessary to synchronize the drawing pipeline unit with the FBDC, and the graphic can be displayed only by accessing the drawing pipeline unit.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below with reference to the drawings. It should be noted that members similar to or corresponding to the configuration of the conventional example shown in FIG. 2 are denoted by the same reference numerals, and description thereof will be omitted.

FIG. 1 shows the configuration of a graphic display device according to an embodiment of the present invention. In the figure display device 11 shown in this figure, the MPU 3 and the FBDC 6 are not connected, but the drawing pipeline unit 5 and the FBDC 6 are connected by the bus 10. In addition, MPU3,
When writing data on the FB 7, the FBDC 6 is not accessed, but only the drawing pipeline unit 5 is accessed.

That is, the data is written on the FB7 C
When trying to display a figure on the screen of RT8, MP
U3 gives a command and / or a parameter to the drawing pipeline unit 5 by a write operation to a fixed address, and the drawing pipeline unit 5 executes the above-mentioned pipeline processing based on these. Drawing pipeline section 5
Specifies the address of the FB7 and also provides attribute information as data to the FBDC6, and the FBDC6 outputs the data to be written to the FB7 in response to this.

Therefore, in this embodiment, writing to the FB 7 is executed without synchronizing the drawing pipeline unit 5 and the MBDC 6 and without the MPU 3 accessing the FBDC 6. Therefore, even if there are many figures to be drawn on the screen of the CRT 8, the drawing pipeline unit 5 can efficiently execute the pipeline processing, and the improvement of the drawing performance by the improvement of the operation efficiency is realized. It

[0016]

As described above, according to the present invention,
It becomes possible to write data to the FB only by accessing the drawing pipeline unit.
Since it is not necessary to synchronize with DC, it is possible to improve the drawing performance by improving the operation efficiency of the drawing pipeline unit.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a graphic display device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a graphic display device according to a conventional example.

[Explanation of symbols]

 3 processor (MPU) 4 segment buffer (SB) 5 drawing pipeline section 5a coordinate conversion processing section (VMAC) 5b clipping processing section (XYCL) 5c DDA processing section (XYAC) 6 frame buffer data control section (FBDC) 7 frame buffer (FB) 8 CRT 9,10 bus

Claims (1)

[Claims] 1. A frame buffer for storing data in a coordinate system corresponding to a display screen, and a drawing pipeline section for designating a write address of the frame buffer by subjecting graphic information to pipeline processing including coordinate conversion. A frame buffer data control unit that outputs data indicating an attribute such as a display color based on the attribute information, and by writing the data output from the frame buffer data control unit to an address specified by the drawing pipeline unit. A graphic display device for displaying a graphic on a display screen, characterized in that the drawing pipeline section specifies the write address of the frame buffer and supplies attribute information to the frame buffer data control section to output the data. apparatus.