JPH05249928A - Panel display device - Google Patents

Abstract

PURPOSE:To obtain the optimal display grade easily by controlling variably a conversion regulation of a brightness correcting means according to kinds of brightness levels. CONSTITUTION:Levels of display data VD0-VD2 to show brightness levels of respective picture elements are judged by means of a demultiplexer 23, and are outputted as Y0-Y7. After being reset in an 'H' period of a sampling signal SMPL, an R-S latch 24 stores the existence of the outputs Y0-Y7. A D flip-flop 25 inputs the contents of the R-S latch 24 respectively at the start of the sampling signal SMPL, and outputs them as jD0-jD7. A following stage matrix table 26 converts values of the display data VD0-VD2 by means of a conversion regulation according to values of the jD0-jD7, and outputs them as DO0-DO2. A final stage D flip-flop 27 synchronizes the outputs DO0-DO2 by means of a clock CK, and outputs them as digital display signals VO0-VO2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a panel display device using an LCD (liquid crystal display) panel or the like.

[0002]

2. Description of the Related Art Compared with a CRT (cathode ray tube), the display capacity such as the contrast ratio and the number of gradations is inferior.
For example, in a panel display device using an LCD panel or the like, the brightness of display data is corrected to improve the contrast.

FIG. 6 is a block diagram showing a configuration example of a conventional panel display device of this type. In this example, CRT60
And a display panel unit 62 having a display panel 61 such as an LCD panel for displaying an image.
It comprises a PU (Central Processing Unit) 63, a V-RAM (Video-Random Access Memory) 64, a display controller 65, a data converter 66, a D / A converter 67 and the like.

The V-RAM 64 is instructed by the CPU 63.
The display controller 65 reads out the contents of the above and performs internal processing to generate digital display data PD. The display data PD represents the brightness level of each pixel, is converted into an analog value by the D / A converter 67, and is displayed on the CRT 60. If this display data PD is given to a display panel unit having a multi-gradation function, image display is performed as in the CRT. However, as described above, the display panel unit is a CRT.
The contrast ratio is much worse than that of
However, when a large number of intermediate gradations are displayed, the contrast difference is small and it is very difficult to identify. Therefore, the display data PD is not directly given to the display panel unit,
The display quality is improved by providing the display panel unit 62 with the data whose brightness has been corrected by the data converter 66.

For example, in the case of 8-gradation display, if the original brightness level is PD and the corrected brightness level is PD ', then in the case of 0≤PD <2 in the data converter 66 PD' = 0 2≤PD <5 In the case of PD ′ = 45 ≦ PD <7, processing was performed as in PD ′ = 7, and the contrast difference was increased to facilitate discrimination.

[0006]

According to the conventional panel display device as described above, the display quality is improved by the luminance correction, but the display quality may be deteriorated depending on the kind of the displayed image. In other words, in the case of a character or straight line image, it is easier to see if the brightness is corrected as described above to reduce the intermediate gradation, and in some cases it is binarized. If the brightness correction is performed on the displayed image, the number of intermediate gradations decreases, resulting in an unnatural display. In this way, it is not necessary to uniformly perform brightness correction on all images.

However, in the conventional panel display device, the data converter is constituted by the gate and the conversion contents are fixed, or the palette table structure is adopted and the user can change the CPU contents even if the conversion contents are variable. It was necessary to give an instruction via this, and the operation was complicated.

Therefore, the present invention provides a panel display device which can easily obtain the optimum display quality according to the image contents without performing a complicated operation.

[0009]

According to the present invention, a display panel means capable of displaying an image with a plurality of gradations and a display data on the display panel means for converting the brightness level of input display data according to a conversion rule. The brightness correction means for determining the gradation, the monitoring means for monitoring the type of the brightness level of the input display data, and the above-mentioned conversion rule of the brightness correction means according to the type of the brightness level obtained by this monitoring means There is provided a panel display device including a variably controlling unit.

[0010]

Operation: The brightness level type (brightness distribution state) of the display image is monitored every certain period (1 to several frames), and the conversion of the brightness correction is performed so that the optimum display quality can be obtained according to the monitoring result. The rules are changing. If the number of brightness levels used is small (images such as characters and figures), widen the contrast difference between the brightness levels. The conversion rule is automatically changed so as to reduce the degree or to perform no brightness correction so that the optimum display quality can be obtained.

[0011]

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram schematically showing the overall construction of a panel display device as an embodiment of the present invention.

In this embodiment, a case where an active matrix thin film transistor liquid crystal display panel (hereinafter referred to as an active matrix FTF-LCD panel) capable of displaying 8 gradations is used as a display panel unit will be described as an example.

As shown in FIG. 1, this display panel device is adapted to display an image on a CRT 10 and a display panel unit 11 at the same time.
A RAM 13, a display controller 14, an auto pallet unit 15, and a D / A converter 16 are mainly included.

The video signal read from the V-RAM 13 by the display controller 14 according to the instruction of the CPU 12 is output as 3-bit digital display data VD _{0 to} VD ₂ . Then, this digital display data VD ₀
~ VD ₂ is input to the D / A converter 16 and the auto pallet unit 15. The display data VD _{0 to} VD ₂ input to the D / A converter 16 are converted into analog video signals and input to the CRT 10. Then CRT
Reference numeral 10 generates an image based on the input analog video signal and the horizontal synchronizing signal HS and the vertical synchronizing signal VS output from the display controller 14.

Further, the display data VD _{0 to} VD ₂ input to the auto pallet unit 15 are automatically converted to appropriate brightness when the level of the enable signal EN from the display controller 14 is "H", Digital display signal VO ₀
~ VO ₂ is output. On the other hand, enable signal EN
When the level of the display data is “L”, the display data VD _{0 to} VD ₂
Are output as they are as digital display signals VO _{0 to} VO ₂ .

The 0 display panel unit 11 is mainly composed of a timing generator 17, an X-driver 18, a Y-driver 19, a multi-power supply 20, a shift register 21, and a display panel 22. Digital display signals VO _{0 to} VO ₂ are input to the display panel unit 11 from the auto pallet unit 15, and a horizontal synchronization signal HS, a vertical synchronization signal VS, and a pixel clock signal CK are input from the display controller 14, respectively. Then, the horizontal synchronization signal HS, the vertical synchronization signal VS, and the pixel clock signal CK
On the basis of the
Timing signal TX, Y-driver 19 for driving 8
And a timing signal TS for driving the shift register 21 are generated. Further, the pixel clock signal CK and the digital display signal VO _0-
Based on VO ₂ , the multi-power supply 20 generates voltages V _{0 to VL} corresponding to each gradation and a voltage V _COM supplied to the scan line. Further, the shift register 21 transfers the held image data for one line on the display panel 22 consisting of the columns of digital display signals VO _{0 to} VO ₂ to the X-driver 18 for each horizontal synchronization signal HS, and at the same time, the counter. reset (not shown), a digital display signal VO ₀ ~VO up to _two pixel clock signal according the digital display signal VO ₀ ~VO ₂ according to figure leftmost pixel of the next one line to the right end of the pixel Input sequentially according to CK and hold.

The display panel unit 11 produces an image as follows. When the vertical synchronization signal VS is input to the display panel unit 11, each counter (not shown) of the X-driver 18, the Y-driver 19, and the shift register 21 is reset. Then, first, the shift register 21 is driven by the timing signal TS from the timing generator 17, and the image data for one line of the scanning line y ₀ at the upper end of the display panel 22 is captured. Then, when the horizontal synchronizing signal HS is input, the image data for one line of the scanning line y ₀ on the display panel 22 held in the shift register 21 is transferred to the X-driver 18.
Transferred to. At the same time, in order to activate the scan line y ₀ on the display panel 22, the Y-driver 19 is driven by the timing signal TY from the timing generator 17, and the charger voltage V _COM charged in the multi-power supply 20 is changed. It is captured. Then, the output terminal Y ₀ in the Y-driver 19 becomes active, and the voltage V _COM is supplied to the scanning line y ₀ in the display panel 22.

Next, the X-driver 18 is driven by the timing signal TX from the timing generator 17.
Then, the X-driver 18 charges the multi-power supply 20 with a voltage corresponding to each data line x _{0 to} x _N on the display panel 22, based on the loaded image data of one scanning line y _0. corresponding to the gradation from the charger voltage V ₀ ~V _L is selected and supplied to the data line x ₀ ~x _N of the display panel 22 from the output terminal X ₀ to X _N.

A pixel electrode (not shown) of each pixel on the scan line y ₀ on the display panel 23 selected in this way
Is charged with a voltage corresponding to a gray scale based on each of the digital display signals VO _{0 to} VO ₂ until the next horizontal synchronizing signal HS is input. Thus, scan line y
Each pixel at ₀ is displayed. Meanwhile, by the shift register 21, the image data for one line of the next scanning line y ₁ is converted into the digital display signal V corresponding to the pixel at the left end.
It is sequentially taken in from O _{0 to} VO ₂ .

When the next horizontal synchronizing signal HS is input, ₁ of the scanning line y ₁ held in the shift register 21 is input.
At the same time that the line image data is transferred to the X-driver 18, the counter of the Y-driver 19 counts up and the output terminal Y ₁ becomes active, and the display panel 2
The voltage V _COM is supplied to the scan line y ₁ at 2.
Then, based on the image data of one line in the scanning line y ₁ loaded by the X-driver 18, the voltages corresponding to the data lines x _{0 to} x _N are selected according to the gradation and the display panel 22 is selected. Data lines x _{0 to} x
Supplied to _N. The pixel electrode of each pixel in the scan line y ₁ selected in this way is charged until the next horizontal synchronizing signal HS is input with a voltage corresponding to the gray scale based on the respective digital display signals VO _{0 to} VO _2. It
Thus, each pixel in the scan line y ₁ is displayed.

Similarly, the shift register 21 fetches the image data for one line of the next scanning line, and the Y-driver 19 selects the next scanning line based on the input of the horizontal synchronizing signal HS. Voltage V _COM
Is supplied. Further, the voltage selected according to the gradation of each pixel based on the image data of one line of the next scanning line loaded by the X-driver 18 is supplied to the data lines x ₀ to x _N. This operation is repeated until the next vertical synchronizing signal VS is input, and the display panel 2
The image is generated on the 2.

The display panel device described above is a monochrome display panel device. In the case of a color display panel device, three sets of the D / A converter 16 and the auto pallet unit 15 are prepared for R, G, and B respectively, and the display panel unit is used as a display panel unit for color image display. By doing so, a color image can be generated on the display panel by the same procedure as in the case of the monochrome display panel described above.

FIG. 2 is a block diagram showing an example of the structure of the auto pallet unit 15, which is an essential component of the present invention.

As shown in the figure, the automatic pallet unit 1
Reference numeral 5 denotes a 3-input / 8-output demultiplexer 23, eight RS latches 24 connected to the output sides Y _{0 to} Y ₇ of the demultiplexer 23, and eight R-S latches 8 connected to the output sides of the RS latches 24, respectively. A matrix table 26 in which inputs JD ₀ to JD ₇ are connected to the output sides of the D flip-flop 25 and the eight D flip-flops 25, and three D flip-flops connected to the output sides DO _{0 to} DO ₂ of the matrix table 26, respectively. It is mainly composed of a switch 27 and a pulse generator 28.

The auto palette unit 15 has a pixel clock CL and display data VD representing the brightness level of each pixel.
_{0 to} VD ₂ and the vertical synchronizing signal VS are input. The pixel clock CL and the vertical synchronization signal VS are applied to the pulse generator 28 to generate the sampling signal SMPL. The sampling signal SMPL defines a cycle for monitoring the type of the brightness level of the display image, and is formed by dividing the vertical synchronization signal VS. As this cycle, if it is a short period such as 1 frame (1 vertical period), it follows a sudden change such as noise and the entire screen fluctuates, making it difficult to see. To be done.

Display data VD representing the brightness level of each pixel
_The levels of _{0 to} VD ₂ are determined by the demultiplexer 23 and output as Y _{0 to} Y ₇ . RS latch 24
Stores the presence or absence of the outputs Y _{0 to} Y ₇ after being reset in the “H” period of the sampling signal SMPL. The D flip-flop 25 inputs the contents of the RS latch 24 at the rising edge of the sampling signal SMPL, and JD ₀
~ Output as JD ₇ . Next matrix table 2
In 6, the value of the display data VD _{0 to} VD ₂ is converted according to the conversion rule according to the value of JD _{0 to} JD ₇ , and is output as DO ₀ to DO ₂ . In the D flip-flop 27 at the final stage, this is synchronized with the clock CK and output as digital display signals VO _{0 to} VO ₂ . Enable signal EN
Is a signal for validating JD _{0 to} JD ₇ , and when the level is “L”, display data VD _{0 to} VD ₂
Are output as they are as digital display signals VO _{0 to} VO ₂ .

FIG. 3 is a time chart for explaining the above-described operation of the auto pallet unit 15.

In the figure, VD _{0 to} VD ₂ and VO ₀ to
The numbers in the figure of VO ₂ are displayed in 8 gradations (0 to 7) as an example.
Represents the brightness level in the case of performing, and indicates the type of brightness level actually used for display. That is,
In the periods (I) and (II), the brightness level types are (0, 2,
5, 7), and the types of luminance levels are (0, 2, 5) in the periods (III) and (IV).

The type of brightness level used in the period (I) is
J at the rising edge of sampling signal SMPL in period (II)
It is set as D _{0 to} JD ₇ . In this case, the brightness conversion in the period (II) is performed by the maximum brightness level “7” in the period (I).
Since the minimum brightness level "0" is used, conversion is performed according to the conversion rule of 1: 1 (direct proportional).

FIG. 4 is a diagram for explaining the operation in the case of performing this one-to-one conversion rule. (A) is a display screen before conversion, (B) is a data conversion table, and (C) is after conversion. The respective display screens are shown. The numbers in the figure indicate the brightness level values.

In the case of an application centering on characters, the following three kinds of brightness levels are usually used: normal character ......... brightness level 5 highlight character ......... brightness level 7 background color ..... brightness level 2.

It is assumed that there is a display screen as shown in FIG. That is, the background brightness level is "2", the brightness levels of the normal characters "A" and "I" are "5", the brightness level of the highlight character "H" is "7", and the other brightness levels are "0". It is. In this case, the maximum brightness level "7",
Since the minimum brightness level "0" is included, it is not necessary to perform brightness conversion. Therefore, conversion is performed using the data conversion table of the one-to-one conversion rule as shown in FIG. 4 (B), and the converted image is the same as the original image as shown in FIG. 4 (C). Will be distinguished from.

Therefore, in the luminance conversion of the period (II), VD ₀ to
The value of VD ₂ is VO ₀ ~VO ₂ as 1 clock delay output. Luminance conversion in period (III) is also
Since the maximum brightness and the minimum brightness are used in I), conversion is performed according to the one-to-one conversion rule.

In the period (IV), since the maximum luminance level "7" was not used in the period (III), JD ₇ becomes "L" level, so that the luminance level "5" is set as the luminance level "7". The conversion is performed according to a conversion rule that increases the contrast difference.

FIG. 5 is a diagram for explaining the operation when such a conversion rule is performed. (A) is a display screen before conversion, (B) is a data conversion table, and (C) is a display screen after conversion. Are shown respectively.

It is assumed that the display screen is as shown in FIG. That is, there are no highlighted characters, normal characters “A”, “E”, and “I” having a brightness level “5”, a background having a brightness level “2”, and other parts having a brightness level “0”. Suppose there is. In this case, since all are normal characters (brightness level "5"), the brightness level of this normal character is increased. Conversion is performed using the data conversion table of the conversion rule as shown in FIG. 5B, and the brightness level “5” is converted to the brightness level “7”. As shown in FIG. 5C, in the converted image, all the normal characters have the same brightness level as that of the highlight character, and are easy to see. In this case, since there is no highlight character, there is no problem that the normal character and the highlight character cannot be distinguished.

Therefore, in the luminance conversion of the period (IV), VD _0-
For a pixel having a VD ₂ value of “5”, VO _{0 of} “7”
Converted to VO ₂ and output.

Although the above description has been made with the example of 8-gradation monochrome display, the contents of the conversion table are arbitrary and the structure may be rewritten by the CPU using RAM. The number of gradations is not limited to eight and may be any number.

[0040]

As described above in detail, according to the present invention, the display panel means capable of displaying an image with a plurality of gradations and the brightness level of the input display data are converted in accordance with the conversion rule to be displayed on the display panel means. The brightness correction means for determining the gradation of the display data, the monitoring means for monitoring the type of the brightness level of the input display data, and the above-described brightness correction means according to the type of the brightness level obtained by the monitoring means. Since the means for variably controlling the conversion rule is provided, the optimum display quality according to the image content can be easily obtained without performing a complicated operation.

[Brief description of drawings]

FIG. 1 is a block diagram schematically showing an overall configuration of a panel display device as an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of an auto pallet unit in FIG.

FIG. 3 is a time chart explaining the operation of the auto pallet unit in FIG.

FIG. 4 is a diagram for explaining the operation of a conversion rule in the embodiment of FIG.

FIG. 5 is a diagram for explaining the operation of another conversion rule in the embodiment of FIG.

FIG. 6 is a block diagram showing a configuration of an example of a conventional panel display device.

[Explanation of symbols]

 10 CRT 11 Display Panel Unit 12 CPU 13 V-RAM 14 Display Controller 15 Auto Pallet Section 16 D / A Converter 17 Timing Generator 18 X-Driver 19 Y-Driver 20 Multi-Power Supply 21 Shift Register 22 Display Panel 23 Demultiplexer 24 RS latch 25, 27 D flip-flop 26 Matrix table 28 Pulse generator

Claims (1)

[Claims] 1. A display panel means capable of displaying an image with a plurality of gradations, and a brightness correction means for converting the brightness level of input display data according to a conversion rule to determine the gradation of the display data on the display panel means. And monitoring means for monitoring the type of the brightness level of the input display data, and means for variably controlling the conversion rule of the brightness correction means according to the type of the brightness level obtained by the monitoring means. A panel display device characterized by the above.