JPH0524642B2 - - Google Patents

Info

Publication number
JPH0524642B2
JPH0524642B2 JP62134012A JP13401287A JPH0524642B2 JP H0524642 B2 JPH0524642 B2 JP H0524642B2 JP 62134012 A JP62134012 A JP 62134012A JP 13401287 A JP13401287 A JP 13401287A JP H0524642 B2 JPH0524642 B2 JP H0524642B2
Authority
JP
Japan
Prior art keywords
conductor
layer
layers
pattern
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62134012A
Other languages
Japanese (ja)
Other versions
JPS63299221A (en
Inventor
Noboru Nakajima
Shuji Matsuyama
Mitsuo Sakakura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toko Inc
Original Assignee
Toko Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toko Inc filed Critical Toko Inc
Priority to JP13401287A priority Critical patent/JPS63299221A/en
Publication of JPS63299221A publication Critical patent/JPS63299221A/en
Publication of JPH0524642B2 publication Critical patent/JPH0524642B2/ja
Granted legal-status Critical Current

Links

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、積層インダクタの製造方法に係るも
ので、特に印刷法によつて磁性体層と導体層を積
層する積層インダクタの製造方法に関するもので
ある。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a laminated inductor, and particularly to a method for manufacturing a laminated inductor in which a magnetic layer and a conductive layer are laminated by a printing method. It is.

〔従来技術とその問題点〕[Prior art and its problems]

電子部品の軽薄短小の要求は、高周波コイルな
どのインダクタンス素子においても例外でなく、
その対応の一つとして積層インダクタが考えられ
ている。
The requirements for electronic components to be light, thin, and small are no exception, even for inductance elements such as high-frequency coils.
Multilayer inductors are being considered as one of the solutions.

これは、フエライトの磁性体層間に周回しなが
ら連続する導体パターンを形成し、この導体パタ
ーンによつてコイルと同様なインダクタンスを得
ようとするものである。磁性体などの絶縁シート
を重ねる方法と、絶縁層も印刷によつて形成する
方法とがある。本発明は、印刷法による積層イン
ダクタの製造方法に関するものである。
In this method, a continuous conductor pattern is formed between magnetic layers of ferrite, and the conductor pattern is used to obtain an inductance similar to that of a coil. There is a method in which insulating sheets such as magnetic materials are stacked, and a method in which the insulating layer is also formed by printing. The present invention relates to a method of manufacturing a laminated inductor using a printing method.

この方法では、通常同時に多数個分の絶縁体層
と導体層を印刷した後に、各々の素子に分割さ
れ、比較的高温で焼成される。焼成の際には、絶
縁体、導体とも収縮するが、その収縮率は同じで
ない。磁性体等の絶縁体の収縮率の方が導体の収
縮率よりも大きい。
In this method, a large number of insulating layers and conductive layers are usually printed at the same time, then divided into individual elements, and fired at a relatively high temperature. During firing, both the insulator and the conductor shrink, but the shrinkage rates are not the same. The contraction rate of insulators such as magnetic materials is greater than that of conductors.

この収縮率の相違によつて、導体ペーストの銀
などが絶縁体層内に拡散してしまい、絶縁抵抗を
下げて特性の劣化の大きな原因となる。また、層
間が剥がれるデラミネーシヨンの要因の一つとも
なつている。
This difference in shrinkage rate causes silver and the like in the conductor paste to diffuse into the insulating layer, lowering the insulation resistance and becoming a major cause of deterioration of characteristics. It is also one of the causes of delamination, which is the separation of layers.

〔目的〕〔the purpose〕

本発明は、上記のような問題を解決して、絶縁
抵抗が高い磁性体層を得、特性の良好な積層イン
ダクタを得ることを目的とする。
An object of the present invention is to solve the above-mentioned problems, obtain a magnetic layer with high insulation resistance, and obtain a laminated inductor with good characteristics.

また、デラミネーシヨンを防止して、信頼性、
歩留の良好な積層インダクタを得ることを目的と
する。
It also prevents delamination and improves reliability.
The purpose is to obtain a laminated inductor with good yield.

〔問題点を解決するための手段〕 本発明は、空洞となる部分を形成しておき、収
縮率の小さい導体をここに導くことによつて、上
記の目的を達成するものである。
[Means for Solving the Problems] The present invention achieves the above object by forming a hollow portion and guiding a conductor with a small shrinkage rate therein.

すなわち、絶縁体層と導体層を交互に印刷しな
がら絶縁体内に連続して周回する導体パターンを
得る積層インダクタの製造方法において、該導体
パターンに隣接して焼成時に消失する材料層を、
周囲が該絶縁体層に囲まれるように印刷すること
に特徴を有するものである。
That is, in a method for manufacturing a laminated inductor that obtains a conductor pattern that continuously circulates inside an insulator while printing insulator layers and conductor layers alternately, a material layer adjacent to the conductor pattern that disappears during firing is
The feature is that printing is performed so that the periphery is surrounded by the insulating layer.

これによつて、磁性体などの絶縁体層に拡散す
る導体をこの空洞となつた部分に収容するもので
ある。
Thereby, a conductor such as a magnetic material that diffuses into the insulating layer is accommodated in this hollow portion.

〔実施例〕〔Example〕

以下、図面を参照して、本発明の実施例につい
て説明する。
Embodiments of the present invention will be described below with reference to the drawings.

第1図は、本発明の実施例を示す平面図であつ
て、絶縁層と導体層を交互に印刷している過程を
示している。フエライトの磁性体10aの上に半
ターン分の導体パターン11が形成されている。
磁性体10bはその半ターン前の導体パターンを
覆つており、その端部上までのびる導体パターン
11が形成されている。このように磁性体層と導
体パターンが交互に印刷されながら、導体パター
ンの端部同士は接続され、各ターンを形成する導
体パターン間には絶縁層が介在することになる。
FIG. 1 is a plan view showing an embodiment of the present invention, showing the process of alternately printing insulating layers and conductive layers. A half-turn conductor pattern 11 is formed on a ferrite magnetic material 10a.
The magnetic material 10b covers the conductive pattern half a turn before, and a conductive pattern 11 extending to the top of the end thereof is formed. While the magnetic layers and conductor patterns are printed alternately in this manner, the ends of the conductor patterns are connected to each other, and an insulating layer is interposed between the conductor patterns forming each turn.

導体パターン11に隣接して有機物のパターン
12が印刷されている。この有機物のパターン1
2は必ず導体パターン11に接していなければな
らない。そして、この有機物のパターン12は、
次の印刷工程において絶縁体層によつてかこま
れ、素子の端面に露出しないように形成する。導
体パターン11の内側に形成すると、インダクタ
としての磁路を横切る導体層が形成されることに
なり、特性の劣化の原因となる。したがつて、外
側に形成することが必要であり、とくに角の部分
に形成するのが望ましい。
An organic pattern 12 is printed adjacent to the conductive pattern 11. This organic matter pattern 1
2 must be in contact with the conductor pattern 11 without fail. This organic pattern 12 is
In the next printing process, it is surrounded by an insulating layer and is formed so as not to be exposed on the end face of the element. If it is formed inside the conductor pattern 11, a conductor layer will be formed that crosses the magnetic path as an inductor, causing deterioration of characteristics. Therefore, it is necessary to form it on the outside, and it is particularly desirable to form it on the corners.

第2図は、本発明の実施例を示す正面断面図で
ある。導体パターン21の脇に有機物層22が形
成されている。ここで、2ターン毎に有機物層2
2が形成されているが、これはこの部分に溜る導
体によつて短絡状態が生じにくくするためであ
る。したがつて、各ターンにおいて、有機物層を
形成する位置をずらすのが望ましいが、マスクの
関係などから、交互に反対方向に形成するのが効
率的である。
FIG. 2 is a front sectional view showing an embodiment of the present invention. An organic layer 22 is formed beside the conductor pattern 21 . Here, every 2 turns, the organic layer 2
2 is formed in order to prevent a short circuit from occurring due to the conductor accumulated in this portion. Therefore, it is desirable to shift the positions at which the organic layers are formed in each turn, but it is more efficient to form them alternately in opposite directions due to the relationship between masks and the like.

この種のインダクタの製造においては、多数の
素子分を同時に印刷して積層し、積層が完了した
後、素子に分割してから焼成する。焼成時に、有
機物は消失し、この部分は空洞となる。しかし、
この部分は導体層に隣接しているので、導体が導
かれてこの部分に充填される。焼成後にはこの部
分は空洞でなく、導体で一部または全部が満たさ
れた形となる。
In manufacturing this type of inductor, a large number of elements are simultaneously printed and laminated, and after the lamination is completed, the elements are divided and fired. During firing, the organic matter disappears and this area becomes hollow. but,
Since this part is adjacent to the conductor layer, the conductor is guided and filled into this part. After firing, this part is no longer hollow, but is partially or completely filled with the conductor.

なお、有機物層の配置等は前記の例に限られる
ものではなく、任意の位置、形状で良い。ただし
短絡が生じたり、浮遊容量が大きくなる形状は避
けた方が良い。
Note that the arrangement of the organic material layer is not limited to the above example, and may be in any position and shape. However, it is better to avoid shapes that cause short circuits or increase stray capacitance.

〔効果〕〔effect〕

本発明によれば、収縮率の差が吸収されて、収
縮率の小さい導体は消失した有機物層の後にでき
る空洞部に導かれる。
According to the present invention, the difference in shrinkage rate is absorbed, and the conductor with a smaller shrinkage rate is guided to the cavity formed after the disappeared organic layer.

これによつて、導体の銀などが絶縁層内に拡散
して特性の劣化を生じるのを防止できる。
This can prevent the conductor, such as silver, from diffusing into the insulating layer and causing deterioration of characteristics.

また、デラミネーシヨンの発生も防止できる。 Further, the occurrence of delamination can also be prevented.

これらのことから、特性、信頼性、歩留等の面
で優れた積層インダクタが得られる。
For these reasons, a laminated inductor with excellent characteristics, reliability, yield, etc. can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例を示す平面図、第2図
は同じく正面断面図である。 10…磁性体層、11,21…導体層、12,
22…有機物層。
FIG. 1 is a plan view showing an embodiment of the present invention, and FIG. 2 is a front sectional view. 10... Magnetic layer, 11, 21... Conductor layer, 12,
22...Organic layer.

Claims (1)

【特許請求の範囲】[Claims] 1 絶縁体層と導体層を交互に印刷しながら絶縁
体内に連続して周回する導体パターンを得る積層
インダクタの製造方法において、該導体パターン
に隣接して焼成時に消失する材料層を、周囲が該
絶縁体層に囲まれるように印刷することを特徴と
する積層インダクタの製造方法。
1. In a method for manufacturing a laminated inductor that obtains a conductor pattern that continuously circulates inside an insulator while printing insulator layers and conductor layers alternately, a material layer adjacent to the conductor pattern that disappears during firing is removed so that the surrounding area is A method for manufacturing a laminated inductor, characterized in that it is printed so as to be surrounded by an insulator layer.
JP13401287A 1987-05-29 1987-05-29 Manufacture of laminated inductor Granted JPS63299221A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13401287A JPS63299221A (en) 1987-05-29 1987-05-29 Manufacture of laminated inductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13401287A JPS63299221A (en) 1987-05-29 1987-05-29 Manufacture of laminated inductor

Publications (2)

Publication Number Publication Date
JPS63299221A JPS63299221A (en) 1988-12-06
JPH0524642B2 true JPH0524642B2 (en) 1993-04-08

Family

ID=15118313

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13401287A Granted JPS63299221A (en) 1987-05-29 1987-05-29 Manufacture of laminated inductor

Country Status (1)

Country Link
JP (1) JPS63299221A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5591103A (en) * 1978-12-28 1980-07-10 Tdk Corp Laminated inductor
JPS59213118A (en) * 1983-05-18 1984-12-03 Murata Mfg Co Ltd Manufacture of chip coil
JPS61255008A (en) * 1985-05-07 1986-11-12 アルプス電気株式会社 Manufacture of electric element

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5591103A (en) * 1978-12-28 1980-07-10 Tdk Corp Laminated inductor
JPS59213118A (en) * 1983-05-18 1984-12-03 Murata Mfg Co Ltd Manufacture of chip coil
JPS61255008A (en) * 1985-05-07 1986-11-12 アルプス電気株式会社 Manufacture of electric element

Also Published As

Publication number Publication date
JPS63299221A (en) 1988-12-06

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