JPH05243485A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To facilitate change of circuit constants by making the capacitance value of an MOS capacitor for a semiconductor integrated circuit variable. CONSTITUTION:After an insulating film 2 is formed on a P-type silicon substrate 1, a low resistivity polysilicon film 3 whose area is lager than an electrode 4 is formed. The initial capacitance value of an MOS capacitor is determined by the area of the polysilicon film 3. By plasma etching using the electrode 3 as a mask, the polysilicon film 3 overlapping with the electrode is etched, and the above capacitance value is turned into a capacitance value determined by the area of the electrode.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a MOS capacitor for a semiconductor integrated circuit.

[0002]

2. Description of the Related Art FIG. 2 shows a conventional MOS capacitor.
Will be described.

After forming an insulating film 2 on a P-type silicon substrate 1, an electrode 4 is formed to complete the process.

The capacitance value C of a MOS capacitor is C = A / (ε ₀ ε _S T) (A: electrode area, ε ₀ : dielectric constant of vacuum, ε _S : relative dielectric constant, T: thickness of insulating film ). Therefore, to change the capacitance value C, the thickness T of the insulating film, ε _{S of} the insulating film,
It is necessary to change any of the electrode areas A.

To change ε _S , for example, the oxide film used as the insulating film must be changed to a nitride film.

[0006]

MOS for which circuit design has been completed
Modification from the previous process is required to change the capacitance value of the capacitor. There was a problem that the design man-hour was increased.

An object of the present invention is to provide a means for changing the capacitance value without changing the relative permittivity or film thickness of the insulating film or the electrode area when a problem occurs in the capacitance value for which the circuit has been designed. It is in.

[0008]

A method of manufacturing a semiconductor device according to the present invention comprises a step of forming a low resistance polysilicon film on an insulating film formed on one main surface of a semiconductor substrate, and the polysilicon film. After forming an electrode on a part of the upper part, a step of etching the polysilicon film by plasma etching using a chlorine-based gas by using the electrode as a mask is included.

[0009]

EXAMPLE FIG. 1A shows a first example of the present invention.
This will be described with reference to (b) and.

First, as shown in FIG. 1A, an insulating film 2 is formed on a P-type silicon substrate 1, and then a low resistance polysilicon film 3 and an electrode 4 made of gold or the like are formed by a photolithography technique. To do.

Here, for example, an oxide film or a nitride film can be used as the insulating film 2. Immediately after deposition or after etching, the polysilicon film 3 is ion-implanted with phosphorus or arsenic to have a layer resistance of about 10 Ω / □. Film thickness is 100n
m.

Further, the polysilicon film 3 can be etched by plasma etching using a chlorine-based gas without reducing the remaining film of the underlying insulating film 2. Next, plasma etching using a fluorine-based gas is performed using the electrode 4 as a mask so that the remaining film of the polysilicon film 3 is not reduced.

At this time, the polysilicon film 3 is made low in resistance by ion implantation and has the same potential as the electrode 4,
The capacitance value of the MOS capacitor is determined by the area of the polysilicon film 3.

Further, as shown in FIG. 1B, when the polysilicon film 3 is etched using the electrode 4 as a mask, the area of the polysilicon film 3 is reduced and the capacitance value is reduced.

Next, a second embodiment of the present invention will be described with reference to FIG.

In this embodiment, since the insulating film 2 around the polysilicon film 3 is thin, the capacitance change can be increased.

Next, a third embodiment of the present invention will be described with reference to FIG.

In this embodiment, since the insulating film 2 around the polysilicon film 3 is thick, it is suitable for fine adjustment of the capacitance value.

[0019]

Since the low resistance polysilicon film is formed immediately below the electrodes, the capacitance value can be varied. For example, the area of the polysilicon film is 20 μm ² and the area of the electrode is 1
When the thickness is 0 μm ² , the capacitance value of 10 pF before etching the polysilicon film can be made 5 pF after etching.

[Brief description of drawings]

1A and 1B are sectional views showing a first embodiment of the present invention. (C) is a sectional view showing a second embodiment of the present invention. (D) is sectional drawing which shows the 3rd Example of this invention.

FIG. 2 is a sectional view showing a conventional MOS capacitor.

[Explanation of symbols]

 1 P-type silicon substrate 2 Insulating film 3 Low resistance polysilicon film 4 Electrode

Claims (1)

[Claims] 1. A step of forming a low resistance polysilicon film on an insulating film formed on one main surface of a semiconductor substrate, and an electrode formed on a part of the polysilicon film, followed by chlorine-based gas. And a step of etching the polysilicon film by using the electrode as a mask by plasma etching using.