JPH05243367A - Electrostatic chuck - Google Patents

Electrostatic chuck

Info

Publication number
JPH05243367A
JPH05243367A JP8041692A JP8041692A JPH05243367A JP H05243367 A JPH05243367 A JP H05243367A JP 8041692 A JP8041692 A JP 8041692A JP 8041692 A JP8041692 A JP 8041692A JP H05243367 A JPH05243367 A JP H05243367A
Authority
JP
Japan
Prior art keywords
insulating layer
protective film
electrostatic chuck
wafer
volume resistivity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8041692A
Other languages
Japanese (ja)
Other versions
JP3064653B2 (en
Inventor
Tetsuo Kitabayashi
徹夫 北林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toto Ltd
Original Assignee
Toto Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toto Ltd filed Critical Toto Ltd
Priority to JP8041692A priority Critical patent/JP3064653B2/en
Publication of JPH05243367A publication Critical patent/JPH05243367A/en
Application granted granted Critical
Publication of JP3064653B2 publication Critical patent/JP3064653B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Jigs For Machine Tools (AREA)

Abstract

PURPOSE:To prevent that an electrostatic force is lowered by a method wherein the diffusion of impurities from an insulating layer for an electrostatic chuck to a wafer is suppressed. CONSTITUTION:In an electrostatic chuck, an insulating layer 2 is formed on a substrate 1, an electrode 3 is formed between the substrate 1 and the insulating layer 2, the electrode 3 is connected to a DC power supply 5 via a lead wire 4 and a protective film 6 is formed on the surface of the insulating layer 2. A material for the protective film 6 is selected from a ceramic material which contains Si such as Si3N4, SiC, SiO2 or the like or from a material whose heat conductivity is high such as AlN, BN, C (diamond) or the like with reference to a material for the insulating layer 2. Concretely, a material in which the volume electric resistivity value rho of the insulating layer 2 and the volume electric resistivity value rhov of the protective film 6 are at rhov/rho 10<-1> is selected.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体ウェハ等の被吸着
物を静電力で吸着固定する静電チャックに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrostatic chuck for attracting and fixing an object to be attracted such as a semiconductor wafer by electrostatic force.

【0002】[0002]

【従来の技術】減圧雰囲気において半導体ウェハにプラ
ズマエッチング、CVD、イオンプレーティング等の処
理を行なう際の固定治具として、基板と絶縁層(誘電
層)との間、或いは絶縁層内に内部電極を設けた静電チ
ャックが特公昭60−59104号等として知られてい
る。
2. Description of the Related Art As a fixture for performing plasma etching, CVD, ion plating or the like on a semiconductor wafer in a reduced pressure atmosphere, an internal electrode is provided between a substrate and an insulating layer (dielectric layer) or inside the insulating layer An electrostatic chuck provided with is known as Japanese Patent Publication No. 60-59104.

【0003】上述した一般的な静電チャックは絶縁層の
上面を吸着面とし、この吸着面に半導体ウェハを載置す
るようにしている。しかしながら、このような構造にす
ると、直接半導体ウェハと絶縁層とが接触するため、半
導体ウェハに絶縁層から不純物が拡散したり混入するこ
とがある。そこで、本出願人は先に出願した特願平3−
186854号の明細書に、絶縁層の表面に不純物の拡
散等を防止するための保護膜を形成した静電チャックを
提案している。
In the general electrostatic chuck described above, the upper surface of the insulating layer serves as a suction surface, and the semiconductor wafer is mounted on the suction surface. However, with such a structure, since the semiconductor wafer and the insulating layer are in direct contact with each other, impurities may diffuse or mix into the semiconductor wafer from the insulating layer. Therefore, the applicant of the present application filed Japanese Patent Application No. 3-
The specification of 186854 proposes an electrostatic chuck in which a protective film for preventing diffusion of impurities is formed on the surface of an insulating layer.

【0004】[0004]

【発明が解決しようとする課題】上述したように、絶縁
層表面に保護膜を形成すればウェハへの不純物の拡散を
防ぐことができるが、保護膜の電気的特性によってはウ
ェハを吸着するための静電力に影響を与え、場合によっ
てはウェハを吸着できないことも生じる。
As described above, if a protective film is formed on the surface of the insulating layer, diffusion of impurities into the wafer can be prevented, but the wafer is adsorbed depending on the electrical characteristics of the protective film. It also affects the electrostatic force of the wafer and sometimes the wafer cannot be attracted.

【0005】[0005]

【課題を解決するための手段】上記課題を解決すべく本
発明者は静電チャックの等価回路に着目して本発明をな
したものであり、本発明は静電チャックの絶縁層の体積
固有抵抗値ρと前記保護膜の体積固有抵抗値ρvとが、
ρv/ρ≧ 10-1となるようにした。
In order to solve the above problems, the present inventor has made the present invention by paying attention to an equivalent circuit of an electrostatic chuck, and the present invention is based on the volume characteristic of the insulating layer of the electrostatic chuck. The resistance value ρ and the volume specific resistance value ρ v of the protective film are
ρ v / ρ ≧ 10 −1 .

【0006】[0006]

【作用】静電チャックの等価回路から、絶縁層と保護膜
の体積固有抵抗値が一定の関係つまりρv/ρ≧ 10-1
にあれば、ウェハを吸着するのに十分な静電力が得られ
る。
According to the equivalent circuit of the electrostatic chuck, the volume resistivity values of the insulating layer and the protective film are constant, that is, ρ v / ρ ≧ 10 -1.
In the case of, the electrostatic force sufficient to attract the wafer can be obtained.

【0007】[0007]

【実施例】以下に本発明の実施例を添付図面に基づいて
説明する。図1は本発明に係る静電チャックの断面図、
図2は同静電チャックの等価回路を示す図であり、この
静電チャックは基板1上に絶縁層2を形成し、これら基
板1と絶縁層2の間に電極3を形成し、この電極3をリ
ード線4を介して直流電源5に接続し、絶縁層2の表面
には保護膜6を形成し、この保護膜6上に載置される半
導体ウェハWはアースと直接接続されているか、または
プラズマによる電気的接続をしている。
Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a sectional view of an electrostatic chuck according to the present invention,
FIG. 2 is a diagram showing an equivalent circuit of the electrostatic chuck. This electrostatic chuck forms an insulating layer 2 on a substrate 1, forms an electrode 3 between the substrate 1 and the insulating layer 2, and 3 is connected to a DC power source 5 via a lead wire 4, a protective film 6 is formed on the surface of the insulating layer 2, and the semiconductor wafer W placed on this protective film 6 is directly connected to ground. , Or electrical connection by plasma.

【0008】ここで、基板1はAl23、Si34、Al
N、BN或いはSiC等を材料とし、絶縁層2は耐浸食
性、機械強度及び電気特性を考慮すると、Al23を主
成分とし、これにTiO2或いはCr23等の遷移金属酸
化物を絶縁抵抗値の調整用として添加したものを材料と
する。また絶縁層2の材料としては上記の他にSi
34、SiC、AlN、ZrO2、SiO2・Al23または
BNからなるセラミックス焼結体或いはクロロプレンゴ
ム若しくはアクリルゴム等の有機物を材料としてもよ
い。
The substrate 1 is made of Al 2 O 3 , Si 3 N 4 and Al.
Insulating layer 2 is made of N, BN or SiC, and in consideration of erosion resistance, mechanical strength and electrical characteristics, Al 2 O 3 is the main component, and transition metal oxide such as TiO 2 or Cr 2 O 3 is added to it. The material is added to adjust the insulation resistance value. Further, as the material of the insulating layer 2, in addition to the above, Si
A ceramic sintered body made of 3 N 4 , SiC, AlN, ZrO 2 , SiO 2 .Al 2 O 3 or BN, or an organic substance such as chloroprene rubber or acrylic rubber may be used as the material.

【0009】更に、保護膜6の材料としてはSi34
SiC、SiO2等のSiを含有するセラミック材料、また
はAlN、BN、C(ダイヤモンド)等の熱伝導率の高
い材料等の中から絶縁層2の材料との関係において選択
する。具体的には絶縁層2の体積固有抵抗値ρと保護膜
6の体積固有抵抗値ρvとが、ρv/ρ≧ 10-1となる
ものを選定する。
Further, the material of the protective film 6 is Si 3 N 4 ,
A ceramic material containing Si such as SiC or SiO 2 or a material having high thermal conductivity such as AlN, BN or C (diamond) is selected in relation to the material of the insulating layer 2. Specifically, the volume resistivity ρ of the insulating layer 2 and the volume resistivity ρ v of the protective film 6 are selected so that ρ v / ρ ≧ 10 −1 .

【0010】以上のように絶縁層2の体積固有抵抗値ρ
と保護膜6の体積固有抵抗値ρvとを一定の関係になる
ようにする理由を以下に述べる。先ず、図2に示す静電
チャックの等価回路の要素であるキャパシタンスC1、
2及びコンダクタンスG1、G2は、絶縁層2の体積固
有抵抗値をρ(Ωm)、絶縁層2の比誘電率をεr、内
部電極3と保護層6表面との間隔(厚さ)をd(m)、
ウェハWの面積S(m2)、ウェハWと保護層6表面と
の間の接触抵抗をR(Ω)、ウェハWと保護層6表面と
のギャップをδ(m)とすると以下の(数1)によって
表わされる。
As described above, the volume resistivity value ρ of the insulating layer 2
The reason why the volume resistivity value ρ v of the protective film 6 and the volume resistivity value ρ v have a constant relationship will be described below. First, the capacitance C1, which is an element of the equivalent circuit of the electrostatic chuck shown in FIG.
C 2 and conductances G 1 and G 2 are ρ (Ωm), the volume resistivity of the insulating layer 2, ε r , the relative permittivity of the insulating layer 2, and the distance (thickness between the inner electrode 3 and the surface of the protective layer 6). ) Is d (m),
If the area S (m 2 ) of the wafer W, the contact resistance between the wafer W and the surface of the protective layer 6 is R (Ω), and the gap between the wafer W and the surface of the protective layer 6 is δ (m), then Represented by 1).

【0011】[0011]

【数1】 [Equation 1]

【0012】このときギャップδはおおよそ以下の(数
2)によって表すことが可能である。
At this time, the gap δ can be approximately expressed by the following (Equation 2).

【数2】 [Equation 2]

【0013】また電圧印加時間が充分経過した後の静電
力Fは以下の(数3)で表される。
The electrostatic force F after the voltage application time has sufficiently passed is expressed by the following (Equation 3).

【0014】[0014]

【数3】 [Equation 3]

【0015】上記の(数3)から静電力Fは接触抵抗R
と絶縁層2の体積固有抵抗値ρの比R/ρによって決定
されることが分る。つまり、接触抵抗Rが小さくなる
と、保護膜6とウェハW間に分圧される電圧が小さくな
り、界面に形成されるコンデンサC1に蓄積される電荷
量が減少する。したがって、接触抵抗R(コンダクタン
スG1の逆数)が絶縁層2の体積固有抵抗値ρに比べて
小さいと、静電力Fは小さくなる。このことを実験した
結果を図3に示している。
From the above (Equation 3), the electrostatic force F is the contact resistance R
And the volume resistivity value ρ of the insulating layer 2 is determined by the ratio R / ρ. That is, when the contact resistance R becomes small, the voltage divided between the protective film 6 and the wafer W becomes small, and the amount of charge accumulated in the capacitor C 1 formed at the interface decreases. Therefore, when the contact resistance R (the reciprocal of the conductance G 1 ) is smaller than the volume specific resistance value ρ of the insulating layer 2, the electrostatic force F becomes small. The result of experimenting this is shown in FIG.

【0016】接触抵抗Rを積極的に制御するには以下に
説明する保護膜の体積固有抵抗値ρvによることが適切
かつ便利であるので、接触抵抗Rと保護膜6の体積固有
抵抗値ρvとの関係を考察する。保護膜6表面にウェハ
Wが吸着されている時、微視的には保護膜6表面とウェ
ハWとは複数の点で接触している。各接触点での接触抵
抗rは集中抵抗のみと近似でき、ウェハWの体積固有抵
抗ρplate が保護膜6の体積固有抵抗値ρvに比べ十分
小さいので(数4)のように表すことができる。
In order to positively control the contact resistance R, it is appropriate and convenient to use the volume specific resistance value ρ v of the protective film described below. Therefore, the contact resistance R and the volume specific resistance value ρ of the protective film 6 are appropriate. Consider the relationship with v . When the wafer W is adsorbed on the surface of the protective film 6, microscopically, the surface of the protective film 6 and the wafer W are in contact with each other at a plurality of points. The contact resistance r at each contact point can be approximated to only the concentrated resistance, and since the volume specific resistance ρ plate of the wafer W is sufficiently smaller than the volume specific resistance value ρ v of the protective film 6, it can be expressed as (Equation 4). it can.

【0017】[0017]

【数4】 [Equation 4]

【0018】そして、接触抵抗Rは各接触点の抵抗rが
並列に複数個並んだものと考えることができる。そし
て、各接触点の抵抗rを等しい値とすると以下の(数
5)が導き出され、(数5)から接触抵抗Rは保護膜6
の体積固有抵抗値ρvに比例することが分る。
The contact resistance R can be considered as a plurality of resistances r at each contact point arranged in parallel. Then, assuming that the resistances r at the respective contact points are equal, the following (Equation 5) is derived, and from (Equation 5), the contact resistance R is the protective film 6
It can be seen that it is proportional to the volume resistivity ρ v of.

【0019】[0019]

【数5】 [Equation 5]

【0020】即ち、以上をまとめると、保護膜を形成し
た場合に充分な静電力を維持するには保護膜6の体積固
有抵抗値ρvと絶縁層の体積固有抵抗値ρとの間に一定
の関係をもたせることが必要であるといえる。そこで、
保護膜6の体積固有抵抗値ρvと絶縁層の体積固有抵抗
値ρとの比と静電力Fとの関係について実験した結果を
図4に示す。図4からはρv/ρ比が10-2以下である
と半導体ウェハを吸着するのに十分な静電力が得られな
いことが分る。また十分な静電力を得るためにはρv
ρ比を10-1以上にすれば十分であるといえる。尚、保
護膜6の体積固有抵抗値ρvを測定するのが困難な場合
には、表面抵抗率ρsを測定しても殆ど変らないので、
表面抵抗率ρsを用いてもよい。
In summary, to summarize the above, in order to maintain a sufficient electrostatic force when the protective film is formed, a constant value is maintained between the volume specific resistance value ρ v of the protective film 6 and the volume specific resistance value ρ of the insulating layer. It can be said that it is necessary to have a relationship. Therefore,
FIG. 4 shows the result of an experiment on the relationship between the electrostatic force F and the ratio of the volume resistivity ρv of the protective film 6 to the volume resistivity ρ of the insulating layer. From FIG. 4, it can be seen that if the ρ v / ρ ratio is 10 −2 or less, sufficient electrostatic force for adsorbing the semiconductor wafer cannot be obtained. Also, to obtain a sufficient electrostatic force, ρ v /
It can be said that it is sufficient to set the ρ ratio to 10 -1 or more. When it is difficult to measure the volume resistivity ρ v of the protective film 6, the surface resistivity ρ s hardly changes, so
The surface resistivity ρ s may be used.

【0021】[0021]

【発明の効果】以上に説明した如く本発明によれば、絶
縁層の表面に保護膜を形成したので、絶縁層から半導体
ウェハへ不純物が拡散したり、混入することを防止抑制
することができ、しかも、保護膜の体積固有抵抗値ρv
と絶縁層の体積固有抵抗値ρとの間に、ρv/ρ≧ 10
-1なる関係をもたせるようにしたので、充分な静電力を
発揮することができる。
As described above, according to the present invention, since the protective film is formed on the surface of the insulating layer, it is possible to prevent the impurities from diffusing or mixing from the insulating layer to the semiconductor wafer. Moreover, the volume resistivity value of the protective film ρ v
And the volume resistivity ρ of the insulating layer, ρ v / ρ ≧ 10
Since it has a relationship of -1, it is possible to exert a sufficient electrostatic force.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る静電チャックの断面図FIG. 1 is a sectional view of an electrostatic chuck according to the present invention.

【図2】同静電チャックの等価回路を示す図FIG. 2 is a diagram showing an equivalent circuit of the electrostatic chuck.

【図3】接触抵抗と絶縁層の体積固有抵抗値との比と静
電力との関係を示すグラフ
FIG. 3 is a graph showing the relationship between the electrostatic resistance and the ratio of the contact resistance to the volume resistivity of the insulating layer.

【図4】保護膜及び絶縁層のそれぞれの体積固有抵抗値
の比と静電力との関係を示すグラフ
FIG. 4 is a graph showing the relationship between the ratio of the volume specific resistance values of the protective film and the insulating layer and the electrostatic force.

【符号の説明】[Explanation of symbols]

1…基板、2…絶縁層、3…内部電極、4…リード線、
5…電源、6…保護膜、W…半導体ウェハ。
1 ... Substrate, 2 ... Insulating layer, 3 ... Internal electrode, 4 ... Lead wire,
5 ... Power source, 6 ... Protective film, W ... Semiconductor wafer.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 絶縁層内または絶縁層と基板との間に内
部電極を設けるとともに絶縁層表面に保護膜を形成した
静電チャックにおいて、前記絶縁層の体積固有抵抗値ρ
と前記保護膜の体積固有抵抗値ρvとを以下の関係にな
るようにしたことを特徴とする静電チャック。
1. An electrostatic chuck in which an internal electrode is provided in an insulating layer or between an insulating layer and a substrate, and a protective film is formed on the surface of the insulating layer, the volume resistivity value ρ of the insulating layer.
And the volume specific resistance value ρ v of the protective film have the following relationship.
JP8041692A 1992-03-02 1992-03-02 Electrostatic chuck Expired - Lifetime JP3064653B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8041692A JP3064653B2 (en) 1992-03-02 1992-03-02 Electrostatic chuck

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8041692A JP3064653B2 (en) 1992-03-02 1992-03-02 Electrostatic chuck

Publications (2)

Publication Number Publication Date
JPH05243367A true JPH05243367A (en) 1993-09-21
JP3064653B2 JP3064653B2 (en) 2000-07-12

Family

ID=13717693

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8041692A Expired - Lifetime JP3064653B2 (en) 1992-03-02 1992-03-02 Electrostatic chuck

Country Status (1)

Country Link
JP (1) JP3064653B2 (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08154387A (en) * 1994-11-28 1996-06-11 Nissin Electric Co Ltd Electrostatic chuck
EP0806798A2 (en) * 1996-05-08 1997-11-12 Applied Materials, Inc. Substrate support chuck having a contaminant containment layer and method of fabricating same
US5701228A (en) * 1995-03-17 1997-12-23 Tokyo Electron Limited Stage system or device
US5841624A (en) * 1997-06-09 1998-11-24 Applied Materials, Inc. Cover layer for a substrate support chuck and method of fabricating same
JP2000058631A (en) * 1998-03-02 2000-02-25 Sumitomo Electric Ind Ltd Holder for manufacturing semiconductor and manufacture thereof
KR100366263B1 (en) * 1999-11-09 2002-12-31 코닉 시스템 주식회사 Fabrication method of wafer guard ring with enhanced toughness for a thermal shock
KR20030020072A (en) * 2001-09-01 2003-03-08 주성엔지니어링(주) Unipolar electro-static chuck
KR100717694B1 (en) * 2005-12-29 2007-05-11 코리아세미텍 주식회사 Electrostatic chuck with de-chuck layer
WO2011149918A2 (en) * 2010-05-28 2011-12-01 Entegris, Inc. High surface resistivity electrostatic chuck
US8861170B2 (en) 2009-05-15 2014-10-14 Entegris, Inc. Electrostatic chuck with photo-patternable soft protrusion contact surface
US8879233B2 (en) 2009-05-15 2014-11-04 Entegris, Inc. Electrostatic chuck with polymer protrusions

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08154387A (en) * 1994-11-28 1996-06-11 Nissin Electric Co Ltd Electrostatic chuck
US5701228A (en) * 1995-03-17 1997-12-23 Tokyo Electron Limited Stage system or device
EP0806798A2 (en) * 1996-05-08 1997-11-12 Applied Materials, Inc. Substrate support chuck having a contaminant containment layer and method of fabricating same
EP0806798A3 (en) * 1996-05-08 1999-11-17 Applied Materials, Inc. Substrate support chuck having a contaminant containment layer and method of fabricating same
US5841624A (en) * 1997-06-09 1998-11-24 Applied Materials, Inc. Cover layer for a substrate support chuck and method of fabricating same
JP2000058631A (en) * 1998-03-02 2000-02-25 Sumitomo Electric Ind Ltd Holder for manufacturing semiconductor and manufacture thereof
KR100366263B1 (en) * 1999-11-09 2002-12-31 코닉 시스템 주식회사 Fabrication method of wafer guard ring with enhanced toughness for a thermal shock
KR20030020072A (en) * 2001-09-01 2003-03-08 주성엔지니어링(주) Unipolar electro-static chuck
KR100717694B1 (en) * 2005-12-29 2007-05-11 코리아세미텍 주식회사 Electrostatic chuck with de-chuck layer
US8861170B2 (en) 2009-05-15 2014-10-14 Entegris, Inc. Electrostatic chuck with photo-patternable soft protrusion contact surface
US8879233B2 (en) 2009-05-15 2014-11-04 Entegris, Inc. Electrostatic chuck with polymer protrusions
US9721821B2 (en) 2009-05-15 2017-08-01 Entegris, Inc. Electrostatic chuck with photo-patternable soft protrusion contact surface
WO2011149918A2 (en) * 2010-05-28 2011-12-01 Entegris, Inc. High surface resistivity electrostatic chuck
WO2011149918A3 (en) * 2010-05-28 2012-03-01 Entegris, Inc. High surface resistivity electrostatic chuck

Also Published As

Publication number Publication date
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