JPH11233760A - Laminated structure member composed of metal, oxide film and silicon carbide semiconductor - Google Patents
Laminated structure member composed of metal, oxide film and silicon carbide semiconductorInfo
- Publication number
- JPH11233760A JPH11233760A JP2797998A JP2797998A JPH11233760A JP H11233760 A JPH11233760 A JP H11233760A JP 2797998 A JP2797998 A JP 2797998A JP 2797998 A JP2797998 A JP 2797998A JP H11233760 A JPH11233760 A JP H11233760A
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- silicon carbide
- laminated structure
- thermal oxidation
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、炭化珪素（Ｓｉ
Ｃ）単結晶表面を熱酸化して作製したＭＯＳ構造を持つ
積層構造体の熱酸化膜内部に発生する正電荷及び負電荷
を低減させてＭＯＳ構造におけるＣ−Ｖ（容量−電圧）
特性及びＩ−Ｖ（電流−電圧）特性の横方向シフトを低
減させることに関するものである。TECHNICAL FIELD The present invention relates to a silicon carbide (Si)
C) CV (capacitance-voltage) in the MOS structure by reducing the positive and negative charges generated inside the thermal oxide film of the stacked structure having the MOS structure produced by thermally oxidizing the single crystal surface
The present invention relates to reducing lateral shift of characteristics and IV (current-voltage) characteristics.
【０００２】[0002]
【従来の技術】従来の炭化珪素におけるＭＯＳ構造は、
単に炭化珪素単結晶表面に熱酸化膜を作製し、その表面
にＭＯＳ構造を形成しただけのものであるので、これら
ＭＯＳ構造の酸化膜中には、炭化珪素単結晶と熱酸化膜
との界面近傍に負の電荷が存在し、又その界面から４０
ｎｍ程度離れた酸化膜中には正の多量の電荷が存在して
いた。2. Description of the Related Art A conventional MOS structure in silicon carbide has the following structure.
Since only a thermal oxide film is formed on the surface of a silicon carbide single crystal and a MOS structure is formed on the surface, the oxide film of the MOS structure includes an interface between the silicon carbide single crystal and the thermal oxide film. There is a negative charge in the vicinity, and 40
A large amount of positive charges existed in the oxide film separated by about nm.
【０００３】このＭＯＳ構造とは、半導体トランジスタ
を作製する上で基本となる、金属（Ｍｅｔａｌ）ー酸化
膜（Ｏｘｉｄｅ）−半導体（Ｓｅｍｉｃｏｎｄｕｃｔｏ
ｒ）の積層構造を意味している。この積層構造の酸化膜
は、正確にはＳｉＯ2から構成されるが、電気的には絶
縁体である。即ち、半導体表面の酸化を行うだけで、半
導体表面に酸化膜からなる絶縁体が形成されるが、これ
は工業的利用価値が極めて高いので、現在トランジスタ
等を作製するための基本的な技術となっている。そこ
で、現在、シリコン（Ｓｉ）半導体が使用されるのは、
この表面を酸化すると酸化膜の絶縁体が形成されるため
である。[0003] The MOS structure is a metal (metal) -oxide film (Oxide) -semiconductor (Semiconductor), which is fundamental in manufacturing a semiconductor transistor.
r) means a laminated structure. The oxide film having this laminated structure is composed of SiO 2 to be precise, but is electrically an insulator. In other words, merely oxidizing the semiconductor surface forms an insulator made of an oxide film on the semiconductor surface. This is of extremely high industrial utility value, and is currently a basic technology for manufacturing transistors and the like. Has become. Therefore, at present, silicon (Si) semiconductors are used
This is because if this surface is oxidized, an insulator of an oxide film is formed.
【０００４】炭化珪素（ＳｉＣ）半導体も、シリコン
（Ｓｉ）半導体と同様に、その表面を酸化するとＳｉＯ
2酸化膜が形成される。この炭化珪素（ＳｉＣ）半導体
は、シリコン（Ｓｉ）半導体の作製技術と同様な方法に
よりＭＯＳ構造が作製できるので、半導体素子の集積化
等の可能性が他の半導体に比べて高く、現在注目されて
いる。[0004] Like a silicon (Si) semiconductor, a silicon carbide (SiC) semiconductor also has a SiO 2 surface when its surface is oxidized.
2 An oxide film is formed. This silicon carbide (SiC) semiconductor has a MOS structure that can be manufactured by the same method as the silicon (Si) semiconductor manufacturing technique, and thus has a higher possibility of integration of semiconductor elements and the like than other semiconductors. ing.
【０００５】[0005]
【発明が解決しようとする課題】炭化珪素単結晶表面を
熱酸化し、その表面に熱酸化膜を作製した炭化珪素ＭＯ
Ｓ構造を持つ積層構造体は、その作製条件により、ＭＯ
Ｓ構造のＣ−Ｖ特性及びＩ−Ｖ特性の横方向シフトの量
が異なったり、放射線照射時のＣ−Ｖ特性及びＩ−Ｖ特
性の横方向シフトが酸化膜の吸収線量により増減するな
どの複雑で不安定な挙動を示した。SUMMARY OF THE INVENTION A silicon carbide MO having a silicon carbide single crystal surface thermally oxidized to form a thermal oxide film on the surface.
The laminated structure having the S structure has an MO structure depending on the manufacturing conditions.
The amount of lateral shift of the CV characteristic and the IV characteristic of the S structure is different, and the lateral shift of the CV characteristic and the IV characteristic upon irradiation is increased or decreased by the absorbed dose of the oxide film. It showed complicated and unstable behavior.
【０００６】即ち、ＳｉＣのＭＯＳ構造を作製するため
にＳｉＣ表面を酸化すると、その時の酸化法によって、
酸化膜の中に電子や正孔（電子の抜けた穴）が形成され
る。トランジスタを、炭化珪素単結晶のＭＯＳ構造を利
用して作製する場合には、この電子や正孔がトランジス
タ特性を劣化させるので、大きな問題となっていた。That is, when the surface of SiC is oxidized to produce a MOS structure of SiC, the oxidation method at that time causes
Electrons and holes (holes from which electrons have escaped) are formed in the oxide film. When a transistor is manufactured using a silicon carbide single crystal MOS structure, the electrons and holes degrade the transistor characteristics, which has been a serious problem.
【０００７】又、Ｃ−Ｖ特性とは、ＭＯＳ構造を形成す
る酸化膜に電圧（Ｖｏｌｔａｇｅ）を印加したときの、
酸化膜内部、又は酸化膜と炭化珪素との界面近傍に蓄積
する電子や正孔の量を反映する電気容量（Ｃａｐａｃｉ
ｔａｎｃｅ）の変化を調べる測定のことで、ＭＯＳ構造
のＣ−Ｖ特性を調べることにより、トランジスタ特性の
劣化の主原因となる電子や正孔の量を評価することがで
きる。したがって、種々の酸化方法で半導体表面を酸化
してＭＯＳ構造を形成し、そのＣ−Ｖ特性を測定するこ
とにより酸化方法の最適化を行うことが可能になる。The CV characteristic means that the voltage (Voltage) when an oxide film forming a MOS structure is applied with a voltage (Voltage).
Electric capacity (Capaci) reflecting the amount of electrons and holes accumulated inside the oxide film or near the interface between the oxide film and silicon carbide.
By examining the CV characteristics of the MOS structure, it is possible to evaluate the amount of electrons and holes, which are the main causes of the deterioration of the transistor characteristics, by measuring the change in the transistor (tance). Therefore, it is possible to optimize the oxidation method by oxidizing the semiconductor surface by various oxidation methods to form a MOS structure and measuring the CV characteristics thereof.
【０００８】更に又、Ｉ−Ｖ特性とは、ＭＯＳ構造を有
する半導体素子を図４のように作製したときに、ＭＯＳ
構造電極に印加する電圧（Ｖ）に対し、ＭＯＳ構造を挟
むようにして配置した電極間に流れる電流（Ｉ）の強さ
を表す特性のことであり、これは、ＭＯＳ構造の電極に
電圧を印加すると、電極直下の酸化膜と炭化珪素半導体
界面、あるいは炭化珪素半導体中の抵抗を大きく変化す
ることを利用している。Further, the IV characteristic means that when a semiconductor device having a MOS structure is manufactured as shown in FIG.
A characteristic representing the intensity of current (I) flowing between electrodes arranged so as to sandwich a MOS structure with respect to a voltage (V) applied to a structure electrode. Utilizing the fact that the resistance in the interface between the oxide film directly under the electrode and the silicon carbide semiconductor or the resistance in the silicon carbide semiconductor changes significantly.
【０００９】したがって、酸化膜中に図３に示されるよ
うな電荷が蓄積しているときには、酸化膜を介して電圧
を炭化珪素半導体に印加すると、酸化膜内の電荷の影響
により印加電圧（Ｖ）の強さが変化する。これにより、
ＭＯＳ構造電極に電圧（Ｖ）を印加したときには、ＭＯ
Ｓ構造を挟むようにして配置した電極間に流れる電流
（Ｉ）の流れ具合が変化してしまい、本来のＩ−Ｖ特性
が得られなくなる。そこで、本発明による５ｎｍ以下の
酸化膜を有するＭＯＳ構造を作製すると、酸化膜中の電
荷が大きく低減されるので、Ｉ−Ｖ特性の大きな改善が
なされることになる。Therefore, when a charge is accumulated in the oxide film as shown in FIG. 3 and a voltage is applied to the silicon carbide semiconductor via the oxide film, the applied voltage (V) is affected by the charge in the oxide film. ) Changes in strength. This allows
When a voltage (V) is applied to the MOS structure electrode, MO
The flow of the current (I) flowing between the electrodes arranged so as to sandwich the S structure changes, and the original IV characteristics cannot be obtained. Therefore, when a MOS structure having an oxide film of 5 nm or less according to the present invention is manufactured, the charge in the oxide film is greatly reduced, so that the IV characteristics are greatly improved.
【００１０】[0010]
【課題を解決するための手段】本発明は、炭化珪素単結
晶表面に形成された熱酸化膜の厚さを５ｎｍ以下に保つ
ことにより、熱酸化によって酸化膜内部に発生する、炭
化珪素と酸化膜との界面から５ｎｍ以上離れ且つ約２０
ｎｍ以内までの範囲に分布する負電荷、及び界面から４
０ｎｍの位置近傍に生ずる正電荷を除去できるので、酸
化膜中の電荷量が減少してＭＯＳ構造のＣ−Ｖ特性の挙
動を安定させることができるものである。SUMMARY OF THE INVENTION According to the present invention, the thickness of a thermal oxide film formed on the surface of a silicon carbide single crystal is maintained at 5 nm or less, so that silicon oxide generated inside the oxide film by thermal oxidation can be removed. More than 5 nm from the interface with the film and about 20
negative charge distributed in the range up to nm, and 4
Since the positive charges generated near the position of 0 nm can be removed, the amount of charges in the oxide film is reduced and the behavior of the CV characteristics of the MOS structure can be stabilized.
【００１１】即ち、本発明は、金属、酸化膜及び炭化珪
素半導体からなるＭＯＳ構造を有する積層構造体におい
て、この酸化膜が５ｎｍ以下の熱酸化膜で形成された積
層構造体であり、又この熱酸化膜の上に熱酸化以外の方
法で酸化膜を堆積させて２層以上の酸化膜を持つことが
でき、更に又熱酸化膜の上に窒化膜を堆積させることも
できるものである。That is, the present invention relates to a laminated structure having a MOS structure composed of a metal, an oxide film and a silicon carbide semiconductor, wherein the oxide film is formed of a thermal oxide film having a thickness of 5 nm or less. An oxide film can be deposited on the thermal oxide film by a method other than thermal oxidation to have two or more oxide films, and a nitride film can be deposited on the thermal oxide film.
【００１２】本発明において、炭化珪素単結晶半導体表
面に酸化膜を形成してＭＯＳ構造を作製した場合には、
図１に示されるように、炭化珪素半導体３の上に熱酸化
膜２が作製され、その上に金属１が形成される。又図２
に示されるように、炭化珪素半導体３の上に熱酸化膜２
が作製され、更にその上に熱酸化以外の方法で作製され
た酸化膜４又は窒化膜４が形成され、更にその上に金属
１が形成される。In the present invention, when an oxide film is formed on the surface of a silicon carbide single crystal semiconductor to form a MOS structure,
As shown in FIG. 1, thermal oxide film 2 is formed on silicon carbide semiconductor 3, and metal 1 is formed thereon. FIG. 2
As shown in FIG. 2, thermal oxide film 2 is formed on silicon carbide semiconductor 3.
Is formed thereon, and an oxide film 4 or a nitride film 4 formed by a method other than thermal oxidation is formed thereon, and a metal 1 is further formed thereon.
【００１３】又、炭化珪素単結晶半導体表面に酸化膜を
形成してＭＯＳ構造を有する半導体素子を作製した場合
には、図４に示されるように、ＭＯＳ構造を挟むような
形で半導体に直接触れる金属電極を配置した構造とな
り、そのＭＯＳ構造部分に電圧を印加すると、挟み込む
ように配置した電極間の抵抗が減少して電流が流れるよ
うになるので、この素子構造の動作をつかさどる中心部
はＭＯＳ構造である。When an oxide film is formed on the surface of a silicon carbide single crystal semiconductor to produce a semiconductor device having a MOS structure, as shown in FIG. When a voltage is applied to the MOS structure, the resistance between the sandwiched electrodes decreases and current flows, so the central part that controls the operation of this element structure is It has a MOS structure.
【００１４】[0014]
【発明の実施の形態】本発明のＭＯＳ構造の作製におい
ては、熱酸化膜の厚さが５ｎｍ以下になるように熱酸化
する。また、耐電圧が必要なＭＯＳ構造の半導体素子を
作製するには、熱酸化により５ｎｍ以下の熱酸化膜を作
製後、ＣＶＤ法等の熱酸化以外の方法により、その熱酸
化膜の上に酸化膜又は窒化膜などの絶縁膜を堆積成長さ
せて増加した膜厚を得る。DESCRIPTION OF THE PREFERRED EMBODIMENTS In manufacturing a MOS structure according to the present invention, thermal oxidation is performed so that the thickness of a thermal oxide film becomes 5 nm or less. Further, in order to manufacture a semiconductor device having a MOS structure requiring a withstand voltage, a thermal oxide film having a thickness of 5 nm or less is formed by thermal oxidation, and then oxidized on the thermal oxide film by a method other than thermal oxidation such as CVD. An increased thickness is obtained by depositing and growing an insulating film such as a film or a nitride film.
【００１５】本発明の金属、酸化膜及び炭化珪素半導体
からなるＭＯＳ構造を有する積層構造体における金属と
しては、アルミニウム、金、白金、モロブデン等の導電
性金属が使用されるが、この金属のに代えて導電性が金
属に匹敵する燐を多量に含むポリシリコン（多結晶シリ
コン）等の導電性物質も使用され得る。As the metal in the laminated structure having a MOS structure composed of the metal, the oxide film and the silicon carbide semiconductor of the present invention, a conductive metal such as aluminum, gold, platinum, and molybdenum is used. Alternatively, a conductive material such as polysilicon (polycrystalline silicon) containing a large amount of phosphorus whose conductivity is comparable to that of a metal can be used.
【００１６】熱酸化方法には、１０００−１２００℃の
乾燥酸素中でＳｉＣを酸化する方法と同程度の温度の水
蒸気中でＳｉＣを酸化する方法とが知られているが、水
蒸気による酸化法が電気的に良い酸化膜を得ることがで
きるので、本発明においてもこの方法を使用する。As a thermal oxidation method, a method of oxidizing SiC in steam at a temperature similar to that of oxidizing SiC in dry oxygen at 1000 to 1200 ° C. is known. Since an electrically good oxide film can be obtained, this method is also used in the present invention.
【００１７】なお、熱酸化方法以外の酸化方法として
は、ＳｉＣに対して室温でオゾンを用いてＳｉＣ表面を
酸化して酸化膜を作製する方法、Ｓｉ原子を含むガスと
酸素を含むガスとを１０００℃程度に加熱したＳｉＣに
吹き付けて、その表面にＳｉＯ2膜を化学的に堆積させ
る化学気相堆積法（Ｃｈｅｍｉｃａｌ Ｖａｐｏｒ Ｄ
ｅｐｏｓｉｔｉｏｎ法）等の方法が使用される。As an oxidation method other than the thermal oxidation method, a method of oxidizing the surface of SiC using ozone at room temperature with respect to SiC to form an oxide film, a gas containing Si atoms and a gas containing oxygen are used. A chemical vapor deposition method (Chemical Vapor D) in which an SiO 2 film is chemically deposited on the surface by spraying the SiC heated to about 1000 ° C.
(e.g., deposition method).
【００１８】図３に、炭化珪素単結晶表面に１００ｎｍ
の熱酸化膜を作製してＭＯＳ構造を形成したときの熱酸
化膜内部の電荷分布を示している。負電荷は、結晶界面
から５ｎｍまでの範囲と、５ｎｍから２０ｎｍまでの範
囲とに分布する２種類の負電荷からなり、前者が極めて
応答時間の長いイオン化した界面準位を示し、後者が熱
酸化膜中に捕らえられた負電荷である。また正電荷は４
０ｎｍ近傍の位置に局在している。したがって、熱酸化
膜を５ｎｍ以下にすることにより、上述の負電荷の一部
と正電荷の全て（５ｎｍから２０ｎｍまでの負電荷、及
び４０ｎｍ近傍の位置の正電荷）を除去する事ができ
る。FIG. 3 shows that the surface of the silicon carbide single crystal has a thickness of 100 nm.
3 shows the charge distribution inside the thermal oxide film when the thermal oxide film is formed to form the MOS structure. The negative charge is composed of two types of negative charges distributed in a range from the crystal interface to 5 nm and in a range from 5 nm to 20 nm. The former shows an ionized interface state having an extremely long response time, and the latter shows a thermal oxidation. This is the negative charge trapped in the film. The positive charge is 4
It is localized at a position near 0 nm. Therefore, by making the thermal oxide film 5 nm or less, it is possible to remove a part of the above-mentioned negative charges and all of the positive charges (negative charges from 5 nm to 20 nm and positive charges near 40 nm).
【００１９】ＳｉＣの酸化膜中には、図３に示すよう
に、通常の酸化方法で酸化膜を作製すると深さ方向に向
かって負電荷や正電荷が局在することが知られている
が、界面準位とは、酸化膜と炭化珪素（ＳｉＣ）半導体
の界面近傍に発生する酸化膜の欠陥のことであり、ＭＯ
Ｓ構造に印加される電圧の強さによって酸化膜中の電子
や正孔を捕獲したり放出したりするので、この捕獲や放
出のタイミングがトランジスタ特性に悪影響を与えるた
めに、通常はこれを無くすことが技術的に重要である。
しかし、ＳｉＣの界面準位（ＳｉＣ半導体の界面から５
ｎｍの範囲の酸化膜）の場合は、この捕獲又は放出のタ
イミングが、室温では極めて遅い性質があり、電圧を加
えても捕らえた電子をなかなか放出しないので、あたか
も捕獲や放出を行わない酸化膜内部に蓄積した負電荷の
ように行動する。As shown in FIG. 3, it is known that, when an oxide film is formed in a SiC oxide film by an ordinary oxidation method, negative charges and positive charges are localized in the depth direction. And the interface state is a defect of the oxide film generated near the interface between the oxide film and the silicon carbide (SiC) semiconductor.
Electrons and holes in the oxide film are trapped and released by the intensity of the voltage applied to the S structure. Since the timing of the capture and release adversely affects the transistor characteristics, it is usually eliminated. It is technically important.
However, the interface state of SiC (5 from the interface of the SiC semiconductor).
In the case of an oxide film having a thickness in the range of nm, the timing of capture or emission is extremely slow at room temperature, and the captured electrons do not readily emit even when a voltage is applied, so that the oxide film does not capture or emit. Acts like a negative charge stored inside.
【００２０】[0020]
【実施例】ＳｉＣ半導体の表面処理を行い、その清浄表
面を露出させた。次に、酸化炉を立ち上げて酸化炉内を
１０００−１２００℃の高温の水蒸気雰囲気（水素燃焼
酸化が行われる雰囲気）に保持した。この炉内に表面浄
化された半導体を挿入し、その浄化表面に酸化膜を作製
した。酸化が終了した段階で得られた半導体を炉外に引
き出して室温まで急速に冷却した。その結果、酸化時間
を調整することにより５ｎｍの酸化膜を半導体表面に作
製できた。EXAMPLE A surface treatment of a SiC semiconductor was performed to expose a clean surface thereof. Next, the oxidation furnace was started up, and the inside of the oxidation furnace was maintained in a high-temperature steam atmosphere at 1000 to 1200 ° C. (atmosphere in which hydrogen combustion oxidation was performed). A semiconductor whose surface was purified was inserted into the furnace, and an oxide film was formed on the purified surface. The semiconductor obtained at the end of the oxidation was pulled out of the furnace and rapidly cooled to room temperature. As a result, a 5-nm oxide film could be formed on the semiconductor surface by adjusting the oxidation time.
【００２１】次に、必要に応じて、この半導体をＣＶＤ
装置の炉内に入れ、その表面に酸化膜又は窒化膜を堆積
させた。Next, if necessary, this semiconductor is subjected to CVD.
It was placed in a furnace of the apparatus, and an oxide film or a nitride film was deposited on the surface.
【００２２】なお、酸化時間は、ＳｉＣ半導体の面方位
と呼ばれている結晶軸の方向や結晶の形態により異な
り、比較的よく使用されている６Ｈ−ＳｉＣ（六方晶Ｓ
ｉＣ）と呼ばれる単結晶のシリコン面（０００１面）で
は、１１００℃の温度で、その表面を酸化すると一分間
に０．４ｎｍ酸化されるので、５ｎｍの酸化膜を作製す
るためには、約１３分の酸化時間を要した。The oxidation time varies depending on the direction of the crystal axis called the plane orientation of the SiC semiconductor and the form of the crystal, and is relatively well-used for 6H-SiC (hexagonal S
On a single-crystal silicon surface (0001 surface) called iC), when the surface is oxidized at a temperature of 1100 ° C., the surface is oxidized by 0.4 nm per minute, so that about 13 nm is required to form a 5 nm oxide film. Minutes of oxidation time was required.
【００２３】[0023]
【発明の効果】本発明の方法によれば、ＳｉＣのＭＯＳ
構造体の熱酸化膜中に発生する電荷量を低く押さえるこ
とができるため、炭化珪素ＭＯＳ構造のＣ−Ｖ特性及び
Ｉ−Ｖ特性、あるいは炭化珪素ＭＯＳ構造を有する炭化
珪素半導体素子などの電気特性を安定させる事ができ
る。According to the method of the present invention, SiC MOS
Since the amount of charges generated in the thermal oxide film of the structure can be suppressed to a low level, the CV characteristics and IV characteristics of the silicon carbide MOS structure, or the electrical characteristics of a silicon carbide semiconductor device having the silicon carbide MOS structure, etc. Can be stabilized.
【図１】 ＭＯＳ構造の基本断面図である。FIG. 1 is a basic sectional view of a MOS structure.
【図２】 酸化膜とＣＶＤ法で堆積させた２層の酸化膜
又は窒化膜を持つＭＯＳ構造の基本断面図である。FIG. 2 is a basic sectional view of a MOS structure having an oxide film and a two-layer oxide film or nitride film deposited by a CVD method.
【図３】 炭化珪素単結晶表面に１００ｎｍの熱酸化膜
を作製し、その表面にＭＯＳ構造を形成したときの、熱
酸化膜内部の電荷分布を示す図である。FIG. 3 is a diagram showing a charge distribution inside a thermal oxide film when a thermal oxide film of 100 nm is formed on the surface of a silicon carbide single crystal and a MOS structure is formed on the surface.
【図４】 ＭＯＳ構造及びＭＯＳ構造を有する炭化珪素
半導体素子構造を示す図である。FIG. 4 is a diagram showing a MOS structure and a silicon carbide semiconductor device structure having the MOS structure.
１：電極、２：熱酸化膜、３：炭化珪素半導体、４：Ｃ
ＶＤ法で堆積させた酸化膜又は窒化膜、５：電極。1: electrode, 2: thermal oxide film, 3: silicon carbide semiconductor, 4: C
Oxide film or nitride film deposited by VD method, 5: electrode.
Claims (5)
導体からなるＭＯＳ構造を有する積層構造体において、
この酸化膜が５ｎｍ以下の熱酸化膜で形成されたことを
特徴とする積層構造体。1. A laminated structure having a MOS structure comprising a metal, an oxide film and a silicon carbide (SiC) semiconductor,
A laminated structure wherein the oxide film is formed of a thermal oxide film having a thickness of 5 nm or less.
膜を堆積させて作製した２層以上の酸化膜を持つ請求項
１記載の積層構造体。2. The laminated structure according to claim 1, wherein the laminated structure has two or more oxide films formed by depositing an oxide film on the thermal oxide film by a method other than thermal oxidation.
した請求項２記載の積層構造体。3. The laminated structure according to claim 2, wherein a nitride film is deposited on the thermal oxide film.
導体からなるＭＯＳ構造を有する積層構造体において、
金属が導電性の物質で置き換えられた請求項１に記載の
積層構造体。4. A laminated structure having a MOS structure comprising a metal, an oxide film and a silicon carbide (SiC) semiconductor,
The laminated structure according to claim 1, wherein the metal is replaced with a conductive substance.
求項４に記載の積層構造体。5. The laminated structure according to claim 4, wherein the conductive substance is polycrystalline silicon.
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|---|---|---|---|
| JP02797998A JP3855019B2 (en) | 1998-02-10 | 1998-02-10 | Laminated structure made of metal, oxide film and silicon carbide semiconductor |
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|---|---|---|---|
| JP02797998A JP3855019B2 (en) | 1998-02-10 | 1998-02-10 | Laminated structure made of metal, oxide film and silicon carbide semiconductor |
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| JP3855019B2 JP3855019B2 (en) | 2006-12-06 |
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