JPH05239649A - Formation of silicon oxide thin film - Google Patents
Formation of silicon oxide thin filmInfo
- Publication number
- JPH05239649A JPH05239649A JP4175892A JP4175892A JPH05239649A JP H05239649 A JPH05239649 A JP H05239649A JP 4175892 A JP4175892 A JP 4175892A JP 4175892 A JP4175892 A JP 4175892A JP H05239649 A JPH05239649 A JP H05239649A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- reaction gas
- silicon oxide
- oxide thin
- hydrogen
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【0001】[0001]
【産業上の利用分野】この発明は、酸化ケイ素薄膜の形
成方法に関し、特に液晶表示素子の駆動回路で代表され
る薄膜トランジスタ(TFT)のゲート絶縁膜などに好
適な酸化ケイ素薄膜を形成する方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a silicon oxide thin film, and more particularly to a method for forming a silicon oxide thin film suitable for a gate insulating film of a thin film transistor (TFT) represented by a drive circuit of a liquid crystal display device. ..
【0002】[0002]
【従来の技術】近時、液晶表示素子の駆動回路として、
電子移動度の大きい多結晶シリコンを用いた多結晶シリ
コン薄膜トランジスタ(Poly−SiTFT)を用い
ることが提案され、既にビューファインダー、CCD、
液晶プロジェクターなどの一部に使用されつつある。こ
の多結晶シリコン薄膜トランジスタは、LSIプロセス
を使用して製造されているため、基板上にゲート絶縁膜
を熱酸化法で形成する際に1000℃以上のプロセス温
度が加わり、したがって基板には耐熱性のある高価な石
英ガラスしか使用できない。2. Description of the Related Art Recently, as a driving circuit for a liquid crystal display element,
It has been proposed to use a polycrystalline silicon thin film transistor (Poly-SiTFT) that uses polycrystalline silicon having a high electron mobility, and has already been proposed.
It is being used in some LCD projectors. Since this polycrystalline silicon thin film transistor is manufactured by using the LSI process, a process temperature of 1000 ° C. or higher is applied when the gate insulating film is formed on the substrate by the thermal oxidation method, and therefore the substrate is heat resistant. Only some expensive quartz glass can be used.
【0003】一方、大画面の液晶表示素子は、OA機器
や民生機器に使用されるため、安価であることが不可欠
であり、このためには安価なガラス基板を使用すること
が必要となる。しかしながら、ガラス基板は耐熱性が劣
るため、ガラス基板を用いる場合は多結晶シリコン薄膜
トランジスタのゲート絶縁膜を低温プロセスで形成せね
ばならないことになる。On the other hand, since a large-screen liquid crystal display element is used in office automation equipment and consumer equipment, it is essential that it be inexpensive, and for this purpose, it is necessary to use an inexpensive glass substrate. However, since the glass substrate is inferior in heat resistance, when the glass substrate is used, the gate insulating film of the polycrystalline silicon thin film transistor must be formed by a low temperature process.
【0004】ところで、テトラメチルシラン(TM
S)、テトラエチルシラン(TES)、テトラエトキシ
シラン(TEOS)などの有機シラン化合物を原料とす
る酸化ケイ素薄膜の形成方法としては、熱CVD法とプ
ラズマCVD法とが代表的であるが、大面積に均一に成
膜することを考慮すると、プラズマCVD法が好まし
い。By the way, tetramethylsilane (TM
S), tetraethylsilane (TES), tetraethoxysilane (TEOS) and other organic silane compounds are used as a raw material for forming a silicon oxide thin film, a thermal CVD method and a plasma CVD method are typical, but they have a large area. The plasma CVD method is preferable in consideration of uniform film formation.
【0005】しかし、上記有機シラン化合物を原料と
し、プラズマCVD法によって作成した酸化ケイ素薄膜
は、段差被覆性に優れているが、電気的特性が悪く、ゲ
ート絶縁膜には不適切であった。これは、成膜に寄与す
る前駆体がC−H結合を含む有機高分子であるため、基
板表面で流動性を示し、段差被覆性は改善されるものの
薄膜中にもCもしくはC−H結合を含むためである。However, the silicon oxide thin film prepared by the plasma CVD method using the above-mentioned organic silane compound as a raw material has excellent step coverage, but has poor electrical characteristics and is unsuitable for a gate insulating film. This is because the precursor that contributes to film formation is an organic polymer containing a C—H bond, so that it exhibits fluidity on the substrate surface and the step coverage is improved, but a C or C—H bond is present in the thin film. This is because it includes.
【0006】このため、電気的特性の優れた酸化ケイ素
薄膜を得るためには、CもしくはC−H結合が含まれな
い緻密な薄膜を得る必要があり、そのためには、プラズ
マCVD法による成膜の際に、基板温度を高くするか、
高周波電力の投入電力を増加させ、気相中において有機
シラン化合物ガスを完全に分解する必要がある。Therefore, in order to obtain a silicon oxide thin film having excellent electrical characteristics, it is necessary to obtain a dense thin film containing no C or C—H bond, and for that purpose, a film is formed by the plasma CVD method. When increasing the substrate temperature,
It is necessary to increase the input power of high frequency power to completely decompose the organosilane compound gas in the gas phase.
【0007】しかしながら、基板温度を高くする方法
は、上述のように安価なガラス基板が使用できなくな
り、また高周波電力の投入電力を増加する方法はCVD
装置に対する負荷が大きくなり、歩留り等を考慮すると
好ましくない。However, as a method of increasing the substrate temperature, it is not possible to use an inexpensive glass substrate as described above, and a method of increasing the input power of high frequency power is CVD.
The load on the device increases, which is not preferable in consideration of yield and the like.
【0008】[0008]
【発明が解決しようとする課題】よって、この発明にお
ける課題は、絶縁耐圧、リーク電流などの電気的特性の
優れた酸化ケイ素薄膜を、基板温度を高めたり、高周波
電力の投入電力を増加したりしなくとも形成できる方法
を得ることにある。Therefore, an object of the present invention is to increase the substrate temperature or increase the input power of high frequency power of a silicon oxide thin film having excellent electrical characteristics such as withstand voltage and leak current. It is to obtain a method that can be formed without doing.
【0009】[0009]
【課題を解決するための手段】かかる課題は、有機ケイ
素ガスを含む反応ガスを用いてプラズマCVD法により
酸化ケイ素薄膜を形成する際に、反応ガス中に水蒸気ま
たは水素を混合することにより解決される。This problem is solved by mixing water vapor or hydrogen in the reaction gas when forming a silicon oxide thin film by the plasma CVD method using a reaction gas containing an organosilicon gas. It
【0010】以下、この発明を詳しく説明する。図1
は、この発明に用いられるプラズマCVD装置の一例を
示すもので、図中符号1は、真空槽である。この真空槽
1は図示しない排気系に接続され、その内部が所定の真
空度になるように構成されている。真空槽1内にはアノ
ードを兼ねるトレイ3が設けられており、このトレイ3
には基板4が載置されるようになっている。このトレイ
3上の基板4は、ヒータ2によって加熱されるようにな
っている。また、真空槽1内には、トレイ3に対峙する
ようにカソード5が設けられ、このカソード5は、真空
槽1外に設けられた高周波電源6に接続されている。ま
た、真空槽1内に反応ガスを供給するパイプ7が設けら
れている。The present invention will be described in detail below. Figure 1
Shows an example of a plasma CVD apparatus used in the present invention, and reference numeral 1 in the drawing is a vacuum chamber. The vacuum chamber 1 is connected to an exhaust system (not shown), and the inside of the vacuum chamber 1 is configured to have a predetermined degree of vacuum. A tray 3 also serving as an anode is provided in the vacuum chamber 1.
The substrate 4 is mounted on the substrate. The substrate 4 on the tray 3 is heated by the heater 2. A cathode 5 is provided in the vacuum chamber 1 so as to face the tray 3, and the cathode 5 is connected to a high frequency power source 6 provided outside the vacuum chamber 1. Further, a pipe 7 for supplying a reaction gas is provided in the vacuum chamber 1.
【0011】次に、このプラズマCVD装置を用いた本
発明の形成方法の一実施例を説明する。まず、真空槽1
内を所定の真空度まで排気したのち、パイプ7から反応
ガスを真空槽1に供給する。この時の反応ガスとして
は、テトラメチルシラン、テトラエチルシラン、テトラ
エトキシシランなどの有機シラン化合物ガスと、酸素、
オゾン含有酸素、一酸化炭素、二酸化炭素、一酸化窒素
などの酸化性ガスと、水蒸気(H2 O)または水素とか
らなる混合ガスが用いられる。Next, an embodiment of the forming method of the present invention using this plasma CVD apparatus will be described. First, the vacuum tank 1
After evacuating the inside to a predetermined degree of vacuum, a reaction gas is supplied to the vacuum chamber 1 through the pipe 7. The reaction gas at this time, an organic silane compound gas such as tetramethylsilane, tetraethylsilane, tetraethoxysilane, and oxygen,
A mixed gas composed of an oxidizing gas such as ozone-containing oxygen, carbon monoxide, carbon dioxide, and nitric oxide, and water vapor (H 2 O) or hydrogen is used.
【0012】反応ガス中に、水蒸気または水素を混入す
ることで、電気的特性の優れた酸化ケイ素薄膜が形成で
きる。水蒸気または水素の混入量は、反応ガス中の有機
シラン化合物に対して、水蒸気では5〜100倍(容量
比)が好ましく、水素では15〜200倍(容量比)が
好ましい。By mixing water vapor or hydrogen into the reaction gas, a silicon oxide thin film having excellent electrical characteristics can be formed. The mixing amount of water vapor or hydrogen is preferably 5 to 100 times (volume ratio) for water vapor and 15 to 200 times (volume ratio) for hydrogen with respect to the organic silane compound in the reaction gas.
【0013】真空槽1内の圧力が安定したのち、高周波
電源6からの高周波電力をカソード5に印加して、プラ
ズマ放電を開始させ、反応ガスを分解、酸化することに
より、基板4表面に酸化ケイ素薄膜が形成される。所定
の膜厚の酸化ケイ素薄膜が形成されたのち、放電を止
め、反応ガスの供給を停止する。After the pressure in the vacuum chamber 1 becomes stable, high-frequency power from the high-frequency power source 6 is applied to the cathode 5 to start plasma discharge to decompose and oxidize the reaction gas, thereby oxidizing the surface of the substrate 4. A silicon thin film is formed. After the silicon oxide thin film having a predetermined thickness is formed, the discharge is stopped and the supply of the reaction gas is stopped.
【0014】このような形成方法においては、得られる
酸化ケイ素薄膜の電気的特性が優れたものとなる。これ
は、反応ガス中に混入された水蒸気または水素がプラズ
マ放電により分解、活性化され、活性な水素および酸素
が有機シラン分子の分解を促進し、得られる酸化ケイ素
薄膜中にCもしくはC−H結合が残らないためと推測さ
れる。このため、基板温度を400℃以下としても、あ
るいは高周波投入電力を減少させても、良質の酸化ケイ
素薄膜が得られることになる。In such a forming method, the electrical characteristics of the obtained silicon oxide thin film are excellent. This is because water vapor or hydrogen mixed in the reaction gas is decomposed and activated by plasma discharge, active hydrogen and oxygen accelerate decomposition of organic silane molecules, and C or C—H in the obtained silicon oxide thin film. It is presumed that no bond remains. Therefore, a high-quality silicon oxide thin film can be obtained even if the substrate temperature is set to 400 ° C. or lower or the high frequency input power is reduced.
【0015】図2は、基板温度300℃において、成膜
中に水蒸気を添加して得られた酸化ケイ素薄膜の絶縁耐
圧を示すグラフである。このグラフから水蒸気の添加に
したがって絶縁耐圧が高くなっていることがわかる。FIG. 2 is a graph showing the dielectric strength of a silicon oxide thin film obtained by adding water vapor during film formation at a substrate temperature of 300 ° C. It can be seen from this graph that the dielectric strength increases with the addition of water vapor.
【0016】また、図3は、高周波投入電力と得られた
酸化ケイ素薄膜の絶縁耐圧との関係を示したグラフであ
り、図中黒丸は水蒸気を添加しない場合、白丸は水蒸気
を20SCCM添加した場合を示す。これより、高周波
投入電力を2500W(0.39W/cm2 )から10
00W(0.16W/cm2 )に減少しても、6MV/
cm以上の絶縁耐圧を有する酸化ケイ素薄膜が得られる
ことがわかる。さらに、水蒸気に代えて水素を用いて
も、同様の効果が得られたことが確かめられている。FIG. 3 is a graph showing the relationship between the high-frequency input power and the withstand voltage of the obtained silicon oxide thin film. In the figure, the black circles indicate the case where no water vapor is added, and the white circles indicate the case where 20 SCCM of water vapor is added. Indicates. From this, the high frequency input power is 2500 W (0.39 W / cm 2 ) to 10
Even if it is reduced to 00 W (0.16 W / cm 2 ), 6 MV /
It can be seen that a silicon oxide thin film having a withstand voltage of cm or more can be obtained. Furthermore, it has been confirmed that the same effect was obtained by using hydrogen instead of water vapor.
【0017】また、上述の実施例においては、有機シラ
ン化合物ガスと酸化性ガスと水蒸気または水素とを混合
した反応ガスを真空槽内に供給しているが、これらのガ
スをそれぞれ個別に真空槽1に導入することもできる。
さらに、この発明の方法は、リンやボロンなどをドープ
した酸化ケイ素薄膜(PSG薄膜,BSG薄膜)などの
形成にも当然使用することができる。Further, in the above-mentioned embodiment, the reaction gas in which the organic silane compound gas, the oxidizing gas and the steam or hydrogen are mixed is supplied into the vacuum chamber, but these gases are individually supplied to the vacuum chamber. It can also be introduced in 1.
Further, the method of the present invention can be naturally used for forming a silicon oxide thin film (PSG thin film, BSG thin film) doped with phosphorus or boron.
【0018】[0018]
【発明の効果】以上説明したように、この発明の酸化ケ
イ素薄膜の形成方法は、有機ケイ素ガスを含む反応ガス
を用いてプラズマCVD法により酸化ケイ素薄膜を形成
する際に、反応ガス中に水蒸気または水素を混合するも
のであるので、基板温度を高めたり、高周波電力の投入
電力を増加したりしなくとも、絶縁耐圧、リーク電流、
界面準位密度、固定電荷密度などの電気的特性の優れた
酸化ケイ素薄膜を製造することができる。このため、基
板として安価なガラス基板が使用できるようになり、ま
た製造設備費用や電力費用の削減も可能となるなどの効
果が得られる。As described above, according to the method for forming a silicon oxide thin film of the present invention, when the silicon oxide thin film is formed by the plasma CVD method using the reaction gas containing the organic silicon gas, water vapor is contained in the reaction gas. Alternatively, since hydrogen is mixed, the dielectric strength, the leakage current, the leakage current, and the like can be increased without increasing the substrate temperature or the input power of the high frequency power.
A silicon oxide thin film having excellent electrical properties such as interface state density and fixed charge density can be manufactured. Therefore, an inexpensive glass substrate can be used as a substrate, and manufacturing facility cost and electric power cost can be reduced.
【図1】本発明の実施例において使用したプラズマCV
D装置の概略構成図である。FIG. 1 is a plasma CV used in an example of the present invention.
It is a schematic block diagram of a D device.
【図2】水蒸気の添加量と絶縁耐圧との関係を示すグラ
フである。FIG. 2 is a graph showing the relationship between the amount of water vapor added and the withstand voltage.
【図3】高周波投入電力と絶縁耐圧との関係を示すグラ
フである。FIG. 3 is a graph showing the relationship between high-frequency input power and withstand voltage.
1 真空槽 2 ヒータ 3 トレイ 4 基板 5 カソード 6 高周波電源 7 パイプ 1 Vacuum Tank 2 Heater 3 Tray 4 Substrate 5 Cathode 6 High Frequency Power Supply 7 Pipe
Claims (1)
プラズマCVD法により酸化ケイ素薄膜を形成する際
に、反応ガス中に水蒸気または水素を混合することを特
徴とする酸化ケイ素薄膜の形成方法。1. A method for forming a silicon oxide thin film, which comprises mixing water vapor or hydrogen into the reaction gas when forming the silicon oxide thin film by a plasma CVD method using a reaction gas containing an organic silicon gas.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4041758A JP2574095B2 (en) | 1992-02-27 | 1992-02-27 | Method of forming silicon oxide thin film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4041758A JP2574095B2 (en) | 1992-02-27 | 1992-02-27 | Method of forming silicon oxide thin film |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH05239649A true JPH05239649A (en) | 1993-09-17 |
JP2574095B2 JP2574095B2 (en) | 1997-01-22 |
Family
ID=12617311
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4041758A Expired - Lifetime JP2574095B2 (en) | 1992-02-27 | 1992-02-27 | Method of forming silicon oxide thin film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2574095B2 (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06168930A (en) * | 1992-11-30 | 1994-06-14 | Nec Corp | Chemical vapor growth, chemical vapor growth device and manufacture of multilayer wiring |
WO1997006565A1 (en) * | 1995-08-04 | 1997-02-20 | Seiko Epson Corporation | Process for preparing thin-film transistor, process for preparing active matrix substrate, and liquid crystal display |
US6458720B1 (en) | 1999-07-23 | 2002-10-01 | Matsushita Electric Industrial Co., Ltd. | Method for forming interlayer dielectric film |
US6706648B2 (en) | 1995-09-08 | 2004-03-16 | Semiconductor Energy Laboratory Co., Ltd | APCVD method of forming silicon oxide using an organic silane, oxidizing agent, and catalyst-formed hydrogen radical |
US7393723B2 (en) | 1995-09-08 | 2008-07-01 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor device |
JP2017197845A (en) * | 2011-09-19 | 2017-11-02 | ピルキントン グループ リミテッド | Process for forming silica coating on glass substrate |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6289876A (en) * | 1985-10-14 | 1987-04-24 | Semiconductor Energy Lab Co Ltd | Formation of thin film |
JPS63282270A (en) * | 1987-05-13 | 1988-11-18 | Nec Corp | Production of semiconductor device |
-
1992
- 1992-02-27 JP JP4041758A patent/JP2574095B2/en not_active Expired - Lifetime
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6289876A (en) * | 1985-10-14 | 1987-04-24 | Semiconductor Energy Lab Co Ltd | Formation of thin film |
JPS63282270A (en) * | 1987-05-13 | 1988-11-18 | Nec Corp | Production of semiconductor device |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06168930A (en) * | 1992-11-30 | 1994-06-14 | Nec Corp | Chemical vapor growth, chemical vapor growth device and manufacture of multilayer wiring |
WO1997006565A1 (en) * | 1995-08-04 | 1997-02-20 | Seiko Epson Corporation | Process for preparing thin-film transistor, process for preparing active matrix substrate, and liquid crystal display |
US5976989A (en) * | 1995-08-04 | 1999-11-02 | Seiko Epson Corporation | Thin film transistor fabrication method, active matrix substrate fabrication method, and liquid crystal display device |
US6150283A (en) * | 1995-08-04 | 2000-11-21 | Seiko Epson Corporation | Thin film transistor fabrication method, active matrix substrate fabrication method, and liquid crystal display device |
EP1286386A1 (en) * | 1995-08-04 | 2003-02-26 | Seiko Epson Corporation | Thin film transistor fabrication method |
US6706648B2 (en) | 1995-09-08 | 2004-03-16 | Semiconductor Energy Laboratory Co., Ltd | APCVD method of forming silicon oxide using an organic silane, oxidizing agent, and catalyst-formed hydrogen radical |
US7393723B2 (en) | 1995-09-08 | 2008-07-01 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor device |
US7491659B2 (en) | 1995-09-08 | 2009-02-17 | Semiconductor Energy Laboratory Co., Ltd. | APCVD method of forming silicon oxide using an organic silane, oxidizing agent, and catalyst-formed hydrogen radical |
US6458720B1 (en) | 1999-07-23 | 2002-10-01 | Matsushita Electric Industrial Co., Ltd. | Method for forming interlayer dielectric film |
US6828257B2 (en) | 1999-07-23 | 2004-12-07 | Matsushita Electric Industrial Co., Ltd. | Method for forming interlayer dielectric film |
JP2017197845A (en) * | 2011-09-19 | 2017-11-02 | ピルキントン グループ リミテッド | Process for forming silica coating on glass substrate |
Also Published As
Publication number | Publication date |
---|---|
JP2574095B2 (en) | 1997-01-22 |
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