JPH05235265A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPH05235265A
JPH05235265A JP3476692A JP3476692A JPH05235265A JP H05235265 A JPH05235265 A JP H05235265A JP 3476692 A JP3476692 A JP 3476692A JP 3476692 A JP3476692 A JP 3476692A JP H05235265 A JPH05235265 A JP H05235265A
Authority
JP
Japan
Prior art keywords
film
wafer
insulating film
silicon nitride
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3476692A
Other languages
Japanese (ja)
Inventor
Keiko Watanabe
慶子 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP3476692A priority Critical patent/JPH05235265A/en
Publication of JPH05235265A publication Critical patent/JPH05235265A/en
Pending legal-status Critical Current

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  • Semiconductor Integrated Circuits (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To provide a method for manufacturing semiconductor, which forms an extremely thin natural oxide film between a CVD silicon nitride film and a substrate at the time of forming a composite insulating film composed of two or more insulating films with the CVD silicon nitride film at the bottom, forms a thin film when the composite insulating film is formed as a capacitor insulating film, ensures the charge accumulating quantity and prevents the deterioration of electrical pressure resistance and the deterioration of the insulating film reliability. CONSTITUTION:At the time of forming a composite insulating film 17, which is composed of two or more layers of insulating films with a CVD silicon nitride film 15 at the bottom, on the single crystal silicon substrate or an impurity doped polycrystal silicon film 12 of a semiconductor wafer 11, the natural oxide film on the wafer is nitrified thermal nitriding so as to form CVD silicon nitride film on the wafer after cleaning the wafer, the surface of the CVD silicon nitride film is oxidized and a silicon oxide film 16 is grown.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置の製造方法
に係り、特にCVD(化学気相成長)法により形成され
たCVD窒化シリコン膜を最下層に有する二層以上の絶
縁膜からなる複合絶縁膜の形成方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a composite of two or more insulating films having as a lowermost layer a CVD silicon nitride film formed by a CVD (chemical vapor deposition) method. The present invention relates to a method for forming an insulating film.

【0002】[0002]

【従来の技術】半導体集積回路において、例えばメモリ
セルのキャパシタに用いられる絶縁膜は、高集積化に伴
ってキャパシタのサイズが縮小しても容量を可及的に確
保するために、特に、薄膜化、高誘電率が要求されてい
る。酸化シリコン膜に比べて誘電率が高い絶縁膜として
窒化シリコン膜が知られている。
2. Description of the Related Art In a semiconductor integrated circuit, for example, an insulating film used for a capacitor of a memory cell is a thin film in order to secure the capacity as much as possible even if the size of the capacitor is reduced due to high integration. And high dielectric constant are required. A silicon nitride film is known as an insulating film having a dielectric constant higher than that of a silicon oxide film.

【0003】一般に、窒化シリコン膜は、膜質が十分で
ないので、単層で用いられることは少なく、酸化シリコ
ン膜と積層されて使用されている。最近では、絶縁膜の
薄膜化を図るために、窒化シリコン膜の表面を酸化して
酸化シリコン膜を成長させた二層構造の複合絶縁膜が実
用されている。
Generally, since the film quality of the silicon nitride film is not sufficient, it is rarely used as a single layer, and it is used by being laminated with a silicon oxide film. Recently, in order to reduce the thickness of the insulating film, a composite insulating film having a two-layer structure in which the surface of the silicon nitride film is oxidized to grow a silicon oxide film has been put into practical use.

【0004】通常、窒化シリコン膜の形成に際しては、
化学薬品を用いてウェハー洗浄処理を行った後、減圧下
におけるCVD法により、単結晶シリコン基板上あるい
は不純物がドーピングされた多結晶シリコン膜上に堆積
させている。そして、上記CVD窒化シリコン膜上に酸
化シリコン膜を積層する。
Generally, when forming a silicon nitride film,
After performing a wafer cleaning process using a chemical, it is deposited on the single crystal silicon substrate or on the polycrystalline silicon film doped with impurities by the CVD method under reduced pressure. Then, a silicon oxide film is laminated on the CVD silicon nitride film.

【0005】ところで、上記したような二層構造の複合
絶縁膜をシリコン基板上に形成する場合、CVD窒化シ
リコン膜と下地(シリコン基板)との間に1nm程度の
自然酸化膜が成長することが知られている。また、上記
複合絶縁膜をシリコン基板上の多結晶シリコン膜上に形
成する場合、CVD窒化シリコン膜と下地(多結晶シリ
コン膜)との間に2nm程度の自然酸化膜が成長するこ
とが知られている。この点について、上記複合絶縁膜を
メモリセルのキャパシタの絶縁膜として形成する場合を
例として、図4(a)乃至(c)を参照しながら詳細に
説明する。
By the way, when the above-described double-layered composite insulating film is formed on a silicon substrate, a natural oxide film of about 1 nm may grow between the CVD silicon nitride film and the base (silicon substrate). Are known. Further, when the composite insulating film is formed on the polycrystalline silicon film on the silicon substrate, it is known that a natural oxide film of about 2 nm grows between the CVD silicon nitride film and the base (polycrystalline silicon film). ing. This point will be described in detail with reference to FIGS. 4A to 4C, taking a case where the composite insulating film is formed as an insulating film of a capacitor of a memory cell as an example.

【0006】図4(a)において、41はシリコン基板
(ウェハー)、42はこのシリコン基板上に堆積され、
不純物がドーピングされた多結晶シリコン膜(キャパシ
タの電荷蓄積層)である。この多結晶シリコン膜を下地
として窒化シリコン膜を形成する直前に、化学薬品を用
いてウェハー洗浄処理を行う。この場合、ウェハーの水
洗時に前記多結晶シリコン膜上に1nm程度の自然酸化
膜(第1の自然酸化膜)43が成長する。
In FIG. 4A, 41 is a silicon substrate (wafer), 42 is deposited on this silicon substrate,
It is a polycrystalline silicon film (charge storage layer of a capacitor) doped with impurities. Immediately before forming a silicon nitride film using this polycrystalline silicon film as a base, a wafer cleaning process is performed using a chemical. In this case, a natural oxide film (first natural oxide film) 43 of about 1 nm grows on the polycrystalline silicon film when the wafer is washed with water.

【0007】この後、ウェハーを窒化シリコン膜形成用
の反応炉に入れ、減圧CVD法により、図4(b)に示
すように、窒化シリコン膜45を形成する。この際、窒
化シリコン膜形成前にウェハーを反応炉に入れる時に炉
内温度はほぼ700℃に保たれているので、CVD炉へ
の外気の巻き込みにより前記第1の自然酸化膜43上に
さらに1nm程度の自然酸化膜(第2の自然酸化膜)4
4が成長する。即ち、窒化シリコン膜45と下層の多結
晶シリコン膜42との間の2nm程度の自然酸化膜(4
3、44)が存在することになる。
After that, the wafer is put into a reaction furnace for forming a silicon nitride film, and a silicon nitride film 45 is formed by a low pressure CVD method as shown in FIG. 4B. At this time, since the temperature inside the furnace is kept at about 700 ° C. when the wafer is put into the reaction furnace before the silicon nitride film is formed, the outside air is entrained in the CVD furnace so that the first natural oxide film 43 is further covered by 1 nm. Natural oxide film (second natural oxide film) 4
4 grows. That is, a natural oxide film (4 nm) of about 2 nm between the silicon nitride film 45 and the lower polycrystalline silicon film 42 is formed.
3, 44) will exist.

【0008】次に、図4(c)に示すように、熱処理炉
内で窒化シリコン膜45の表面を酸化して酸化シリコン
膜46を成長させ、二層構造の複合絶縁膜47を形成す
る。この後、複合絶縁膜47上に多結晶シリコン膜から
なるキャパシタプレート電極48を形成することによ
り、前記複合絶縁膜47を電極間絶縁に用いたキャパシ
タの形成を完了する。
Next, as shown in FIG. 4C, the surface of the silicon nitride film 45 is oxidized in a heat treatment furnace to grow a silicon oxide film 46, thereby forming a composite insulating film 47 having a two-layer structure. After that, a capacitor plate electrode 48 made of a polycrystalline silicon film is formed on the composite insulating film 47 to complete the formation of a capacitor using the composite insulating film 47 for inter-electrode insulation.

【0009】しかし、上記したように複合絶縁膜47の
下層に2nm程度の自然酸化膜(43、44)が存在す
ると、キャパシタ絶縁膜の膜厚が所望値より2nm程度
増加し、この膜厚の増加分が全体の例えば30%にも達
する。これにより、キャパシタ絶縁膜の薄膜化を大きく
阻害し、キャパシタの電荷蓄積量の低下を招くことにな
る。このことは、現在、大きな問題になっており、将来
はますます深刻な問題になる。
However, as described above, when the natural oxide film (43, 44) having a thickness of about 2 nm is present in the lower layer of the composite insulating film 47, the thickness of the capacitor insulating film is increased by about 2 nm from the desired value. The increase amount reaches 30% of the whole, for example. This greatly hinders the thinning of the capacitor insulating film, resulting in a decrease in the charge storage amount of the capacitor. This is a big problem now, and it will be an increasingly serious problem in the future.

【0010】また、前記したような自然酸化膜が存在す
ると、キャパシタ絶縁膜の膜質が変化し、電気的耐圧の
劣化、絶縁膜の信頼性の低下をまねくおそれがある。特
に、前記したようにCVD炉への外気の巻き込みにより
生成された第2の自然酸化膜44は、純度の高いガスの
反応で形成された酸化シリコン膜46よりも不純物を取
り込む確率が高く、キャパシタ絶縁膜の膜質の劣化をま
ねく。
Further, if the above-mentioned natural oxide film is present, the film quality of the capacitor insulating film may change, which may lead to deterioration of electric breakdown voltage and deterioration of reliability of the insulating film. In particular, as described above, the second natural oxide film 44 generated by the entrainment of the outside air into the CVD furnace has a higher probability of taking in impurities than the silicon oxide film 46 formed by the reaction of a highly pure gas, and thus the capacitor This causes deterioration of the film quality of the insulating film.

【0011】[0011]

【発明が解決しようとする課題】上記したように従来の
複合絶縁膜の形成方法は、下地との間に存在する自然酸
化膜が厚い状態で複合絶縁膜が形成されるので、絶縁膜
の膜質の劣化をまねき、複合絶縁膜をキャパシタ絶縁膜
として形成する場合には、薄膜化を大きく阻害し、電荷
蓄積量の低下を招き、電気的耐圧の劣化、絶縁膜の信頼
性の低下をまねくおそれがあるという問題があった。
As described above, according to the conventional method for forming a composite insulating film, since the composite insulating film is formed in a state where the natural oxide film existing between the base and the base is thick, the film quality of the insulating film is high. If a composite insulation film is formed as a capacitor insulation film, it will significantly hinder the thinning of the film, which will lead to a decrease in the amount of accumulated charge, which may result in deterioration of the electrical breakdown voltage and deterioration of the reliability of the insulation film. There was a problem that there is.

【0012】本発明は上記の問題点を解決すべくなされ
たもので、CVD窒化シリコン膜を最下層に有する二層
以上の絶縁膜からなる複合絶縁膜を形成する際、下地と
の間に存在する自然酸化膜を極力薄くした状態で形成で
き、複合絶縁膜をキャパシタ絶縁膜として形成する場合
には、薄膜化を実現し、電荷蓄積量を十分に確保し、絶
縁膜の膜質の劣化、電気的耐圧の劣化、絶縁膜の信頼性
の低下を防止し得る半導体装置の製造方法を提供するこ
とを目的とする。
The present invention has been made to solve the above problems, and is present between a base and a composite insulating film formed of two or more insulating films having a CVD silicon nitride film as the lowermost layer. The natural oxide film can be formed as thin as possible, and when the composite insulating film is formed as a capacitor insulating film, it can be made thinner, the charge storage amount can be secured sufficiently, the film quality of the insulating film deteriorates, and An object of the present invention is to provide a method for manufacturing a semiconductor device capable of preventing the deterioration of the withstand voltage and the reliability of the insulating film.

【0013】[0013]

【課題を解決するための手段】本発明の半導体装置の製
造方法は、半導体ウェハーの単結晶シリコン基板あるい
は不純物がドーピングされた多結晶シリコン膜上にCV
D窒化シリコン膜を最下層に有する二層以上の絶縁膜か
らなる複合絶縁膜を形成する際、ウェハー洗浄処理後、
ウェハー上の自然酸化膜を熱窒化により窒化物に変化さ
せ、ウェハー上にCVD窒化シリコン膜を形成し、その
表面を酸化して酸化シリコン膜を成長させることを特徴
とする。
According to a method of manufacturing a semiconductor device of the present invention, a CV is formed on a single crystal silicon substrate of a semiconductor wafer or a polycrystalline silicon film doped with impurities.
When forming a composite insulating film composed of two or more insulating films having a D silicon nitride film as the lowermost layer, after the wafer cleaning treatment,
The native oxide film on the wafer is converted into a nitride by thermal nitriding, a CVD silicon nitride film is formed on the wafer, and the surface is oxidized to grow the silicon oxide film.

【0014】[0014]

【作用】窒化シリコン膜を形成する前に、ウェハー上に
自然酸化膜が成長した状態でウェハーを急速熱窒化する
ことにより自然酸化膜を窒化物に変化させている。この
窒化物は、自然酸化膜よりも誘電率が高くなっており、
熱酸化膜に膜厚換算すると、実在する窒化シリコン膜の
約半分ほどの膜厚になる。しかも、窒化シリコン膜形成
前にウェハーを反応炉に入れる時に窒化物上に成長する
自然酸化膜は皆無に近い。
Before the silicon nitride film is formed, the natural oxide film is changed to the nitride by rapid thermal nitriding of the wafer with the natural oxide film grown on the wafer. This nitride has a higher dielectric constant than the native oxide film,
Converting the film thickness into a thermal oxide film, the film thickness is about half that of the existing silicon nitride film. Moreover, there is almost no natural oxide film that grows on the nitride when the wafer is placed in the reactor before the silicon nitride film is formed.

【0015】従って、下地との間に存在する自然酸化膜
を極力薄くした状態で複合絶縁膜を形成できる。また、
窒化シリコン膜形成前にウェハーを反応炉に入れる時に
窒化物上に成長する自然酸化膜は皆無に近いので、絶縁
膜の膜質の劣化、電気的耐圧の劣化、絶縁膜の信頼性の
低下を防ぐことができる。
Therefore, the composite insulating film can be formed in a state where the natural oxide film existing between the base and the substrate is made as thin as possible. Also,
Since there is almost no natural oxide film that grows on the nitride when the wafer is placed in the reaction furnace before forming the silicon nitride film, it prevents deterioration of the insulation film quality, electrical breakdown voltage, and insulation reliability. be able to.

【0016】[0016]

【実施例】以下、図面を参照して本発明方法の一実施例
を詳細に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the method of the present invention will be described in detail below with reference to the drawings.

【0017】図1(a)乃至(e)は、メモリセルのキ
ャパシタの絶縁膜として、CVD窒化シリコン膜を下層
に有する二層の絶縁膜からなる複合絶縁膜を形成する工
程の一例を示す断面図である。
FIGS. 1A to 1E are cross-sectional views showing an example of a process for forming a composite insulating film composed of two insulating films having a CVD silicon nitride film as a lower layer, as an insulating film of a memory cell capacitor. It is a figure.

【0018】図1(a)において、11は半導体ウェハ
ー(シリコン基板)、12はこのシリコン基板上に堆積
され、不純物がドーピングされた多結晶シリコン膜(キ
ャパシタの電荷蓄積層)である。
In FIG. 1A, 11 is a semiconductor wafer (silicon substrate), and 12 is a polycrystalline silicon film (charge storage layer of a capacitor) deposited on this silicon substrate and doped with impurities.

【0019】この多結晶シリコン膜12を下地として窒
化シリコン膜を形成する直前に、化学薬品(例えば、塩
酸と過酸化水素を含む溶液など)にウェハーを浸すこと
により不純物を除去するウェハー洗浄処理を行う。この
場合、ウェハーの水洗時に、図1(b)に示すように、
前記多結晶シリコン膜上に1nm程度の自然酸化膜13
が成長する。
Immediately before forming a silicon nitride film using this polycrystalline silicon film 12 as a base, a wafer cleaning process is carried out to remove impurities by immersing the wafer in a chemical (eg, a solution containing hydrochloric acid and hydrogen peroxide). To do. In this case, when the wafer is washed with water, as shown in FIG.
A natural oxide film 13 having a thickness of about 1 nm is formed on the polycrystalline silicon film.
Grows.

【0020】この後、ウェハーを反応炉に入れ、ランプ
アニール法によりほぼ1200℃に急速に加熱し、アン
モニアガスを10秒程度流すことにより、アンモニアガ
スと前記自然酸化膜13とを反応させる。これにより、
図1(c)に示すように、前記多結晶シリコン膜上に窒
化物(ポリオキシナイトライドとポリナイトライドとか
らなるものと考えられる。)14が形成される。
After that, the wafer is put into a reaction furnace, heated rapidly to about 1200 ° C. by a lamp annealing method, and ammonia gas is caused to flow for about 10 seconds to react the ammonia gas with the natural oxide film 13. This allows
As shown in FIG. 1C, a nitride (which is considered to be composed of polyoxynitride and polynitride) 14 is formed on the polycrystalline silicon film.

【0021】この後、再びウェハー洗浄処理を行い、ウ
ェハーを窒化シリコン膜形成用の反応炉に入れる。この
際、ウェハーを熱処理炉に入れる時の炉内温度は700
℃付近の低温に保たれているので、前記窒化物上に成長
する自然酸化膜は皆無に近い。そして、堆積膜の膜厚の
均一性を良くするために例えばジクロルシランガスとア
ンモニアガスとの反応を用いる減圧CVD法により、図
1(d)に示すように、CVD窒化シリコン膜15を形
成する。
After that, the wafer cleaning process is performed again, and the wafer is placed in a reaction furnace for forming a silicon nitride film. At this time, when the wafer is put in the heat treatment furnace, the temperature in the furnace is 700.
Since it is kept at a low temperature of around ℃, there is almost no natural oxide film grown on the nitride. Then, in order to improve the uniformity of the thickness of the deposited film, a CVD silicon nitride film 15 is formed as shown in FIG. 1D by a low pressure CVD method using a reaction of dichlorosilane gas and ammonia gas, for example. ..

【0022】次に、ウェハーを熱処理炉内の800℃〜
950℃に保たれた酸化雰囲気中に入れ、図1(e)に
示すように、窒化シリコン膜15の表面に酸化シリコン
膜16を酸化成長させ、二層構造の複合絶縁膜17を形
成する。この後、上記複合絶縁膜17上に多結晶シリコ
ン膜からなるキャパシタプレート電極18を形成するこ
とにより、二層絶縁膜17を電極間絶縁に用いたキャパ
シタの形成を完了する。
Next, the wafer is heated at 800 ° C. in a heat treatment furnace.
It is placed in an oxidizing atmosphere maintained at 950 ° C., and as shown in FIG. 1E, the silicon oxide film 16 is oxidatively grown on the surface of the silicon nitride film 15 to form a composite insulating film 17 having a two-layer structure. After that, a capacitor plate electrode 18 made of a polycrystalline silicon film is formed on the composite insulating film 17 to complete the formation of a capacitor using the two-layer insulating film 17 for interelectrode insulation.

【0023】図2は、上記実施例より形成した二層絶縁
膜(不純物がドーピングされた多結晶シリコン膜を下地
に用いた場合)および上記実施例とほぼ同様な方法によ
り例えば1015atos/cm3 以上の不純物を含む単結晶シ
リコン基板上に形成した二層絶縁膜(シリコン基板を下
地に用いた場合)について、それぞれの膜厚の測定結果
を示している。
FIG. 2 shows a two-layer insulating film (when an impurity-doped polycrystalline silicon film is used as a base) formed in the above embodiment and a method similar to that in the above embodiment, for example, 10 15 atos / cm 2. 3 The measurement results of the respective film thicknesses of the two-layer insulating film (when the silicon substrate is used as the base) formed on the single crystal silicon substrate containing the above impurities are shown.

【0024】さらに、比較のため、従来例の方法により
形成した二層絶縁膜(但し、CVD窒化シリコン膜の厚
さは上記実施例の場合と同じとする。)の膜厚の測定結
果を、不純物がドーピングされた多結晶シリコン膜を下
地に用いた場合とシリコン基板を下地に用いた場合とに
ついて示している。
Further, for comparison, the measurement result of the film thickness of the two-layer insulating film formed by the method of the conventional example (however, the thickness of the CVD silicon nitride film is the same as that in the above-mentioned embodiment) is shown as follows. It shows a case where a polycrystalline silicon film doped with impurities is used as a base and a case where a silicon substrate is used as a base.

【0025】ここで分かるように、シリコン基板を下地
に用いた二層絶縁膜は、上記実施例の方法により形成し
た場合の方が従来例の方法により形成した場合よりも膜
厚が4オングストロームだけ薄くなっている。これに対
して、多結晶シリコン膜を下地に用いた二層絶縁膜は、
上記実施例の方法により形成した場合の方が従来の方法
により形成した場合よりも膜厚が15オングストローム
も薄くなっている。
As can be seen, the two-layer insulating film using the silicon substrate as a base has a film thickness of 4 angstroms when formed by the method of the above-described embodiment than when formed by the method of the conventional example. It is thin. On the other hand, a two-layer insulating film using a polycrystalline silicon film as a base,
The thickness of the film formed by the method of the above embodiment is 15 angstroms thinner than that formed by the conventional method.

【0026】図3は、上記実施例の方法により形成した
二層絶縁膜を電極間絶縁に用いたキャパシタと従来例の
方法により形成した二層絶縁膜を電極間絶縁に用いたキ
ャパシタとについて、それぞれのTDDB(Time Depen
dent Dielectric Breakdown)の測定結果を示してい
る。この場合、1枚のウェハーに約62チップの領域を
形成し、キャパシタ電極間に11MV/cmの電圧スト
レスを印加した。
FIG. 3 shows a capacitor using the two-layer insulating film formed by the method of the above embodiment for inter-electrode insulation and a capacitor using the two-layer insulating film formed by the method of the conventional example for inter-electrode insulation. Each TDDB (Time Depen
dent Dielectric Breakdown) measurement results. In this case, a region of about 62 chips was formed on one wafer, and a voltage stress of 11 MV / cm was applied between the capacitor electrodes.

【0027】ここで分かるように、上記実施例の方法を
用いて形成したキャパシタは、従来例の方法を用いて形
成したキャパシタよりも、偶発不良の発生が極めて減少
しており、磨耗不良についても減少しており、長寿命に
なる。
As can be seen here, the capacitor formed by the method of the above-mentioned embodiment has a much smaller occurrence of accidental defects than the capacitor formed by the method of the conventional example, and also has a poor wear. It has decreased and has a long life.

【0028】即ち、上記実施例の方法によれば、窒化シ
リコン膜を形成する前に、ウェハー上に自然酸化膜が成
長した状態でウェハーを急速熱窒化することにより自然
酸化膜を窒化物に変化させている。この窒化物は、自然
酸化膜よりも誘電率が高くなっており、熱酸化膜に膜厚
換算すると、実在する窒化シリコン膜の約半分ほどの膜
厚になる。しかも、窒化シリコン膜形成前にウェハーを
反応炉に入れる時に窒化物上に成長する自然酸化膜は皆
無に近い。
That is, according to the method of the above-described embodiment, the natural oxide film is changed into the nitride by rapid thermal nitriding of the wafer with the natural oxide film grown on the wafer before forming the silicon nitride film. I am letting you. This nitride has a higher dielectric constant than the natural oxide film, and when converted into a film thickness of a thermal oxide film, the film thickness is about half that of an existing silicon nitride film. Moreover, there is almost no natural oxide film that grows on the nitride when the wafer is placed in the reaction furnace before the silicon nitride film is formed.

【0029】従って、下地との間に存在する自然酸化膜
を極力薄くした状態で二層絶縁膜を形成できる。この場
合、図2から分かるように、二層絶縁膜の下地となる基
板材料は、シリコン基板よりも、不純物がドーピングさ
れた多結晶シリコン膜の方が絶縁膜の薄膜化の効果が顕
著になる。
Therefore, the two-layer insulating film can be formed in a state where the natural oxide film existing between the base and the base is made as thin as possible. In this case, as can be seen from FIG. 2, the polycrystalline silicon film doped with impurities is more effective as a substrate material for the underlayer of the two-layer insulating film than the silicon substrate. ..

【0030】また、窒化シリコン膜形成前にウェハーを
反応炉に入れる時に窒化物上に成長する自然酸化膜は皆
無に近いので、絶縁膜の膜質の劣化、電気的耐圧の劣
化、絶縁膜の信頼性の低下を防ぐことができる。なお、
本発明は、上記実施例に限らず、CVD窒化シリコン膜
を最下層に有する二層以上の絶縁膜からなる複合絶縁膜
を形成する場合にも適用可能である。
Also, since there is almost no natural oxide film that grows on the nitride when the wafer is placed in the reaction furnace before the formation of the silicon nitride film, the quality of the insulating film is deteriorated, the electrical breakdown voltage is deteriorated, and the reliability of the insulating film is improved. Sexual deterioration can be prevented. In addition,
The present invention is not limited to the above-described embodiments, but can be applied to the case of forming a composite insulating film including two or more insulating films having a CVD silicon nitride film as the lowermost layer.

【0031】[0031]

【発明の効果】上述したように本発明の半導体装置の製
造方法によれば、CVD窒化シリコン膜を最下層に有す
る二層以上の絶縁膜からなる複合絶縁膜を形成する際、
下地との間に存在する自然酸化膜を極力薄くした状態で
形成でき、複合絶縁膜をキャパシタ絶縁膜として形成す
る場合には、薄膜化を実現し、電荷蓄積量を十分に確保
し、電気的耐圧の劣化、絶縁膜の信頼性の低下を防止す
ることができる。
As described above, according to the method of manufacturing a semiconductor device of the present invention, when a composite insulating film composed of two or more insulating films having a CVD silicon nitride film as the lowermost layer is formed,
The natural oxide film that exists between the base and the base can be formed as thin as possible, and when the composite insulating film is formed as the capacitor insulating film, it is possible to reduce the thickness and ensure a sufficient amount of charge storage to ensure electrical conductivity. It is possible to prevent deterioration of breakdown voltage and deterioration of reliability of the insulating film.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の半導体装置の製造方法の一実施例に係
るキャパシタ絶縁膜用の二層絶縁膜を形成する工程の一
例を示す断面図。
FIG. 1 is a cross-sectional view showing an example of a step of forming a two-layer insulating film for a capacitor insulating film according to an embodiment of the method for manufacturing a semiconductor device of the present invention.

【図2】図1の方法により形成した二層絶縁膜の膜厚と
従来例の方法により形成した二層絶縁膜の膜厚の測定結
果を示す図。
FIG. 2 is a diagram showing the measurement results of the film thickness of a two-layer insulating film formed by the method of FIG. 1 and the film thickness of a two-layer insulating film formed by the conventional method.

【図3】図1の方法により形成した二層絶縁膜を電極間
絶縁に用いたキャパシタと従来例の方法により形成した
二層絶縁膜を電極間絶縁に用いたキャパシタとについて
TDDBの測定結果を示す図。
FIG. 3 shows TDDB measurement results of a capacitor using a two-layer insulating film formed by the method of FIG. 1 for inter-electrode insulation and a capacitor using a two-layer insulating film formed by a conventional method for inter-electrode insulation. FIG.

【図4】従来のキャパシタ絶縁膜用の複合絶縁膜を形成
する工程を示す断面図。
FIG. 4 is a cross-sectional view showing a process of forming a conventional composite insulating film for a capacitor insulating film.

【符号の説明】[Explanation of symbols]

11…半導体ウェハー、12…不純物がドーピングされ
た多結晶シリコン膜(キャパシタの電荷蓄積層)、13
…自然酸化膜、14…窒化物、15…CVD窒化シリコ
ン膜、16…酸化シリコン膜、17…二層絶縁膜、18
…キャパシタプレート電極(多結晶シリコン膜)。
11 ... Semiconductor wafer, 12 ... Impurity-doped polycrystalline silicon film (charge storage layer of capacitor), 13
... natural oxide film, 14 ... nitride, 15 ... CVD silicon nitride film, 16 ... silicon oxide film, 17 ... two-layer insulating film, 18
... Capacitor plate electrode (polycrystalline silicon film).

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 半導体ウェハーの単結晶シリコン基板あ
るいは不純物がドーピングされた多結晶シリコン膜上
に、CVD窒化シリコン膜を最下層に有する二層以上の
絶縁膜からなる複合絶縁膜を形成する際、 上記ウェハーを洗浄する工程と、 この工程により洗浄されたウェハー上の自然酸化膜を熱
窒化して窒化物に変化させる工程と、 上記窒化物上にCVD窒化シリコン膜を形成する工程
と、 上記CVD窒化シリコン膜の表面を酸化して酸化シリコ
ン膜を成長させる工程とを具備することを特徴とする半
導体装置の製造方法。
1. When forming a composite insulating film composed of two or more insulating films having a CVD silicon nitride film as a lowermost layer on a single crystal silicon substrate of a semiconductor wafer or a polycrystalline silicon film doped with impurities, The step of cleaning the wafer, the step of thermally nitriding the natural oxide film on the wafer cleaned by this step to convert it into a nitride, the step of forming a CVD silicon nitride film on the nitride, the CVD And a step of growing the silicon oxide film by oxidizing the surface of the silicon nitride film.
【請求項2】 請求項1記載の半導体装置の製造方法に
おいて、前記熱窒化を行う際に、前記ウェハーをほぼ1
200℃に急速に加熱し、アンモニアガスと前記自然酸
化膜とを反応させることを特徴とする半導体装置の製造
方法。
2. The method of manufacturing a semiconductor device according to claim 1, wherein when the thermal nitriding is performed, the wafer is almost 1
A method of manufacturing a semiconductor device, which comprises rapidly heating to 200 ° C. to react ammonia gas with the natural oxide film.
【請求項3】 請求項1記載の半導体装置の製造方法に
おいて、前記複合絶縁膜をメモリセルのキャパシタの電
極間絶縁に用いることを特徴とする半導体装置の製造方
法。
3. The method of manufacturing a semiconductor device according to claim 1, wherein the composite insulating film is used for insulating between electrodes of a capacitor of a memory cell.
JP3476692A 1992-02-21 1992-02-21 Manufacture of semiconductor device Pending JPH05235265A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3476692A JPH05235265A (en) 1992-02-21 1992-02-21 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3476692A JPH05235265A (en) 1992-02-21 1992-02-21 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH05235265A true JPH05235265A (en) 1993-09-10

Family

ID=12423434

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3476692A Pending JPH05235265A (en) 1992-02-21 1992-02-21 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH05235265A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5838056A (en) * 1994-05-27 1998-11-17 Kabushiki Kaisha Toshiba Semiconductor device applied to composite insulative film and manufacturing method thereof
US8491056B2 (en) 2011-04-01 2013-07-23 Kevin Charles Furniture, Llc Cushion
EP3002779A2 (en) 2014-09-30 2016-04-06 Renesas Electronics Corporation Method of manufacturing semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5838056A (en) * 1994-05-27 1998-11-17 Kabushiki Kaisha Toshiba Semiconductor device applied to composite insulative film and manufacturing method thereof
US8491056B2 (en) 2011-04-01 2013-07-23 Kevin Charles Furniture, Llc Cushion
EP3002779A2 (en) 2014-09-30 2016-04-06 Renesas Electronics Corporation Method of manufacturing semiconductor device
US9508554B2 (en) 2014-09-30 2016-11-29 Renesas Electronics Corporation Method of manufacturing semiconductor device

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