JPH05235261A - Surface-mounting type hybrid integrated circuit device - Google Patents

Surface-mounting type hybrid integrated circuit device

Info

Publication number
JPH05235261A
JPH05235261A JP4033627A JP3362792A JPH05235261A JP H05235261 A JPH05235261 A JP H05235261A JP 4033627 A JP4033627 A JP 4033627A JP 3362792 A JP3362792 A JP 3362792A JP H05235261 A JPH05235261 A JP H05235261A
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
circuit device
mounting
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4033627A
Other languages
Japanese (ja)
Inventor
Katsuaki Yanagisawa
克明 柳沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4033627A priority Critical patent/JPH05235261A/en
Publication of JPH05235261A publication Critical patent/JPH05235261A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

PURPOSE:To allow mounting with good positional accuracy and low-priced manufacture also in aspect of the cost at the time of mounting a hybrid integrated circuit device on a printed wiring board in the surface mounting type hybrid integrated circuit device. CONSTITUTION:This surface-mounting type hybrid integrated circuit device has a structural body 14 having a flat surface allowing surface mounting so as to make it possible to adsorb by means of an adsorbing nozzle of a loading machine at the time of automatic surface mounting of this hybrid integrated circuit device on a printed wiring board together with mounting a minimold transistor 12 and a laminated ceramic chip capacitor 13 on a hybrid integrated circuit board 11.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電子部品が搭載された
混成集積回路装置に関し、特に表面実装型混成集積回路
装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit device having electronic components mounted thereon, and more particularly to a surface mount type hybrid integrated circuit device.

【0002】[0002]

【従来の技術】近年、電子部品の表面実装化が進むにつ
れて、混成集積回路装置にも表面実装対応の要求が強ま
ってきており、種々の表面実装型混成集積回路装置が開
発されてきた。
2. Description of the Related Art In recent years, as surface mounting of electronic parts has progressed, there has been an increasing demand for surface mounting compatible hybrid integrated circuit devices, and various surface mounting type hybrid integrated circuit devices have been developed.

【0003】例えば従来の構造の例としては、図4に示
すように厚膜セラミック回路基板11上に積層セラミッ
クチップコンデンサ13、及びミニモールドトランジス
タ12等の電子部品を搭載し、リード端子15を前記厚
膜セラミック回路基板11に取り付け、装置のプリント
基板に実装する際に吸着ノズルで吸着できるように全体
をケース16にて覆い、ケース内に樹脂17を充填した
構造のものがある。
For example, as an example of a conventional structure, as shown in FIG. 4, electronic components such as a multilayer ceramic chip capacitor 13 and a mini mold transistor 12 are mounted on a thick film ceramic circuit board 11, and lead terminals 15 are formed as described above. There is a structure in which the case 16 is entirely attached to the thick film ceramic circuit board 11 so that it can be adsorbed by an adsorption nozzle when it is mounted on a printed circuit board of an apparatus, and a resin 17 is filled in the case.

【0004】また図5に示すように、厚膜セラミック回
路基板11上にミニモールドトランジスタ12及び積層
セラミックチップコンデンサ13を搭載し、リード端子
15を前記基板11に取り付けた後、装置のプリント配
線基板に実装する際に他の表面実装用部品と同様に表面
をノズルで吸着できるように厚膜セラミック回路基板1
1に樹脂枠18を付着させ、樹脂枠18内に樹脂17を
注入し、上面を平坦にした構造のものがある。
Further, as shown in FIG. 5, a mini-mold transistor 12 and a laminated ceramic chip capacitor 13 are mounted on a thick film ceramic circuit board 11, and lead terminals 15 are attached to the board 11, and then a printed wiring board of the device is mounted. Thick film ceramic circuit board 1 so that the surface can be adsorbed by the nozzle in the same way as other surface mounting parts when mounted on
There is a structure in which a resin frame 18 is attached to the resin 1, the resin 17 is injected into the resin frame 18, and the upper surface is flattened.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、以上の
ような構造の混成集積回路装置では、例えばケース構造
のものである場合に、プリント基板に実装する際、ケー
スと内部の配線基板との間で、ケース内に基板を入れる
際、ある程度余裕を持たすため、その分がガタとなり、
ケースと基板の相対位置精度が悪くなり、ケース外形に
合わせて自動搭載する場合には、位置ズレを起こし易い
という問題があり、かつ、ケースを被せ、樹脂を注入す
るという工法も、コスト面では決して有利とはいえなか
った。
However, in the hybrid integrated circuit device having the above structure, for example, in the case of a case structure, when the device is mounted on a printed circuit board, a space is provided between the case and the internal wiring board. , When you put the board in the case, there is some margin, so that part becomes loose,
The relative positional accuracy of the case and the board deteriorates, and when automatically mounting according to the outer shape of the case, there is a problem that the position is likely to be displaced, and the method of covering the case and injecting the resin is also costly. It was by no means an advantage.

【0006】図5の樹脂枠構造のものは、プリント基板
にノズルで吸着して自動実装を行う場合、樹脂表面の凹
み,うねりのため平坦性が悪く、吸着エラーを生じ易い
という問題があった。又、この場合も、樹脂枠を基板に
吸着する工程などを含むため、コスト面で決して有利で
あるとはいえなかった。
The resin frame structure shown in FIG. 5 has a problem that when the nozzle is sucked onto the printed circuit board for automatic mounting, the flatness is poor due to dents and undulations on the resin surface, and a suction error easily occurs. .. Also in this case, since it includes a step of adsorbing the resin frame on the substrate, it cannot be said that it is advantageous in terms of cost.

【0007】本発明の目的は、プリント基板への実装性
とコスト面とを解決した表面実装型混成集積回路装置を
提供することにある。
An object of the present invention is to provide a surface-mounting type hybrid integrated circuit device which solves the mountability on a printed board and the cost.

【0008】[0008]

【課題を解決するための手段】前記目的を達成するた
め、本発明に係る表面実装型混成集積回路装置は、配線
基板に電子部品を搭載した表面実装型混成集積回路装置
において、前記配線基板に、上面が平坦である搭載部品
を有するものである。
In order to achieve the above object, a surface mount type hybrid integrated circuit device according to the present invention is a surface mount type hybrid integrated circuit device in which electronic parts are mounted on a wiring board. , Having a mounting part having a flat upper surface.

【0009】また、前記上面が平坦である搭載部品は、
前記表面実装型混成集積回路装置の配線基板上に表面実
装しうる構造体としたものである。
Further, the mounted parts having the flat upper surface are
A structure that can be surface-mounted on the wiring board of the surface-mount type hybrid integrated circuit device.

【0010】また、前記配線基板上に表面実装しうる構
造体は、電子部品としたものである。
The structure that can be surface-mounted on the wiring board is an electronic component.

【0011】また、前記配線基板上に表面実装しうる構
造体は、電子部品等を覆う構造のものとして構成された
ものである。
The structure that can be surface-mounted on the wiring board is configured to cover electronic components and the like.

【0012】[0012]

【作用】配線基板の中央部に搭載部品を備え、該搭載部
品の上面を平坦としたものである。
The mounting part is provided at the center of the wiring board, and the top surface of the mounting part is flat.

【0013】[0013]

【実施例】次に本発明について図面を参照して説明す
る。
The present invention will be described below with reference to the drawings.

【0014】(実施例1)図1は、本発明の実施例1に
係る表面実装型混成集積回路装置を示す断面図である。
(Embodiment 1) FIG. 1 is a sectional view showing a surface mount type hybrid integrated circuit device according to Embodiment 1 of the present invention.

【0015】図1において、本実施例に係る表面実装型
混成集積回路装置を製造するにあたっては、まず厚膜セ
ラミック回路基板11の裏面の部品搭載ランドに高融点
ハンダクリーム(Su 96.5%,Ag 3.5%)
をスクリーン印刷にて供給し、ミニモールドトランジス
タ12及び積層セラミックチップコンデンサ13を搭載
し、リフロー法により溶融接合する。
Referring to FIG. 1, in manufacturing the surface mount type hybrid integrated circuit device according to this embodiment, first, a high melting point solder cream (Su 96.5%, Su 96.5%, Ag 3.5%)
Is supplied by screen printing, the mini-mold transistor 12 and the multilayer ceramic chip capacitor 13 are mounted, and fusion bonding is performed by the reflow method.

【0016】次に、同様に表面の部品搭載ランド部に高
融点ハンダクリームを供給し、自動搭載機にて裏面と同
様にミニモールドトランジスタ12,積層セラミックチ
ップコンデンサ13を搭載する。
Next, similarly, a high melting point solder cream is supplied to the component mounting land on the front surface, and the mini mold transistor 12 and the multilayer ceramic chip capacitor 13 are mounted by the automatic mounting machine in the same manner as on the back surface.

【0017】その際同時に、本発明の特徴である上面が
平坦な直径7mmφ,高さ1.5mmのAlの円筒状構
造体14を搭載機の吸着ノズルにて吸着して、これを前
記基板11の中央部に自動搭載し、リフロー法にてハン
ダ溶融接合する。
At the same time, the cylindrical structure 14 of Al having a flat upper surface of 7 mmφ and a height of 1.5 mm, which is a feature of the present invention, is adsorbed by an adsorption nozzle of a mounting machine, and the substrate 11 is adsorbed. It is automatically mounted in the central part of and soldered by the reflow method.

【0018】その後、表面実装を可能とするために、リ
ード端子15をハンダディップ法にて基板11に取付
け、リード成形を行う。
After that, in order to enable surface mounting, the lead terminals 15 are attached to the substrate 11 by the solder dipping method and lead molding is performed.

【0019】(実施例2)図2は、本発明の実施例2を
示す断面図である。
(Second Embodiment) FIG. 2 is a sectional view showing a second embodiment of the present invention.

【0020】図2において、厚膜セラミック回路基板1
1の表面と裏面にミニモールドトランジスタ12及び積
層セラミックチップコンデンサ13が搭載され、ハンダ
接合されている。
In FIG. 2, the thick film ceramic circuit board 1
A mini mold transistor 12 and a monolithic ceramic chip capacitor 13 are mounted on the front surface and the back surface of 1 and solder-bonded.

【0021】さらに、基板11の表面の中央部に本発明
の特徴である64ピンのQFP型IC19が搭載されて
いる。ここに、QFP型IC19は、上面が平坦であ
り、搭載機の吸着ノズルで吸着が可能となるようになっ
ている。
Further, a 64-pin QFP type IC 19, which is a feature of the present invention, is mounted on the central portion of the surface of the substrate 11. Here, the QFP type IC 19 has a flat upper surface and can be sucked by a suction nozzle of a mounting machine.

【0022】(実施例3)図3は、本発明の実施例3を
示す断面図である。
(Embodiment 3) FIG. 3 is a sectional view showing Embodiment 3 of the present invention.

【0023】図3において、厚膜セラミック回路基板1
1上にミニモールドトランジスタ12,積層セラミック
チップコンデンサ13を搭載する。さらに前記基板11
の中央部に本発明の特徴である構造体20を搭載する。
構造体20は、上面が平坦であり、かつその大きさが2
0mm□であり、高さが2mm、その支柱部が4mmφ
であり、その材質が鉄などの金属製からなり、その上面
部分でミニモールドトランジスタ12及び積層セラミッ
クチップコンデンサ13を覆う状態で取付けられてい
る。
In FIG. 3, the thick film ceramic circuit board 1
A mini-molded transistor 12 and a monolithic ceramic chip capacitor 13 are mounted on the device 1. Further, the substrate 11
The structure 20, which is a feature of the present invention, is mounted in the central portion of the.
The structure 20 has a flat upper surface and a size of 2
It is 0 mm □, the height is 2 mm, and the supporting column is 4 mmφ
The material is made of metal such as iron, and the mini-mold transistor 12 and the monolithic ceramic chip capacitor 13 are attached with the upper surface portion thereof.

【0024】以上3つの実施例では、基板中央部に本発
明の特徴である搭載部品(Alの円筒状構造体14,Q
FP型IC19,金属製構造体20等)を搭載したが、
これは、実際に本発明の混成集積回路装置を前記搭載部
品の上面を搭載機の吸着ノズルで吸着してプリント回路
基板に搭載する際に、混成集積回路装置のバランスがく
ずれない範囲の位置ならば、多少中央部から外れた範囲
でも良い。
In the above three embodiments, the mounting parts (the cylindrical structures 14 and Q of Al, which are the features of the present invention, are provided in the central portion of the substrate.
FP type IC19, metal structure 20, etc.
This is because if the hybrid integrated circuit device of the present invention is actually mounted on a printed circuit board by sucking the upper surface of the mounting component with a suction nozzle of a mounting machine, the position is within a range where the balance of the hybrid integrated circuit device is not lost. For example, the range may be slightly off the center.

【0025】また、上記3つの実施例では、特に混成集
積回路装置に外装してはいないが、本発明の特徴である
基板中央部の平坦性が保てれば、樹脂外装を行なっても
構わない。
Further, although the hybrid integrated circuit device is not particularly packaged in the above-mentioned three embodiments, resin packaging may be carried out as long as the flatness of the central portion of the substrate, which is a feature of the present invention, can be maintained.

【0026】[0026]

【発明の効果】以上説明したように本発明による表面実
装型混成集積回路装置は、表面に、上面が平坦な表面実
装可能な搭載部品を有しているため、プリント基板に本
発明の混成集積回路装置を実装する際、他の電子部品と
同様に吸着ノズルで同時に搭載ができるばかりでなく、
ケース構造のもののようにケースと内部の基板の位置精
度の誤差がないため、その分実装精度も向上し、位置ズ
レ不良が減少し、又、樹脂枠構造のものより表面の平坦
性にもすぐれているため、吸着ミスが全くなくなる。さ
らに、請求項4によれば、搭載部品により電子部品が覆
われるため、シールド効果が得られる。
As described above, since the surface-mounting type hybrid integrated circuit device according to the present invention has the surface mountable mounting component having a flat upper surface on the surface thereof, the hybrid integration of the present invention on the printed circuit board. When mounting the circuit device, not only can it be mounted at the same time with the suction nozzle as with other electronic components,
Unlike the case structure, there is no difference in the positional accuracy between the case and the internal board, so the mounting accuracy is improved, the misalignment is reduced, and the surface flatness is superior to that of the resin frame structure. Therefore, there is no adsorption error. Furthermore, according to the fourth aspect, since the electronic component is covered by the mounted component, the shield effect can be obtained.

【0027】また、本発明によれば、本発明の混成集積
回路装置を使用する場合及び製造する場合に、品質面,
コスト面,特性面でかなりの効果が得られる。例えば、
製造コストを従来のケース型のものと比較すると、加工
費で5〜10%は低減される。
Further, according to the present invention, when using and manufacturing the hybrid integrated circuit device of the present invention,
Significant effects can be obtained in terms of cost and characteristics. For example,
Comparing the manufacturing cost with the conventional case type, the processing cost is reduced by 5-10%.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例1を示す断面図である。FIG. 1 is a cross-sectional view showing a first embodiment of the present invention.

【図2】本発明の実施例2を示す断面図である。FIG. 2 is a sectional view showing a second embodiment of the present invention.

【図3】本発明の実施例3を示す断面図である。FIG. 3 is a sectional view showing a third embodiment of the present invention.

【図4】従来例を示す断面図である。FIG. 4 is a cross-sectional view showing a conventional example.

【図5】従来例を示す断面図である。FIG. 5 is a cross-sectional view showing a conventional example.

【符号の説明】[Explanation of symbols]

11 厚膜セラミック回路基板 12 ミニモールドトランジスタ 13 積層セラミックチップコンデンサ 14 Al円筒状構造体 15 リード端子 19 QFP型IC 20 金属製構造体 11 Thick Film Ceramic Circuit Board 12 Mini Molded Transistor 13 Multilayer Ceramic Chip Capacitor 14 Al Cylindrical Structure 15 Lead Terminal 19 QFP Type IC 20 Metal Structure

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 配線基板に電子部品を搭載した表面実装
型混成集積回路装置において、 前記配線基板に、上面が平坦である搭載部品を有するこ
とを特徴とする表面実装型混成集積回路装置。
1. A surface-mount type hybrid integrated circuit device in which electronic components are mounted on a wiring board, wherein the wiring board has a mounting component having a flat upper surface.
【請求項2】 前記上面が平坦である搭載部品は、前記
表面実装型混成集積回路装置の配線基板上に表面実装し
うる構造体としたものであることを特徴とする請求項1
に記載の表面実装型混成集積回路装置。
2. The mounting component having a flat upper surface is a structure that can be surface-mounted on a wiring board of the surface-mounting hybrid integrated circuit device.
The surface-mounted hybrid integrated circuit device according to 1.
【請求項3】 請求項2に記載される前記配線基板上に
表面実装しうる構造体は、電子部品としたものであるこ
とを特徴とする表面実装型混成集積回路装置。
3. The surface mount type hybrid integrated circuit device according to claim 2, wherein the surface mountable structure on the wiring board is an electronic component.
【請求項4】 請求項2に記載される前記配線基板上に
表面実装しうる構造体は、電子部品等を覆う構造のもの
として構成されたものであることを特徴とする表面実装
型混成集積回路装置。
4. The surface mount type hybrid integrated structure according to claim 2, wherein the structure body which can be surface mounted on the wiring board is configured to cover an electronic component or the like. Circuit device.
JP4033627A 1992-02-20 1992-02-20 Surface-mounting type hybrid integrated circuit device Pending JPH05235261A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4033627A JPH05235261A (en) 1992-02-20 1992-02-20 Surface-mounting type hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4033627A JPH05235261A (en) 1992-02-20 1992-02-20 Surface-mounting type hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPH05235261A true JPH05235261A (en) 1993-09-10

Family

ID=12391687

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4033627A Pending JPH05235261A (en) 1992-02-20 1992-02-20 Surface-mounting type hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPH05235261A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6876555B2 (en) 2000-04-12 2005-04-05 Murata Manufacturing Co., Ltd. Surface-mount type switching power-supply unit and mounting method for the same
JP2008091763A (en) * 2006-10-04 2008-04-17 Mitsubishi Electric Corp Semiconductor device, manufacturing method thereof, and manufacturing method of mounting substrate

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5828889A (en) * 1981-08-14 1983-02-19 株式会社日立製作所 Hybrid integrated circuit board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5828889A (en) * 1981-08-14 1983-02-19 株式会社日立製作所 Hybrid integrated circuit board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6876555B2 (en) 2000-04-12 2005-04-05 Murata Manufacturing Co., Ltd. Surface-mount type switching power-supply unit and mounting method for the same
JP2008091763A (en) * 2006-10-04 2008-04-17 Mitsubishi Electric Corp Semiconductor device, manufacturing method thereof, and manufacturing method of mounting substrate

Similar Documents

Publication Publication Date Title
US5726612A (en) Chip-type electronic component
JPH05235261A (en) Surface-mounting type hybrid integrated circuit device
JPH10256412A (en) Semiconductor device and manufacture thereof
JPH03187253A (en) Semiconductor device
JP3346485B2 (en) Electronic component and its mounting method
JPH04147660A (en) Package of electronic component and mounting structure thereof
KR910000018B1 (en) Semiconductor device using the lead-frame and method of manufacture there of
JPH02268490A (en) Printed board having storing section
JP2500610B2 (en) Semiconductor device
JPH03257990A (en) Mounting method for hybrid integrated circuit board
JP2536724B2 (en) Mounting structure of leadframe type magnetoresistive sensor
JP2523606Y2 (en) Chip type capacitors
JPH0458189B2 (en)
JPH06176927A (en) Chip-type electronic component
JPH0642377Y2 (en) Hybrid integrated circuit package
JPS6350841Y2 (en)
JP2592027Y2 (en) Hybrid integrated circuit components
JP2891254B2 (en) Electronic components for surface mounting
JPH05235490A (en) Hybrid integrated circuit device
JP3026469U (en) Chip parts
JP2002217351A (en) Surface-mounting type compound function component
JPS6218052Y2 (en)
JPS62219686A (en) Electric circuit
JPH0577944U (en) Crystal oscillator
JPH0345621U (en)