JPH05234993A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent a short circuit due to peeling of deposited substance at the time of etching or insufficient etching without reducing a processing accuracy when an unnecessary part of a metal film for an electrode is removed by etching with a metal-plated film as a mask after plating is finished in the formation of metal wiring by a plating method. CONSTITUTION:After unnecessary parts of a gold film 4 and a TiW film 3 are just etched by magnetron reactive ion etching advantageous at a point of miniaturization after plating is finished, a polyimide film 2 is etched by chemical ion etching.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device using a metal plating film as a wiring material.

[0002]

2. Description of the Related Art A conventional method of forming metal wiring on a semiconductor substrate by plating will be described with reference to FIG.

First, an insulating film 2A is formed on a semiconductor substrate 1 made of silicon or the like, and then a titanium or titanium tungsten (TiW) film 3 is formed as a barrier and a metal for adhesion by a sputtering method or the like, followed by power supply and plating. The metal film 4A made of gold or copper is formed so that the process can be performed easily. Next, a photoresist process is used to form a photoresist pattern at a location other than where the wiring is to be formed. After that, by applying a negative voltage so that a constant current flows through the substrate in the plating solution, a metal such as gold or copper, which is a positive ion in the solution, is deposited on a portion other than the photoresist pattern to obtain a desired voltage. It is calculated that the metal plating film 6A will be etched in a later step, and the metal plating film 6A is formed to be slightly thicker.

Next, after the photoresist pattern is stripped off, only the magnetron reactive ion etching with good processing accuracy or 1 is performed using the metal plating film 6A as a mask.
Partial wet etching is used to etch away the metal film 4A and the TiW film 3 to form metal wiring mainly composed of the metal plating film 6A. At this time, the lower insulating film 2A is partially etched.

[0005]

However, in the conventional method of forming a metal wiring by the plating method, when the metal film and the TiW film are etched using only magnetron reactive ion etching, the overetching rate is 20 to 30%. If it is below, etching shortage of the TiW film as a barrier film and short-circuit defects due to surface alteration of the underlying insulating film are likely to occur in a place where the wiring interval is narrow. Further, when the over-etching rate is 30 to 40% or more and the organic coating film is used as the insulating film, the mixed deposition material of the etched metal and the organic coating film adheres to the side portion of the wiring, and the post-process may occur. There is a problem that a short circuit defect due to peeling is likely to occur. In addition, when wet etching is used as a measure against peeling of the deposition material,
Even if the wet etching is also used in combination with the reactive ion etching, there is a problem that the processing accuracy is lowered.

An object of the present invention is to provide a method for manufacturing a semiconductor device having metal wiring which overcomes the above-mentioned drawbacks, has a low rate of occurrence of short circuit defects, and has a high processing accuracy.

[0007]

According to a method of manufacturing a semiconductor device of the present invention, a first metal film for a barrier and a second metal film for power supply are sequentially formed on a semiconductor substrate with an insulating film interposed therebetween. A step of forming a metal plating film on the second metal film by a plating method using a photoresist film as a mask; and a second step of anisotropic and isotropic dry etching using the metal plating film as a mask. And a step of etching the first metal film.

[0008]

Embodiments of the present invention will now be described with reference to the drawings. 1A to 1C are sectional views of a semiconductor chip for explaining a first embodiment of the present invention.

First, as shown in FIG. 1A, a semiconductor substrate 1
A polyimide film 2 containing silicon is formed thereon as an insulating film. Next, the TiW film 3 is used as a barrier film with a thickness of 100 nm, and the gold film 4 is further used with a thickness of 100 nm for power supply and easy plating.
nm sputtering method. Next, using the photoresist film 5 as a mask, a gold plating film 6 for wiring is selectively formed to a thickness of 6 μm by electrolytic plating.

Next, as shown in FIG. 1B, by anisotropic magnetron reactive ion etching which is advantageous in fine processing, the gold film 4 and the TiW film 3 are connected to the polyimide film 2 by using the gold plating film 6 as a mask. Etch up to the interface. Argon and oxygen, and argon and sulfur hexafluoride are used as etching gases for the gold film 4 and the TiW film 3, respectively. Then, the optical end point monitor is used to judge the end of etching.

Next, as shown in FIG. 1 (c), a part of the polyimide film 2 is gasified by etching, oxygen is used, and gold is not etched. Etching is performed by ion etching to form a gold wiring containing the gold plating film 6 as a main component.

As described above, according to the first embodiment, the gold film 4
Since the TiW film 3 and the TiW film 3 are etched by magnetron ion etching and the polyimide film is etched by chemical ion etching, there is no remaining TiW film, and the mixed deposition material with the metal film that causes the conventional short circuit is almost eliminated. be able to.

Next, a second embodiment will be described. Also in this case, as shown in FIG. 1C, the gold film 4 and the TiW film 3 are etched by magnetron reactive ion etching using the gold plating film 6 as a mask.
When the film 3 is etched, it is over-etched by about 10 to 20% and the polyimide film 2 is also etched. This T
In the case of etching the iW film 3, the flow rate ratio of sulfur hexafluoride to argon is set to about 50%, which is higher than 30% in the first embodiment, and the RF power is lower than 1.3 KW in the first embodiment. Etching is performed at about 0 kW. Next, a part of the polyimide film is etched by chemical ion etching to form gold wiring.

In the case of the first embodiment, the TiW film 3 is just-etched by magnetron reactive ion etching. However, depending on the amount of TiW slightly left in the place where the wiring interval width is narrow, the polyimide film may be chemically removed later. Ion etching becomes difficult. As described above, in the second embodiment, by changing the magnetron reactive ion etching conditions of the TiW film, the selection ratio of TiW film / gold plating film, TiW film / polyimide film is increased, and the deposition material is short-circuited due to peeling. To reduce the cause of
There is an advantage that the remaining iW film can be prevented.

Although a TiW film is used as the barrier metal film in the above embodiment, T
It may be an i film. Although the gold plating film is used as the plating film, it may be a copper plating film. In this case, a copper film is suitable as the metal film for power supply.

[0016]

As described above, according to the present invention, when the metal wiring is formed by the plating method, when etching the lower second metal film for power supply and the first metal film for barrier, By using the anisotropic and isotropic dry etching method, it is possible to eliminate the deposition material that causes the short circuit of the wiring, so that the occurrence rate of the short circuit defect is small and the metal wiring with the good processing accuracy can be formed. Has the effect.

[Brief description of drawings]

FIG. 1 is a sectional view of a semiconductor chip for explaining an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a semiconductor chip for explaining a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Polyimide film 2A Insulating film 3 TiW film 4 Gold film 4A Metal film 5 Photoresist film 6 Gold plating film 6A Metal plating film

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical indication H01L 21/28 F 7738-4M 21/288 E 7738-4M 21/302 N 7353-4M

Claims (1)

[Claims] 1. A step of sequentially forming a first metal film for a barrier and a second metal film for power supply on a semiconductor substrate with an insulating film interposed therebetween, and the second metal using a photoresist film as a mask. A step of forming a metal plating film on the film by a plating method, and a step of etching the second metal film and the first metal film by an anisotropic and isotropic dry etching method using the metal plating film as a mask A method of manufacturing a semiconductor device, comprising: