JPH05227234A - Receiver - Google Patents

Abstract

PURPOSE:To obtain the receiver with simple configuration, less number of components, compact size and less power consumption. CONSTITUTION:A local oscillator 17 and a carrier signal oscillator are made up of one PLL circuit. The PLL circuit consists of a 1st frequency divider 17a frequency-dividing an oscillation signal of a reference oscillator 20, a variable oscillator 17e supplying a local oscillation signal to a mixer 7, a 2nd frequency divider 17b frequency-dividing its oscillation signal, and a phase comparator 17c comparing the frequency division outputs of the 1st and 2nd frequency dividers 17a, 17b. Furthermore, the oscillating frequency of the variable oscillator 17e is controlled by the phase comparison output. Moreover, the receiver is provided with a phase shifter 19 receiving the frequency division output from the 1st or 2nd frequency divider 17a or 17b, generating carrier signals whose frequency is equal to a frequency of an intermediate frequency signal and whose phases are 0 deg. and 90 deg. and supplying the carrier signals whose frequency is equal to a frequency of an intermediate frequency signal and whose phases are 0 deg. and 90 deg. to an orthogonal detector 10.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiver suitable for application to, for example, a receiver system of a digital mobile phone, and more particularly to a receiver equipped with a quadrature detector.

[0002]

2. Description of the Related Art In a receiving system of a digital mobile telephone adopted in North America or the like, in order to demodulate a modulated signal in which a carrier signal is a baseband signal, a digitally modulated signal such as quadrature phase modulation (QPSK modulation) is used. A quadrature detector as shown in FIG. 6 is used. This quadrature detector supplies an intermediate frequency signal (second intermediate frequency signal) IF2 in which a carrier signal is phase-phase-modulated by an audio signal to a multiplier 10A, 10B to generate a carrier wave having a phase of 0 ° and 90 °, respectively. The signal is multiplied to obtain baseband signals I and Q of an in-phase component and a quadrature component, respectively.

Next, two conventional examples of a portion including a second frequency conversion circuit and a quadrature detector of this receiving system are shown in FIGS. 7 and 8.
Will be described. In FIG. 7, the first intermediate frequency signal IF
1 is supplied to the second mixer 7 through the first intermediate frequency amplifier 6 and the second local oscillation signal from the second local oscillator 22 is supplied to the second mixer 7, and the mixed output is bandpassed. Through the filter 8 and the second intermediate frequency amplifier 9,
It is supplied to the quadrature detector 10 as a second intermediate frequency signal.
Then, the carrier wave signal from the oscillator 23 is supplied to the phase shifter 19 to obtain the carrier wave signals having the phases of 0 ° and 90 ° and supplied to the quadrature detector 10 to be multiplied by the second intermediate frequency signal IF2. Thus, the baseband signals I and Q of the in-phase component and the quadrature component are obtained, respectively. In FIG. 8, the oscillation signal of the second local oscillator 22 is supplied to the frequency divider 24 and frequency-divided to obtain a carrier signal and supply it to the phase shifter 19. Other configurations are the same as in FIG. 7.

[0004]

In such a conventional receiving apparatus, as shown in FIG. 7, a dedicated oscillator 23 for generating a carrier signal to be supplied to the quadrature detector 10 is provided, or as shown in FIG. Although the oscillator for generating the carrier wave signal to be supplied to the quadrature detector 10 also serves as the local oscillator 22, the local oscillator 22 is used to obtain the carrier wave signal.
Since the dedicated frequency divider 24 for frequency-dividing the local oscillation signal is provided, the configuration becomes complicated, the number of parts increases, the device becomes large, and only the oscillator 23 or the frequency divider 24 is used. Since it consumes a large amount of power, there are drawbacks such that reliability is deteriorated and battery life is shortened when a built-in battery is used as a power source.

In view of the above points, the present invention provides a mixer to which a received signal is supplied, a local oscillator to supply a local oscillation signal to the mixer, and a quadrature detector to which an intermediate frequency signal from the mixer is supplied. And a carrier signal generator that generates a carrier signal having phases of 0 ° and 90 ° supplied to the quadrature detector, respectively, in a receiver, the configuration is simple, the number of parts is small, the device is compact, and The idea is to propose one with low power consumption.

[0006]

According to the present invention, a mixer 7 to which a received signal is supplied, a local oscillator 17 for supplying a local oscillation signal to the mixer 7, and an intermediate frequency signal from the mixer 7 are provided. In a receiving device having a quadrature detector 10 to be supplied and a carrier signal generator for generating carrier signals having phases of 0 ° and 90 ° to be supplied to the quadrature detector 10,
The local oscillator 17 and the carrier signal oscillator are configured by one PLL circuit, and the PLL circuit includes a first frequency divider 17a for dividing the oscillation signal of the reference oscillator and a mixer 7.
A variable oscillator 17e for supplying a local oscillation signal to the second oscillator 17 and a second frequency divider 17 for dividing the oscillation signal of the variable oscillator 17e.
b and a phase comparator 17c that compares the frequency-divided outputs of the first and second frequency dividers 17a and 17b. Further, the oscillation frequency of the variable oscillator 17e is controlled by the comparison output of the phase comparator 17c. Furthermore, the first or second frequency divider 17a, 1
The frequency-divided output of 7b is supplied to generate a carrier signal having a frequency equal to the frequency of the intermediate frequency signal and having a phase of 0 ° and 90 °, respectively. The carrier signal having a phase of 0 ° and 90 ° is generated by the quadrature detector 12 Is provided with a phase shifter 19.

[0007]

BEST MODE FOR CARRYING OUT THE INVENTION A digital communication system of a time division multiple access system in which a base station (fixed station) and a mobile station (mobile telephone) are wirelessly connected to each other with reference to FIG. The case where the invention is applied to the receiving system of the car telephone set will be described in detail. In this communication system, six reception slots are provided for each channel of the 900 MHz band, and the reception signal of one of the slots is transmitted every 20 msec.
Each channel is received by m sec, 6 transmission slots are similarly provided for each channel, and the transmission signal of one of the slots is transmitted. The specific numerical values of the frequencies in this embodiment are the numerical values in the digital communication system adopted in North America.

20 is a crystal reference oscillator (VCXO)
And its reference frequency F_REFIs 14.4 MHz. rear
Digital signal processor (DSP) 12
From the digital frequency control signal from the D / A converter 18
The analog frequency control signal that has been D / A converted by
By supplying the shaker 2012, the reference frequency F
_REFIs designed so that only a minute frequency can be changed.

The received signal from the antenna 1 is supplied to the bandpass filter 2 to remove unnecessary signals, and then supplied to the first mixer 4 through the high frequency amplifier 3. In this case, the reception frequency F _RCV is 869.01 MHz to 89.
It is in the range of 3.97 MHz, and the frequencies are every 30 kHz according to the receiving channel.

A first local oscillator 16 is composed of a PLL circuit, and a first local oscillation signal from the PLL circuit is supplied to the first mixer 4. This first local oscillation frequency F
_L1 is in the range of 785.76 MHz to 810.72 MHz, and the frequencies are every 30 kHz according to the reception channel. The reference frequency signal from the reference oscillator 20 is
The frequency division ratio 1 / NR1 is divided by the frequency divider 16a having a frequency of 1/480, and a frequency signal having a frequency F _C1 of 30 kHz is obtained from this. A voltage-controlled variable oscillator first local oscillation signal the oscillation frequency F _L1 is 785.76MHz~810.72MHz from 16e is, the frequency division ratio 1 / NP1 which changes according to the receiving channel 1 / 28,967 to 1 / 29,799
Is supplied to the variable frequency divider 16b of FIG.
A frequency signal with _C1 'of 30 kHz is obtained. The frequency-divided outputs of the frequency dividers 16a and 16b are output from the phase comparator 1
6c for phase comparison, the comparison output is supplied to the charge pump 16d, and the DC output thereof controls the oscillation frequency of the voltage controlled variable oscillator 16e.

After the mixed output from the first mixer 4 is supplied to the bandpass filter 5 to remove unnecessary signals, the reception frequency F _RCV and the first local oscillation frequency are passed through the first intermediate frequency amplifier 6. The intermediate frequency F _I1 of the difference of F _L1 is 8
A first intermediate frequency signal of 3.25 MHz is obtained, which is fed to the second mixer 7.

A second local oscillator 17 is composed of a PLL circuit, and a second local oscillation signal from the PLL circuit is supplied to the second mixer 7. The second local oscillator frequency F _L2 is 82.8MHz. The reference frequency signal from the reference oscillator 20 is frequency-divided by the frequency divider 17a having a frequency division ratio 1 / NR2 of ⅛, and a frequency signal with a frequency F _C2 of 1.8 MHz is obtained. Second local oscillation signal the oscillation frequency F _L2 from the voltage-controlled variable oscillator 17e of 82.8MHz is, the frequency division ratio 1 / NP2 is supplied to the frequency divider 17b to divide the 1/46 frequency F A frequency signal whose _C2 'is 1.8 MHz is obtained. And these frequency dividers 17a, 1
The frequency-divided outputs of 7b are supplied to the phase comparator 17c for phase comparison, and the comparison output is supplied to the charge pump 17d.
The oscillation frequency of e is controlled.

Second intermediate frequency signal from the second mixer 7
Is supplied to the bandpass filter 8 to remove unnecessary signals
And the first intermediate frequency F_I1And the second local oscillation frequency
Number F _L2Second intermediate frequency F of_I2Is 450 kHz
2 intermediate frequency signal is obtained, which is passed through the AGC amplifier 9.
Then, it is supplied to the quadrature detector 10. Second local oscillator 1
Frequency F from the frequency divider 17a of 7_C2Around 1.8 MHz
The wave number signal is supplied to the phase shifter 19 and its frequency is 1
It is divided into / 4, the frequency is 450 kHz, and the phase is 0.
Converted to ° and 90 ° frequency signals and obtained from this
Frequency is 450 kHz, phase is 0 ° and 9 respectively
The carrier signal of 0 ° is supplied to the orthogonal transformer 10. this
In this case, the frequency F from the frequency divider 17a_C2Is 450 kHz
A frequency signal that is an integral multiple of 0 is obtained, and this is used as the phase shifter 19
At that frequency or by dividing the frequency by the same frequency as the second intermediate frequency.
The frequency signal of wave number is obtained, and the phase is 0 ° and 90 ° from this
If the carrier signal of is obtained and supplied to the phase shifter 19,
good. The frequency signal supplied to the phase shifter 19 is shown in FIG.
As shown, the frequency division output from the frequency divider 17b may be used.
Yes.

In-phase and quadrature component baseband signals I and Q are obtained from the quadrature detector 10, and these signals I and Q are supplied to A / D converters 11A and 11B, respectively, and digitized to obtain digital signals. By being supplied to the signal processor 12, the modulated digital signal is restored to the original digital data stream. Then, the data string from the digital signal processor 12 is supplied to the D / A converter 13 to obtain a sound signal, which is supplied to the speaker 15 through the low frequency amplifier 14 and is emitted. Further, the digital signal processor 12 detects the deviation of the reception frequency from the phase change of the reception signal to generate an error signal, and the error signal is supplied to the D / A converter 18 and converted into an analog signal, The analog miscalculation signal causes the oscillation frequency of the reference oscillator 20 to be slightly changed. As a result, both local oscillators 16 and 17 of the receiver are always synchronized with the phase of the reception frequency.

Next, three concrete examples of the phase shifter 19 will be described with reference to FIGS. 3, 4 and 5, respectively. Figure 3
In (A), the frequency signal CK having a frequency F _C2 of 1.8 MHz from the second local oscillator 17 [FIG. 3 (B)] is supplied to each clock input terminal of the D-type flip-flop circuits 26 and 27. By supplying the output from the inverting output terminal of the flip-flop circuit 27 to the D input terminal of the flip-flop circuit 26, and supplying the output from the non-inverting output terminal of the flip-flop circuit 26 to the D input terminal of the flip-flop circuit 27. , The phase is 0 ° from the non-inverting output terminal of the flip-flop circuit 26, and the frequency is 1/4 of 1.8 MHz.
450 kHz carrier signal [FIG. 3 (B)] is obtained, and the phase is 90 ° from the non-inverting output terminal of the flip-flop circuit 27 and the frequency is 1.8 MHz, which is 1/4 450 kHz.
A carrier signal of Hz [FIG. 3 (B)] is obtained.

In FIG. 4 (A), the second local oscillator 17 is divided into two so that a frequency signal CK (FIG. 4 (B)) of 0.9 MHz, which is 1/2 of the frequency F _C2 of 1.8 MHz, is obtained. Set the frequency division ratio of the frequency dividers 17a and 17b, and set the frequency signal C
K is supplied to the clock input terminal of the D-type flip-flop circuit 28 and is supplied to the clock input terminal of the D-type flip-flop circuit 29 through the inverter 30.
The output of the inverting output terminal of the flip-flop circuit 28 is supplied to its D input terminal, and the flip-flop circuit 2
The output of the non-inverting output terminal 8 of the flip-flop circuit 29
To the D input terminal of the flip-flop circuit 28 and the phase is 0 ° C and the frequency is 0.9 MHz from the non-inverting output terminal of the flip-flop circuit 28.
Of the carrier wave signal of 450 kHz (FIG. 4 (B)) of 1/2, and a carrier wave signal of 450 kHz of 1/2 whose phase is 90 ° and frequency is 0.9 MHz from the non-inversion output terminal of the flip-flop circuit 29. FIG. 4 (B)] is obtained.

In FIG. 5A, both frequency dividers are used so that the second local oscillator 17 can obtain a frequency signal CK of 450 kHz which is ¼ of the frequency F _C2 of 1.8 MHz (FIG. 4B). The frequency division ratio of 17a and 17b is set, and the frequency F _C2 of the frequency signal CK of 450 kHz (FIG. 4 (B)) (the oscillator that generates this is 31) is connected to the series circuit of the resistor 32 and the capacitor 33. Apply to both ends. The other end of the oscillator 31 and the other end of the capacitor 33 in the series circuit are grounded. The hot end of the resistor 32 is connected to the non-inverting input terminal of the operational amplifier 34, and the connection midpoint of the resistor 32 and the capacitor 33 is connected to the inverting input terminal of the operational amplifier 34 and the non-inverting input terminal of the operational amplifier 35. , The inverting input terminal of the operational amplifier 35 is grounded. And the operational amplifier 3
By supplying the comparison outputs 4 and 35 to the limiters 36 and 37, respectively, the carrier signals having a phase of 0 ° C. and a frequency of 450 kHz from the limiters 36 and 37 [FIG. Frequency is 450 at ° C
An inverting input terminal of kHz [FIG. 5 (B)] is obtained.

[0018]

According to the present invention described above, a mixer to which a received signal is supplied, a local oscillator to supply a local oscillation signal to the mixer, and a quadrature detection circuit to which an intermediate frequency signal from the mixer is supplied. And a carrier wave signal generator for generating a carrier wave signal having phases of 0 ° and 90 °, respectively, which are supplied to the quadrature detector, the receiving device having a simple structure, a small number of parts, and a compact device, and It can be obtained with low power consumption. Further, since the power consumption is reduced, the reliability is improved and the battery lasts longer when the built-in battery is used as the power source.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing an example of another method of extracting a carrier signal according to the embodiment of the present invention.

FIG. 3 is a block diagram showing a specific example (1) of the phase shift circuit of the embodiment.

FIG. 4 is a block diagram showing a specific example (2) of the phase shift circuit of the embodiment.

FIG. 5 is a block diagram showing a specific example (3) of the phase shift circuit of the embodiment.

FIG. 6 is a block diagram showing a quadrature detector.

FIG. 7 is a block diagram showing a conventional example (1).

FIG. 8 is a block diagram showing a conventional example (2).

[Explanation of symbols]

 4 first mixer 7 second mixer 10 quadrature detector 17 second local oscillator (PLL circuit) 17a frequency divider 17b frequency divider 17c phase comparator 17d charge pump 17e voltage controlled variable oscillator 19 phase shifter

Front page continuation (72) Inventor Yukio Iida 6-735 Kitashinagawa, Shinagawa-ku, Tokyo Sony Corporation

Claims (1)

[Claims] 1. A mixer to which a received signal is supplied, a local oscillator to supply a local oscillation signal to the mixer, a quadrature detector to which an intermediate frequency signal from the mixer is supplied, and the quadrature detector. And a carrier signal generator for generating carrier signals having phases of 0 ° and 90 °, respectively.
The PLL circuit includes a first circuit that divides an oscillation signal of a reference oscillator.
Frequency divider, a variable oscillator that supplies a local oscillation signal to the mixer, a second frequency divider that divides the oscillation signal of the variable oscillator, and each of the first and second frequency dividers. A phase comparator for comparing the frequency division outputs is provided, and the oscillation frequency of the variable oscillator is controlled by the comparison output of the phase comparator, and the frequency division output of the first or second frequency divider is Is supplied and is equal to the frequency of the intermediate frequency signal and has a phase of 0 °.
And 90 ° carrier signals, the phases of which are 0 ° and 9 °.
A receiver comprising a phase shifter for supplying a carrier signal of 0 ° C to the quadrature detector.