JPH05226308A - Method and equipment for processing rear surface of semiconductor wafer - Google Patents

Method and equipment for processing rear surface of semiconductor wafer

Info

Publication number
JPH05226308A
JPH05226308A JP3056792A JP3056792A JPH05226308A JP H05226308 A JPH05226308 A JP H05226308A JP 3056792 A JP3056792 A JP 3056792A JP 3056792 A JP3056792 A JP 3056792A JP H05226308 A JPH05226308 A JP H05226308A
Authority
JP
Japan
Prior art keywords
semiconductor wafer
back surface
etching
spinner
protective tape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3056792A
Other languages
Japanese (ja)
Inventor
Masahiro Yoshida
雅弘 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP3056792A priority Critical patent/JPH05226308A/en
Publication of JPH05226308A publication Critical patent/JPH05226308A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enable rear surface grinding for obtaining a semiconductor wafer having a specified thickness with high precision by using a fewer treatment processes. CONSTITUTION:After a semiconductor wafer 1 whose rear is protected with a protective tape 3 is subjected to rear grinding by a rough grindstone 12 and a finishing grindstone 14 of a rear processing equipment 10A, the wafer 1 is transferred to a spinner 15. A damage layer 4 generated in a semiconductor layer 1C is subjected to spin etching by using etching solution from a nozzle 20 for etching. After that, spinner cleaning and spinner drying are performed, and a semiconductor wafer having a specified thickness is obtained by a sheeting process. Since the batch processing is not used as in the case of a conventional technique, irregularity in each semiconductor wafer is little, high precision is obtained, manhour and cost are reduced, and the conventional rear processing equipment can be appropriated.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、半導体ウエハを所定
の厚みにするための半導体ウエハの裏面処理方法及びそ
の装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of processing a back surface of a semiconductor wafer and an apparatus therefor for making the semiconductor wafer have a predetermined thickness.

【0002】[0002]

【従来の技術】従来技術を図3乃至図5を用いて説明す
る。図3は従来技術及びこの発明の半導体ウエハの裏面
処理方法を説明するための半導体ウエハの断面図であ
り、図4は従来技術の半導体ウエハの裏面処理方法の工
程図であり、図5は図4に示した半導体ウエハの裏面処
理方法に用いられる半導体ウエハの裏面処理装置の概念
図である。
2. Description of the Related Art A conventional technique will be described with reference to FIGS. FIG. 3 is a sectional view of a semiconductor wafer for explaining a conventional method and a back surface processing method for a semiconductor wafer according to the present invention, FIG. 4 is a process diagram of a conventional back surface processing method for a semiconductor wafer, and FIG. 4 is a conceptual diagram of a semiconductor wafer back surface processing apparatus used in the semiconductor wafer back surface processing method shown in FIG.

【0003】表面に半導体集積回路が形成された半導体
ウエハを所定の厚さにするために、従来技術では、図4
に示した各工程によって、これを行っている。即ち、図
3Aに示した、例えば、厚さが625μmの半導体ウエ
ハ1を同図Cに示した、例えば、400μmの厚さの半
導体ウエハ1Aに薄くするために、先ず、図4に示した
工程(1)で半導体ウエハ1の表面にレエジスト膜2を
施し、次の工程(2)でその上に保護テープ3を貼る。
In order to make a semiconductor wafer having a semiconductor integrated circuit formed on its surface have a predetermined thickness, according to the prior art, as shown in FIG.
This is performed by the steps shown in FIG. That is, in order to thin the semiconductor wafer 1 having a thickness of, for example, 625 μm shown in FIG. 3A into the semiconductor wafer 1A having a thickness of, for example, 400 μm shown in FIG. 3C, first, the process shown in FIG. In step (1), the resist film 2 is applied to the surface of the semiconductor wafer 1, and in the next step (2), the protective tape 3 is attached.

【0004】その次の工程(3)では、このように処理
した複数枚の半導体ウエハ1をウエハキャリヤ21に収
納して、図5に示した半導体ウエハの裏面処理装置(以
下、単に「裏面処理装置」と記す)10のキャリヤ・ロ
ーダー18に移される。
In the next step (3), a plurality of semiconductor wafers 1 processed in this way are accommodated in a wafer carrier 21 and the semiconductor wafer back surface processing apparatus shown in FIG. Device) 10) to a carrier loader 18.

【0005】この裏面処理装置10は前記キャリヤ・ロ
ーダー18の他に、第1の回動ステージ11とこれと対
向して配置された回転する粗砥石12と、第2の回動ス
テージ13とこれと対向して配置された回転する仕上砥
石14と、共通のスピンナー15とこれに対向して配置
された注水用ノズル16及び空気用ノズル17と、そし
てキャリヤ・アンローダー19とから構成されている。
In addition to the carrier loader 18, the rear surface processing apparatus 10 includes a first rotating stage 11, a rotating coarse grindstone 12 arranged to face the first rotating stage 11, a second rotating stage 13 and the like. It is composed of a rotating finishing grindstone 14 arranged to face the same, a common spinner 15, a water injection nozzle 16 and an air nozzle 17 arranged to face the same, and a carrier unloader 19. .

【0006】キャリヤ・ローダー18に搬入された複数
枚の半導体ウエハ1はウエハキャリヤ21から一枚毎に
取り出されて回動ステージ11の固定場所Aに、その保
護テープ3の方を下側に向けて、真空吸着により固定
し、その後180°回動して、半導体ウエハ1の裏面を
粗砥石12の下に持ち来し、粗研削する。
The plurality of semiconductor wafers 1 carried into the carrier loader 18 are taken out one by one from the wafer carrier 21 and are fixed to the rotary stage 11 at the fixing place A, and the protective tape 3 is directed downward. Then, the semiconductor wafer 1 is fixed by vacuum suction, then rotated by 180 °, the back surface of the semiconductor wafer 1 is brought under the rough grindstone 12, and rough grinding is performed.

【0007】この粗研削が終了すると、この回動ステー
ジ11を元の位置に回動し、その粗研削された半導体ウ
エハ1Bを次の工程(4)における回動ステージ13の
固定場所Bに移替え、前工程(3)と同様に真空吸着に
より固定し、そしてこの回動ステージ13を180°回
動して半導体ウエハ1Bの裏面を仕上砥石14の下に持
ち来し、仕上研削する。
When the rough grinding is completed, the rotary stage 11 is rotated to the original position, and the rough-ground semiconductor wafer 1B is moved to the fixed position B of the rotary stage 13 in the next step (4). Instead, it is fixed by vacuum suction as in the previous step (3), and the rotating stage 13 is rotated 180 ° to bring the back surface of the semiconductor wafer 1B under the finishing grindstone 14 for finish grinding.

【0008】ほぼ所定の厚さに半導体ウエハ1Bを仕上
研削すると、回動ステージ13が元の位置に回動し、そ
の仕上研削された半導体ウエハ1Cをスピンナー15に
移送、載置し、回転させながら注水用ノズル16から噴
射させた純水で洗浄し〔工程(5)〕、次に、同じくス
ピンナー15で回転させながら空気ノズル17から空気
を噴射させて半導体ウエハ1Cを乾燥する〔工程
(6)〕。
When the semiconductor wafer 1B is finish-ground to a substantially predetermined thickness, the rotary stage 13 is rotated to its original position, and the finish-ground semiconductor wafer 1C is transferred to the spinner 15, placed and rotated. While cleaning with pure water sprayed from the water injection nozzle 16 [step (5)], air is sprayed from the air nozzle 17 while rotating the spinner 15 as well to dry the semiconductor wafer 1C [step (6) )].

【0009】このように仕上研削された半導体ウエハ1
Cの研削面である裏面には、前記機械的研削により、図
3Bに示したように約1μmの深さにわたってクラック
が入り、ダメージ層4が発生している。
The semiconductor wafer 1 finish-ground in this way
As shown in FIG. 3B, the back surface, which is the ground surface of C, is cracked by a depth of about 1 μm by the mechanical grinding, and a damaged layer 4 is generated.

【0010】このダメージ層4を除去するために、この
ような半導体ウエハ1Cを複数枚、ウエハキャリヤ21
に納めて、次の工程(7)の、エッチング槽30のエッ
チング液(例えば、HF+HNO3 )に浸漬して、図3
Cに示したように、厚さ約5.5μmのエッチングを行
う。
In order to remove the damage layer 4, a plurality of such semiconductor wafers 1C, a wafer carrier 21 are used.
3 and then, in the next step (7), immersing in the etching solution (for example, HF + HNO 3 ) in the etching bath 30,
As shown in C, etching is performed to a thickness of about 5.5 μm.

【0011】この化学的エッチングが完了すると、その
ウエハキャリヤ21を次工程(8)の複数の水槽22、
23に順次移し、純水で半導体ウエハを洗浄する。そし
て更に仕上げのために、次の工程(9)の槽24に移し
てライト・エッチングを行い、そして再度、純水で洗浄
する。この工程(10)の洗浄もまた複数の水槽25、
26で行う。
When this chemical etching is completed, the wafer carrier 21 is placed in a plurality of water tanks 22 in the next step (8).
23, and the semiconductor wafer is washed with pure water. Then, for further finishing, the wafer is transferred to the bath 24 in the next step (9), light etching is carried out, and then again washed with pure water. The washing in this step (10) also includes a plurality of water tanks 25,
26.

【0012】このような半導体ウエハ1Aを収納したウ
エハキャリヤ21を複数個、次の工程(11)のスピン
ドライヤー27に掛け、遠心力により水分を乾燥するよ
うにしている。このようにして図3Cに示した400μ
mの所定の厚さの、未だ保護テープ3付きの半導体ウエ
ハ1Aが得られる。前記工程(7)から工程(11)ま
ではバッチ処理で行われている。
A plurality of wafer carriers 21 accommodating such semiconductor wafers 1A are placed on a spin dryer 27 in the next step (11) to dry the water by centrifugal force. Thus, the 400 μ shown in FIG. 3C is obtained.
A semiconductor wafer 1A having a predetermined thickness of m and still having the protective tape 3 is obtained. The steps (7) to (11) are performed in a batch process.

【0013】そして次の工程(12)で保護テープ剥離
機で半導体ウエハ1Aから保護テープ3を剥離し、レエ
ジスト膜2を溶剤で溶かす。このような工程を経て最終
目的である所定の厚さの半導体ウエハ1Aのみが得られ
る。
Then, in the next step (12), the protective tape 3 is peeled off from the semiconductor wafer 1A by the protective tape peeling machine, and the resist film 2 is dissolved with a solvent. Through these steps, only the semiconductor wafer 1A having a predetermined thickness, which is the final purpose, is obtained.

【0014】[0014]

【発明が解決しようとする課題】前記従来技術の裏面処
理方法で、裏面研削による半導体ウエハ1Cに発生する
ダメージ層4を無くすために、砥粒の小さな砥石を使用
し、半導体ウエハ1Cの裏面の化学的エッチングを無く
す方法も試みられているが、半導体ウエハが大口径化及
び半導体チップの薄型化に伴い、この裏面の化学的エッ
チングはどうしても必要である。
In order to eliminate the damage layer 4 generated in the semiconductor wafer 1C due to the backside grinding by the above-mentioned backside processing method of the prior art, a grindstone having small abrasive grains is used, and the backside of the semiconductor wafer 1C is removed. Although a method of eliminating the chemical etching has been attempted, the chemical etching of the back surface is inevitably necessary as the diameter of the semiconductor wafer becomes larger and the semiconductor chip becomes thinner.

【0015】しかし、このバッチ処理による化学的エッ
チングは、半導体ウエハ内、バッチ内、バッチ間におい
けるエッチング精度が悪く、しかも作業工数が多い。そ
して保護テープの耐酸性が要求され、このような保護テ
ープは一般のものに比べ高価である。この発明はこのよ
うな欠点を無くすことを課題とした。
However, in the chemical etching by the batch processing, the etching accuracy in the semiconductor wafer, in the batch, and between the batches is poor, and the number of working steps is large. The acid resistance of the protective tape is required, and such a protective tape is more expensive than general ones. This invention made it a subject to eliminate such a defect.

【0016】[0016]

【課題を解決するための手段】そのため、この発明で
は、半導体ウエハの表面に保護テープを貼り、この保護
テープを貼った半導体ウエハを、その保護テープ側から
ステージに取り付けて、その半導体ウエハの裏面を研削
砥石で研削し、その後、この研削した半導体ウエハを回
転させながら、その裏面を化学的にエッチングし、その
後、この化学にエッチングした半導体ウエハを回転させ
ながら純水で洗浄し、そして更に洗浄した半導体ウエハ
を回転させながら空気を吹きつけて乾燥させ、所望の厚
さの半導体ウエハを得る方法を採った。この半導体ウエ
ハの裏面処理方法を具現する装置として、第1の回動ス
テージとこれと対向して配置された粗研削用回転砥石
と、第2の回動ステージとこれと対向して配置された仕
上研削用砥石と、共通のスピンナーとこれに対向して配
置されたエッチング用ノズル、純水用ノズル及び空気用
ノズルとから構成した。
Therefore, in the present invention, a protective tape is attached to the surface of a semiconductor wafer, the semiconductor wafer with the protective tape attached is attached to a stage from the protective tape side, and the back surface of the semiconductor wafer is attached. Is ground with a grinding wheel, then the back surface of the ground semiconductor wafer is chemically etched while rotating, and then the chemically etched semiconductor wafer is rotated and washed with pure water, and further cleaned. A method of obtaining a semiconductor wafer having a desired thickness by blowing air while rotating the semiconductor wafer was dried. As an apparatus embodying this method for processing the back surface of a semiconductor wafer, a first rotary stage, a rotary grinding stone for rough grinding arranged facing the first rotary stage, and a second rotary stage arranged to face the second rotary stage. It was composed of a finish grinding grindstone, a common spinner, and an etching nozzle, a pure water nozzle and an air nozzle which were arranged to face the common spinner.

【0017】[0017]

【作用】従って、この発明の半導体ウエハの裏面処理方
法及びその装置によれば、バッチ処理による半導体ウエ
ハ毎の化学的エッチングのばらつきがなくなり、毎葉処
理のため、半導体ウエハの一枚毎にエッチング面を確認
することができる。
Therefore, according to the semiconductor wafer back surface processing method and apparatus of the present invention, there is no variation in chemical etching between semiconductor wafers due to batch processing, and since each wafer is processed, each semiconductor wafer is etched. You can check the surface.

【0018】[0018]

【実施例】以下、この発明の実施例を図1乃至図3を用
いて説明する。図1はこの発明の半導体ウエハの裏面処
理方法を説明するための工程図であり、図2はこの発明
の半導体ウエハの裏面処理方法に用いる裏面処理装置の
概念図である。なお、図4及び図5に示した従来技術の
工程及び装置と同一の工程及び装置には同一の符号を付
し、それらの構成、機能などの説明を省略する。
Embodiments of the present invention will be described below with reference to FIGS. 1 to 3. FIG. 1 is a process diagram for explaining a semiconductor wafer back surface processing method of the present invention, and FIG. 2 is a conceptual diagram of a back surface processing apparatus used in the semiconductor wafer back surface processing method of the present invention. The same steps and devices as those of the prior art shown in FIGS. 4 and 5 are designated by the same reference numerals, and the description of their configurations and functions will be omitted.

【0019】図2にこの発明の半導体ウエハの裏面処理
装置(以下、単に「裏面処理装置」と記す)10Aを示
した。図5に示した従来技術の裏面処理装置10と異な
る部分はスピンナー15に対向して、注水用ノズル16
及び空気ノズル17の他に、エッチング用ノズル20か
らなるエッチング装置を設けたことである。この他、前
記エッチング用ノズル20から噴射されたエッチング液
の飛散を防止する装置や回収装置が設置されているが、
それらはこの発明の要点では無いので省略するも、その
他の構成は図5に示した従来技術の裏面処理装置10と
同一である。
FIG. 2 shows a semiconductor wafer backside processing apparatus (hereinafter simply referred to as "backside processing apparatus") 10A of the present invention. A portion different from the conventional back surface processing apparatus 10 shown in FIG. 5 faces the spinner 15, and a water injection nozzle 16 is provided.
In addition to the air nozzle 17, the etching device including the etching nozzle 20 is provided. In addition, a device and a recovery device for preventing the scattering of the etching liquid sprayed from the etching nozzle 20 are installed.
Although they are not essential to the present invention, they are omitted, but other configurations are the same as those of the conventional back surface processing apparatus 10 shown in FIG.

【0020】このエッチング用ノズル20からなるエッ
チング装置を裏面処理装置10に設置したことにより、
この発明の半導体ウエハの裏面処理方法は、図1に示し
たように、その処理工程が格段に簡略化できるようにな
った。
By installing the etching apparatus including the etching nozzle 20 in the back surface processing apparatus 10,
As shown in FIG. 1, the back surface processing method for a semiconductor wafer according to the present invention can greatly simplify the processing steps.

【0021】図1の裏面処理工程図において、工程
(1)〜工程(4)及び工程(12)は図4の裏面処理
工程における工程と同一である。工程(4)で仕上研削
された半導体ウエハ1Cは回動ステージ13の固定場所
Bから、次の工程(13)におけるスピンナー15に移
送、載置される。そして、この半導体ウエハ1Cを回転
させながら、先ず、その裏面に、エッチング用ノズル2
0からエッチング液を噴射させて、図3Bに示したよう
に、半導体ウエハ1Cの裏面のダメージ層4をエッチン
グする。
In the backside processing step diagram of FIG. 1, steps (1) to (4) and step (12) are the same as the steps in the backside processing step of FIG. The semiconductor wafer 1C finish-ground in the step (4) is transferred from the fixing place B of the rotating stage 13 to the spinner 15 in the next step (13) and placed. Then, while rotating the semiconductor wafer 1C, first, on the back surface thereof, the etching nozzle 2 is formed.
An etching liquid is jetted from 0 to etch the damage layer 4 on the back surface of the semiconductor wafer 1C as shown in FIG. 3B.

【0022】半導体ウエハ1Cからダメージ層4が除去
され、所定の厚さになると、エッチング液の噴射を停止
し、次に、次の工程(14)である純水洗浄を行うた
め、同一のスピンナー15で半導体ウエハ1Aを回転さ
せながら注水用ノズル16から純水を噴射する。この工
程(14)は、図4の従来技術における工程(10)に
当たる工程であって、工程(5)の純水洗浄の工程では
ない。
When the damaged layer 4 is removed from the semiconductor wafer 1C to a predetermined thickness, the jetting of the etching solution is stopped, and then the same spinner is used to perform the next step (14) of pure water cleaning. Pure water is sprayed from a water injection nozzle 16 while rotating the semiconductor wafer 1A at 15. This step (14) corresponds to the step (10) in the conventional technique of FIG. 4, and is not the pure water cleaning step of the step (5).

【0023】次に、同じくスピンナー15で回転させな
がら空気ノズル17から空気を噴射させて半導体ウエハ
1Aに付着している水分を遠心力と空気で乾燥する〔工
程(15)〕。この工程(15)は図4の従来技術にお
ける工程(11)に当たる工程であって、工程(6)の
スピンナー乾燥の工程とは異なる。
Next, air is jetted from the air nozzle 17 while being rotated by the spinner 15 as well to dry the water adhering to the semiconductor wafer 1A by centrifugal force and air [step (15)]. This step (15) is a step corresponding to the step (11) in the conventional technique of FIG. 4, and is different from the spinner drying step of the step (6).

【0024】そして、次に、図4における従来技術の工
程(12)と同一の保護テープ剥離工程(12)で保護
テープ剥離機で半導体ウエハ1Aから保護テープ3を剥
離し、レエジスト膜2を溶剤で溶かして、最終目的であ
る所定の厚さの半導体ウエハ1Aのみを得る。
Then, in the same protective tape peeling step (12) as the conventional step (12) in FIG. 4, the protective tape 3 is peeled off from the semiconductor wafer 1A by the protective tape peeling machine to remove the resist film 2 from the solvent. Then, the semiconductor wafer 1A having a predetermined thickness, which is the final purpose, is obtained.

【0025】[0025]

【発明の効果】以上のように、この発明の半導体ウエハ
の裏面処理方法は、従来技術に見られたような、バッチ
処理による半導体ウエハの化学的エッチングのばらつき
がなくなり、高精度の半導体ウエハを得ることができ
る。そして、毎葉処理のため半導体ウエハの一枚毎にエ
ッチング面を確認することもできる。しかも、従来技術
の処理工程と比較して、格段にその処理工程を簡略化す
ることができたので、工数の削減ができ、従って半導体
チップを安価に製造できる等という優れた効果がある。
また、この発明の半導体ウエハの裏面処理装置も、エッ
チング処理装置を追加するだけで、従来の裏面処理装置
を流用することができ、過大な設備投資をする必要がな
いので、ますます半導体チップを安価に製造できるとい
う優れた効果がある。
As described above, the semiconductor wafer back surface processing method of the present invention eliminates the variation in chemical etching of semiconductor wafers due to batch processing, which has been found in the prior art, and provides a highly accurate semiconductor wafer. Obtainable. Then, because of the leaf-by-leaf processing, it is possible to confirm the etching surface for each semiconductor wafer. Moreover, since the treatment process can be significantly simplified as compared with the treatment process of the conventional technique, the number of steps can be reduced, and accordingly, the semiconductor chip can be manufactured at low cost, which is an excellent effect.
Also, the semiconductor wafer back surface processing apparatus of the present invention can be used as a conventional back surface processing apparatus only by adding an etching processing apparatus, and it is not necessary to make an excessive capital investment. It has an excellent effect that it can be manufactured at low cost.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の半導体ウエハの裏面処理方法の工程
図である。
FIG. 1 is a process drawing of a back surface processing method for a semiconductor wafer according to the present invention.

【図2】この発明の半導体ウエハの裏面処理装置の概念
図である。
FIG. 2 is a conceptual diagram of a semiconductor wafer back surface processing apparatus of the present invention.

【図3】この発明の半導体ウエハの裏面処理方法及びそ
の装置を説明するために用いる一部半導体ウエハの断面
図である。
FIG. 3 is a cross-sectional view of a partial semiconductor wafer used for explaining the method of processing the back surface of a semiconductor wafer and the apparatus therefor according to the present invention.

【図4】従来技術の半導体ウエハの裏面処理方法の工程
図である。
FIG. 4 is a process diagram of a conventional semiconductor wafer back surface processing method.

【図5】従来技術の半導体ウエハの裏面処理装置の概念
図である。
FIG. 5 is a conceptual diagram of a conventional semiconductor wafer back surface processing apparatus.

【符号の説明】[Explanation of symbols]

1 半導体ウエハ 2 レエジスト膜 3 保護テープ 10A 半導体ウエハの裏面処理装置 11 ステージ 12 粗砥石 13 ステージ 14 仕上砥石 15 スピンナー 16 注水用ノズル 17 空気ノズル 20 エッチング用ノズル 1 Semiconductor Wafer 2 Reegist Film 3 Protective Tape 10A Semiconductor Wafer Backside Processing Device 11 Stage 12 Rough Grinding Stone 13 Stage 14 Finishing Grinding Stone 15 Spinner 16 Water Injection Nozzle 17 Air Nozzle 20 Etching Nozzle

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】半導体ウエハの表面に保護テープを貼り、
該保護テープを貼った半導体ウエハを、その保護テープ
側からステージに取り付けて、その半導体ウエハの裏面
を研削砥石で研削し、その後、該研削した半導体ウエハ
を回転させながら、その裏面を化学エッチングし、その
後、該化学エッチングした半導体ウエハを回転させなが
ら純水で洗浄し、そして更に洗浄した半導体ウエハを回
転させながら空気を吹きつけて乾燥させ、所望の厚さの
半導体ウエハを得ることを特徴とする半導体ウエハの裏
面処理方法。
1. A protective tape is attached to the surface of a semiconductor wafer,
The semiconductor wafer to which the protective tape is attached is attached to the stage from the protective tape side, the back surface of the semiconductor wafer is ground with a grinding wheel, and then the back surface is chemically etched while rotating the ground semiconductor wafer. After that, the chemically etched semiconductor wafer is washed with pure water while rotating, and the washed semiconductor wafer is further rotated by blowing air to obtain a semiconductor wafer having a desired thickness. Semiconductor wafer backside processing method.
【請求項2】第1の回動ステージとこれと対向して配置
された粗研削用回転砥石と、第2の回動ステージとこれ
と対向して配置された仕上研削用砥石と、共通のスピン
ナーとこれに対向して配置されたエッチング用ノズル、
純水用ノズル及び空気用ノズルとから構成されたことを
特徴とする半導体ウエハの裏面処理装置。
2. A common first rotary stage, a rough grinding rotary grindstone arranged opposite to the first rotary stage, and a second rotary stage common to a finish grinding grindstone arranged opposite thereto. A spinner and an etching nozzle arranged opposite to the spinner;
A backside processing apparatus for a semiconductor wafer, comprising a pure water nozzle and an air nozzle.
JP3056792A 1992-02-18 1992-02-18 Method and equipment for processing rear surface of semiconductor wafer Pending JPH05226308A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3056792A JPH05226308A (en) 1992-02-18 1992-02-18 Method and equipment for processing rear surface of semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3056792A JPH05226308A (en) 1992-02-18 1992-02-18 Method and equipment for processing rear surface of semiconductor wafer

Publications (1)

Publication Number Publication Date
JPH05226308A true JPH05226308A (en) 1993-09-03

Family

ID=12307411

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3056792A Pending JPH05226308A (en) 1992-02-18 1992-02-18 Method and equipment for processing rear surface of semiconductor wafer

Country Status (1)

Country Link
JP (1) JPH05226308A (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4411409A1 (en) * 1994-03-31 1995-10-05 Siemens Ag Thinning the back of semiconductor wafers
EP1091394A2 (en) * 1999-10-04 2001-04-11 Tokyo Seimitsu Co.,Ltd. Method for manufacturing thin semiconductor chips
JP2002359215A (en) * 1993-09-21 2002-12-13 Toshiba Corp Polishing machine and method
JP2003007661A (en) * 1999-01-06 2003-01-10 Tokyo Seimitsu Co Ltd Apparatus and method for machining planar surface
JP2003220556A (en) * 1993-09-21 2003-08-05 Toshiba Corp Polishing apparatus and method
KR100443879B1 (en) * 2000-03-13 2004-08-09 가부시기가이샤 디스코 Semiconductor wafer processing apparatus
JP2004312036A (en) * 1993-09-21 2004-11-04 Toshiba Corp Device and method of polishing
JP2006222467A (en) * 1999-01-06 2006-08-24 Tokyo Seimitsu Co Ltd Planarization processing apparatus
JP2010124006A (en) * 1999-01-06 2010-06-03 Tokyo Seimitsu Co Ltd Planarization apparatus and method
JP2012084744A (en) * 2010-10-13 2012-04-26 Lintec Corp Film for forming protective film and method of manufacturing semiconductor chip
JP2020109841A (en) * 2018-12-28 2020-07-16 清華大学Tsinghua University Backside treatment process for backside illuminated photoelectric device

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003220556A (en) * 1993-09-21 2003-08-05 Toshiba Corp Polishing apparatus and method
JP2004312036A (en) * 1993-09-21 2004-11-04 Toshiba Corp Device and method of polishing
JP2002359215A (en) * 1993-09-21 2002-12-13 Toshiba Corp Polishing machine and method
DE4411409C2 (en) * 1994-03-31 1998-05-14 Siemens Ag Process for backside thinning of structured silicon wafers
DE4411409A1 (en) * 1994-03-31 1995-10-05 Siemens Ag Thinning the back of semiconductor wafers
JP2006222467A (en) * 1999-01-06 2006-08-24 Tokyo Seimitsu Co Ltd Planarization processing apparatus
JP2003007661A (en) * 1999-01-06 2003-01-10 Tokyo Seimitsu Co Ltd Apparatus and method for machining planar surface
JP2010124006A (en) * 1999-01-06 2010-06-03 Tokyo Seimitsu Co Ltd Planarization apparatus and method
JP4553868B2 (en) * 1999-01-06 2010-09-29 株式会社東京精密 Planar processing equipment
EP1091394A3 (en) * 1999-10-04 2002-01-09 Tokyo Seimitsu Co.,Ltd. Method for manufacturing thin semiconductor chips
EP1091394A2 (en) * 1999-10-04 2001-04-11 Tokyo Seimitsu Co.,Ltd. Method for manufacturing thin semiconductor chips
KR100443879B1 (en) * 2000-03-13 2004-08-09 가부시기가이샤 디스코 Semiconductor wafer processing apparatus
DE10108388B4 (en) * 2000-03-13 2010-02-18 Disco Corp. A semiconductor wafer processing apparatus and method of thinning a semiconductor wafer
JP2012084744A (en) * 2010-10-13 2012-04-26 Lintec Corp Film for forming protective film and method of manufacturing semiconductor chip
JP2020109841A (en) * 2018-12-28 2020-07-16 清華大学Tsinghua University Backside treatment process for backside illuminated photoelectric device

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