JPH05225162A - Runaway detecting system for multi-cpu system - Google Patents

Abstract

PURPOSE:To early detect the CPU having a runaway fault and to recovery this faulty CPU in a multi-CPU system. CONSTITUTION:A reference CPU 2 is actuated in the periodical 1 reset sequence by a periodical reset pulse generating part 1. Then the CPU 2 carries out the programs set at the general CPU 4a-4n through an interface part 3 and a bus 7 and detects the runaway faults of these CPU 4. When the CPU 2 detects a fault of either one of those CPU 4, a reset pulse generating part 5 is instructed by the CPU 2 to produce a reset pulse 9a for initialization of the relevant CPU 4.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a runaway detection system for a multiple CPU system which monitors runaway of each CPU in a system using a plurality of CPUs and normalizes the runaway CPUs early when the runaway is detected.

[0002]

2. Description of the Related Art A conventional runaway detection method for a multi-CPU system of this type will be described with reference to the block diagram of FIG.

In this runaway detection system for a multiple CPU system, n (n is an integer) CPU sections 22a, 2 connected to each other via an interface section 21 and a bus 24.
, 22n respectively have counters 23a, 23b, ..., 23n such as a watch dock timer. Then, the CPU units 22a, 22b, ..., 22
Each of n is reset pulse from each counter 23a, 23b, ..., 23n by clearing these counters 23a, 23b ,. 26 were banned.

[0004]

This conventional multiple CPU
In the system runaway detection method, each CPU had its own runaway detection system, but this system is controlled by a program, and these runaway detection systems operate without fail when the CPU runs out of control. Not necessarily. In this case, since there is no reference CPU, the runaway CPU cannot be detected. Therefore, in order to return the runaway detection system to the normal state, it was necessary to turn off the power once.

[0005]

A runaway detection system for a multiple CPU system according to the present invention comprises a fixed cycle reset pulse generator for generating a fixed cycle reset pulse, and a reference CPU initialized by the fixed cycle reset pulse. , A plurality of general CPUs, the reference CPU and the plurality of general Cs
An interface unit interconnecting the PU and a reset pulse generation unit for sending a reset pulse to the general CPU according to an instruction from the standard CPU unit, and the standard CPU is set for each of the general CPUs. By executing the sequence program, the general C
A runaway monitoring means for monitoring the runaway of the PU, and a reset pulse sending instruction means for sending the reset pulse to the runaway CPU when the monitoring means finds the runaway CPU are provided.

[0006]

The present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of an embodiment of the present invention.

The CPU section 2 is constantly initialized by the reset pulse 6 having a constant cycle supplied from the constant cycle reset pulse generating section 1. This CPU unit 2 and n CPU units 4a,
..., 4n are the interface unit 3 and the buses 7, 8
, 8n are connected to each other. Also, C
The PU unit 2 controls the reset pulse generating unit 5 via the bus 7. The reset pulse generating section 5 has a function of sending reset pulses 9a, ..., 9n to the CPU sections 4a ,. Then, the CPU section 2 is used as a reference CPU, and the CPU sections 4a, ..., 4n, which are general CPUs, are monitored by this CPU section 2.

That is, the CPU section 2 causes the CPU sections 4a to 4n to execute the program of the determined sequence. Then, the CPU unit 2 does not execute the normal program C
The PU unit 2x is detected and, for example, if the CPU unit 4n is not executing a normal program, it is considered that the CPU unit 4n is running out of control, and the reset pulse generating unit 5 is controlled to send the reset pulse 9n to the CPU unit 4n. Send out. Then,
The CPU unit 4n is initialized and returns to the normal state. The time from this runaway to the normal recovery is determined by the cycle of the reset pulse 6.

[0009]

As described above, according to the present invention, a plurality of C
A malfunction of the system due to a runaway of a CPU in the PU is set as a reference CPU, and the general CPU is regularly diagnosed under the control of the reference CPU, so that the runaway CPU can be quickly returned to normal. .. Therefore, the runaway detection method of this multiple CPU system is based on multiple C
It is particularly effective in a system such as a communication device using a PU.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a block diagram of a runaway detection method of a conventional multiple CPU system.

[Explanation of Codes] 1 fixed-cycle reset pulse generator 2, 4a, 4n, 22a, 22b, 22n CPU unit 3,21 interface unit 5 reset pulse generator 6, 9a, 9n, 26 reset pulse 7, 8a, 8n, 24 bus 23a, 23b, 23n counter 25 reset pulse

Claims (1)

[Claims] 1. A fixed-cycle reset pulse generator for generating a fixed-cycle reset pulse, a reference CPU initialized by the fixed-cycle reset pulse, and a plurality of general CPs.
U, an interface unit interconnecting the reference CPU and the general CPUs, and the reference CPU
A reset pulse generator for sending a reset pulse to the general CPU according to an instruction from the reference CPU.
However, a runaway monitoring means for monitoring the runaway of the general CPU by executing a program in a predetermined sequence in each of the general CPU, and the runaway C by the monitoring means.
A runaway detection system for a plurality of CPU systems, characterized in that the reset pulse generating section is provided with reset pulse sending instruction means for sending the reset pulse to the runaway CPU when a PU is found.