JPH05225135A - Terminal noninterruption on-line system - Google Patents

Abstract

PURPOSE:To provide the terminal noninterruption on-line system which does not interrupt a session with a terminal even if a fault occurs in an execution host. CONSTITUTION:The host consists of a hot stand-by system composed of the execution host 1-0 and a stand-by host 1-1. An FEP4 consists of an in-use system 30-0 and a stand-by system 30-1. If a fault occurs in the execution host 1-0, the FEP4 holds a telegraphic message from the terminal in line adapters 35-0 and 35-1 and holds a telegraphic message to be transferred to the host in LAN adapters 36-0 and 36-1. When the stand-by host 1-1 takes over a process, the FEP4 transfers the telegraphic message, held in the LAN adapter 36-0, to the stand by host 1-1 at a time. The stand-by host 1-1 executes the telegraphic message which is received at a time in order. Consequently, even if the fault occurs in the execution host, the session with the terminal is not interrupted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a terminal uninterrupted online system, and more particularly to a terminal uninterrupted online system which does not interrupt a session with a terminal even if a host failure or a front end processor failure occurs.

[0002]

2. Description of the Related Art In order to improve the performance and reliability of an online system, a high-speed LAN includes a host that performs general business processing and a front-end processor (hereinafter referred to as FEP) that executes host communication processing. The configuration in which the terminal is connected to the FEP and the terminal is connected to the FEP is generalized.

As a conventional online system, for example, "Information Processing Society of Japan, Vol. 30, No. 2, (198)
9), pages 214 to 225 ”are known. In this online system, the host has a configuration in which one spare host is provided for every two execution hosts, and the FEP has a configuration in which one spare FEP is provided for a plurality of active FEPs. The terminal sends a message to the execution host via FEP, and the execution host processes the message. When a failure occurs in the execution host, the spare host starts the execution host takeover process. FEP
Holds the message to be transferred to the host until the handover process is completed. When the host takes over, the FE
P collectively transfers the held electronic messages to the backup host. Then, the backup host executes the processing of the received message.

[0004]

In the above-mentioned conventional online system, the host does not manage the status of all messages, so even if a failure occurs, it is not possible to determine at what point the failure occurred. Suspend some sessions. Furthermore, FEP does not make itself redundant, so FEP
When an EP failure occurs, the message received from the terminal is lost,
Request the terminal to resend the message. As a result, if a host failure or FEP failure occurs, the session between the host, FEP, and terminal is interrupted.

Therefore, it is an object of the present invention to provide a terminal non-interruption online system capable of preventing the interruption of a session even if a host failure or an FEP failure occurs.

[0006]

To achieve the above object, the present invention provides a host, a front-end processor, and a high-speed LAN for a host configured by a hot standby system in which an execution host and a spare host share a disk device. In an online system connected via
It manages the status of all telegrams, and the front-end processor has a dual configuration of the active system and the standby system. The active system and the standby system are line adapters connected to the lines to the terminals and LAN adapters connected to the high-speed LAN. Each of the line adapters is equipped with a storage device for holding a telegram received from the terminal, and when receiving a telegram from the terminal, the terminal is connected to both the active and standby line adapters and those storage devices are stored. The LAN adapter is equipped with a storage device for holding the transmission message to the executing host, and the message to be transferred to the host is stored in both the active and standby LAN adapters while the host is stopped. (EN) Provided is a terminal uninterrupted online system which is held in a device.

[0007]

The host has a hot standby configuration in which the execution host and the spare host share the disk device, and manages the status of all messages. Therefore, even if a failure occurs in the execution host, the spare host can resume all the messages that are being executed.

The FEP has a dual structure of an active system and a standby system, and a line adapter and a LAN adapter are provided for each.
The message received from the terminal is saved in the storage device of the line adapter, and the message transferred to the host is saved in the storage device of the LAN adapter. Therefore, even if a failure occurs in FEP, it is possible to prevent the loss of the message from the terminal and the message transferred to the host.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A terminal uninterrupted online system (1000) according to an embodiment of the present invention will be described below. The present invention is not limited to this.

As shown in FIG. 1, a terminal uninterrupted online system (1000) according to the present invention comprises a host computer (1), a high speed LAN (3), an FEP (4), a line (5) and a large number of terminals (6). ). The host computer (1) is composed of an execution host (1-0) and a spare host (1-1). Disk device (2) shared by the execution host (1-0) and the spare host (1-1)
The dual configuration is used for high reliability.

FIG. 2 is a block diagram of the host computer (1). Execution host (1-0) and spare host (1-
1) are processor IPs (10-0, 10-).
1), memory MS (11-0, 11-1), system controller SC (12-0, 12-1), host I / O processor HIOP (13-0, 13-1), channel CH
(14-0, 14-1), host LAN controller HLNC (15-0, 15-1) and host disk controller HDKC (16-0, 16-1).

The execution host (1-0) and the spare host (1-
1) are connected by an inter-channel coupling device CTCA (17). The timers (18-0, 18-1) are provided in the host I / O processors HIOP (13-0, 13-1), respectively. In order for the spare host (1-1) to take over the processing of the execution host (1-0), the host journal showing the checkpoint data and I / O history of the host is the disk device (2-0, 2-1). ).

FIG. 3 is a block diagram of the FEP (4). F
EP (4) is an active system (30-0) and a standby system (30-).
1), shared memory (50-0, 50-1), time stamp timer (51), line switching device (52), system bus (5)
3) and disk devices (54-0, 54-1). The active system (30-0) and the standby system (30-1) are connected to each other by a bus and are configured by a hot standby system.

The active system (30-0) is a processor (31
-0), memory (32-0), IOP (33-0), bus extender (34-0), line adapter (35-
0), a LAN adapter (36-0) and a disk controller (37-0). The standby system (30-1)
Processor (31-1), memory (32-1), IOP
(33-1), bus extender (34-1), line adapter (35-1), LAN adapter (36-1) and disk controller (37-1).

The line adapters (35-0, 35-1) are
It has a reception queue (40-0, 40-1) and holds a telegram received from the terminal (6). Further, it has a transmission queue (41-0, 41-1) and holds a message to be transmitted to the terminal (6). LAN adapter (36-0,36
-1) has a reception queue (42-0, 42-1) and holds a telegram received from the host (1). Also,
It has a transmission queue (43-0, 43-1) and holds a message to be transmitted to the host.

Disk controller (37-0, 37-1)
Holds write data or read data for the disk device (54-0, 54-1), and the disk device (54-
0, 54-1).

When the line switching device (52) receives a message from the terminal (6), the terminal (6) can receive the active system (30-0) and the standby system (30-1) at the same time. Are connected to the active system (30-0) and the standby system (30-1). When sending a message to the terminal (6), the active system (3
The terminal (6) is connected to the active system (30-0) so that the electronic message can be transmitted from 0-0).

The shared memories (50-0, 50-1) store the same contents as a duplicated structure, and prevent the system from going down even if a failure occurs. Similarly, the disk devices (54-0, 54-1) also store the same contents as a duplicated structure so that the system does not go down even if a failure occurs.

The time stamp timer (51) is used to add a time stamp to a message received from the terminal (6). In the shared memory (50-0, 50-1), in order to manage the telegram during the process execution, the telegram area under the FEP process execution (60-
0, 60-1) and the message area under host processing execution (61-
0, 61-1). In addition, in order to manage the processed message, the processed message area (62-0, 6
2-1) is provided. Further, a takeover information area (63-0, 63-1) is provided to manage checkpoint data for taking over.

In the FEP (4), the working line adapter (35-0) and the standby line adapter (35-1) are used.
Holds the received message (70) from the terminal (6), and the active LAN adapter (36-0) and the standby LAN adapter (36-1) send the transmitted message (73) to the host (1). Hold. As a result, even if one of the FEP working system (30-0) and the FEP standby system (30-1) fails, the message is not lost. Further, during the execution of the electronic message processing, the time of writing processing to the disk device (54-0, 54-1) is set as the point of processing takeover, and the processor (31-0, 31
-1) register, I / O wait factor and its register,
The information of the register of the message in the ready state is written as checkpoint data in the shared memory (50-0, 50-1). As a result, even if a failure occurs in the FEP active system (30-0), the standby system (30-1) still has the shared memory (5
By referring to the checkpoint data stored in 0-0, 50-1), it is possible to restart the processing execution of all the electronic messages from the latest checkpoint.

FIG. 4 is a diagram showing an outline of processing of the system (1000). During execution of message processing, the execution host (1-0) uses host checkpoint data indicating message management information, task information, and I / O information, and a host journal indicating I / O history as disk devices. It is stored in (2) (process 100).

When a failure occurs in the executing host (1-0), the spare host (1-1) refers to the disk device (2) and reads the checkpoint data of the host and the journal of the host (process 102). , The contents of the file and the communication status of the message are returned at the checkpoint and inherited from the message processing at the checkpoint. FEP (4) is
When the telegrams from the terminal (6) to the host (1) are received during the switching from the execution host (1-0) to the spare host (1-1), the telegrams are transmitted to the LAN adapters (36-0, 36).
-1) is held (process 103).

From the execution host (1-0) to the spare host (1
When the switching to (-1) is completed, the FEP (4) collectively transfers the held electronic messages to the host (1) (Process 1).
04). The spare host (1-1) receives the electronic message and executes the process.

FIG. 5 is a diagram showing an outline of the processing of FEP (4). The line adapter (35-0, 35-1) receives the message body from the terminal (6) (process 120), adds a time stamp, and stores it in the reception queue (40-0, 40-1). (Process 121). In FIG. 6, a message (7) with a time stamp (72) attached to the message body (71) received from the terminal (6).
The format of 0) is shown.

The active processor (31-0) takes out the message (70) from the reception queue (40-0) of the line adapter (35-0) (process 122), and the host (1).
It is determined whether it is a message to be transferred to or a message processed by FEP (4).

When it is determined that the message is processed by the FEP (4), the active processor (31-0) determines that the message body (7).
1) is written in the memory (32-0) (process 123),
The process corresponding to the electronic message body (71) is executed. Further, the time stamp (72) is assigned to the F of the shared memory (50-0, 50-1).
The EP message is written in the telegram area under execution of processing (60-0, 60-1) (processing 124). When the processing corresponding to the message body (71) is completed, the transmission message to the terminal (6) is sent to the transmission line queue (41-0) of the active line adapter (35-0).
(Processing 125). Further, the time stamp (72) of the message which has been processed is stored in the shared memory (50-0, 50-1).
Is written in the processed message area (62-0, 62-1).

When it is determined that the message is to be transferred to the host (1), the active processor (31-0) sends the message (70) to the transmission queue (43-0) of the LAN adapter (36-0). It is stored (process 129). In addition, the time stamp (7
2) is written in the host processing executing message area (61-0, 61-1) of the shared memory (50-0, 50-1) (processing 128).

The LAN adapter (36-0) receives the message body sent from the host (1) which has finished processing the message (process 130), and adds a time stamp to the reception queue (42-). 0). FIG. 7 shows the format of a message (73) in which the time stamp (72) is added to the message body (74) received from the host (1). Active processor (3
1-0) retrieves a telegram (73) from the reception queue (42-0) of the LAN adapter (36-0) and puts the telegram body (74) into the transmission queue of the line adapter (35-0). The data is transferred to (41-0) (process 131).

The line adapter (35-0) transmits the electronic message stored in the transmission queue (41-0) to the terminal (6) (process 126). As shown in FIG. 8, the transmission message (75) to the terminal (6) is composed only of the message body (76).

On the other hand, the standby processor (31-1) is
At regular intervals, the time stamp (72) is read from the host processing executing message area (61-0, 61-1) of the shared memory (50-0, 50-1) (processing 135), and the corresponding message (70) is read. ) Is stored in the transmission queue (43-1) of the LAN adapter (36-1) (process 136). In addition, the process-executed message area (62-0, 62-1) of the shared memory (50-0, 50-1) is read at regular intervals (process 133), and the time stamp (72) indicating that the process is completed. ) And find the corresponding telegram (70) on the line adapter (3
It is removed from the reception queue (40-1) of 5-1) and the transmission queue (43-1) of the LAN adapter (36-1) (process 134).

Next, the registers used in the host (1) will be described with reference to FIGS. 9 to 15. Figure 9
This is a spare host alive register (20-0) of the execution host (1-0). The execution host (1-0) is
It receives an alive message from the spare host (1-1) and monitors whether it is normal. Alive for spare host
The e register (20-0) uses only bit 0, and if bit 0 is “1”, the alive message has been transmitted,
If it is “0”, it means that the alive message has not been transmitted.
FIG. 10 shows an execution host a possessed by the spare host (1-1).
It is a live register (20-1). Spare host (1
-1) receives an alive message from the execution host (1-0) and monitors whether it is normal. The execution host alive register (20-1) uses only bit 0. If bit 0 is “1”, it means that the alive message has been transmitted, and if it is “0”, it means that the alive message has not been transmitted.

FIG. 11 shows the F of the execution host (1-0).
The EP alive register (21-0) is shown. The execution host (1-0) receives the alive message from the FEP (4) and monitors whether it is normal. The FEP register (21-0) uses only bit 0, and bit 0
If is "1", the alive message has been sent, "0"
If so, it means that the alive message has not been transmitted. 12
Shows the FEP alive register (21-1) of the spare host (1-1). The spare host (1-1) is
It receives an alive message from FEP (4) and monitors whether it is normal. FEP register (21-1)
Uses only bit 0, and if bit 0 is "1", al
The live message has been transmitted, and if it is “0”, it means that the alive message has not been transmitted.

FIG. 13 shows a reception message counter (22-) possessed by the executing host (1-0) and the spare host (1-1).
0, 22-1) is shown. The reception message counter (22-0) of the execution host (1) is FEP of the execution host (1-0).
The number of messages received from (4) and stored in the queue is shown. The reception message counter (22-1) of the spare host (1-1) is not normally used, but the execution host (1-0)
This is used when a failure occurs in the switch and switching to the spare host (1-1). Received message counter (22-0, 22-
1) has an 8-bit configuration.

FIG. 14 shows the congestion reference value register (23-) possessed by the executing host (1-0) and the spare host (1-1).
0, 23-1) is shown. The congestion reference value register (23-0) of the execution host (1-0) is set with the congestion reference value at system startup. If the number of received messages exceeds this congestion reference value, it is determined to be in a congestion state. Spare host (1-
The congestion reference value register (23-1) of 1) is not normally used, but is used when the execution host (1-0) fails and is switched to the spare host (1-1).

FIG. 15 shows the congestion release reference value register (2) held by the executing host (1-0) and the spare host (1-1).
4-0, 24-1) is shown. The congestion cancellation reference value register (24-0) of the execution host (1-0) is set with the congestion cancellation reference value when the system is started up. During the congestion state, if the number of received messages falls below the congestion release reference value, it is determined to be the congestion release state. When the congestion cancellation reference value register (24-1) of the spare host (1-1) is not normally used and a failure occurs in the execution host (1-0) and the spare host (1-1) is switched to, use.

The above-mentioned alive registers (20-0, 2
0-1, 21-0, 21-1), reception message counter (2
2-0, 22-1), congestion reference value register (23-0,
23-1), congestion release reference value register (24-0, 24
-1) is a LAN controller HLANC (15-0,
15-1).

FIG. 16 is a state transition diagram of FEP (4). The active state (150) is a state in which processing is being executed normally including all the line specific parts. Quasi-active state (15
In 1), there is a failure in a part of the line-specific part, but the failure part is blocked and processing is being executed. Standby state (152)
Indicates that the telegram is being received in synchronization with the active system,
When a failure occurs in the active system, the processing can be immediately taken over. The offline state (153) is a state in which the system is disconnected from the system due to a failure or maintenance. The repair state (154) is a state in which recovery from a failure is in progress or a state in which startup is in progress.

In the active state (150), if a line fault occurs, the active state (150) changes to the semi-active state (15).
1) (state transition 155), and if a system failure occurs, transition to the offline state (153) (state transition 15)
7). In the quasi-working state (151), when recovering from the line failure, the state changes to the working state (150) (state transition 15
6) If a new line fault occurs, if possible, block the line fault and stay in the semi-active state (151).
If not possible, transition to the offline state (153) (state transition 160). Further, when a system failure occurs, the system transits to the offline state (153) (state transition 160). In the standby state (152), when the active system (30-0) transits to the offline state (153), it transits to the active state (150) (state transition 158), and when a system fault or a line fault occurs, an offline state ( 153) (state transition 159). When the restoration is completed in the offline state (153), the state transits to the restoration state (154) (state transition 16
4). In the repair state (154), when the electronic message (72) is received, the standby state (152) is entered (state transition 162), and when the system failure or the line section failure occurs, the offline state (153) is entered ( State transition 16
3).

FIG. 17 shows the shared memory (5) of the FEP (4).
It is a mode transition diagram of 0-0,50-1). The double mode (170) has two shared memories (50-0, 50-
1) is a normal state. Writing is done in shared memory (50-
0, 50-1) and read from one shared memory (50-0). Single mode (171)
Indicates a state where a failure has occurred in one of the shared memories (50-0, 50-1). Writing and reading are performed in the normal shared memory. The quasi-double mode (172) is a state in which one of the faulty shared memories has recovered from the fault and the normal contents of the shared memory are being copied. Writing is performed to both shared memories (50-0, 50-1), and reading is performed from a normal shared memory. Repair mode (173)
Indicates a state in which both of the shared memories (50-0, 50-1) are being recovered from the failure or being started up. The down mode (174) is a state in which both shared memories (50-0, 50-1) cannot be used due to a failure or maintenance.

In the double mode (170), if a failure occurs in one shared memory, the single mode (17
1) (mode transition 175). In the single mode (171), if a failure occurs in the normal shared memory, transition to the down mode (170) (mode transition 1
80). Further, when the shared memory in which the failure has occurred is repaired, it transits to the quasi-double mode (172) (mode transition 176). In the quasi-double mode (172), when the normal contents of the shared memory have been copied to the restored shared memory, the mode changes to the double mode (170) (mode transition 177). Also, if a failure occurs in the normal shared memory, it transits to the down mode (174) (mode transition 1
81). Further, when a failure occurs again in the restored shared memory, the mode transits to the single mode (171) (mode transition 179). When both shared memories (50-0, 50-1) are restored in the down mode (174), the state transits to the restoration mode (173) (mode transition 178). In the repair mode (173), both shared memories (50-
When the repair of 0,50-1) is completed, double mode (1
70) (mode transition 182).

FIG. 18 shows a shared memory (5) of FEP (4).
It is an explanatory view of the exclusive control system of 0-0, 50-1). The shared memory (50-0, 50-1) includes an active system monitoring area (200-0, 200-1), a standby system monitoring area (201-0, 201-1) and a takeover information area (202-0). , 202-1). The FEP working system (30-0) is a working system monitoring area (200-0, 2).
00-1) can be read / written (210). Further, the standby system monitoring areas (201-0, 201-1) can be read (211). The takeover information area (202-0, 202-1) can be read / written (212). The FEP standby system (30-1) can read the active system monitoring area (200-0, 200-1) (21
3). In addition, the standby system monitoring area (201-0,
201-1) can be read / written (214). Further, the takeover management area (202-0, 202-1) can be read (215). With such a configuration, the active system (30-0) and the standby system (30-1) can exclusively control the shared memory (50-0, 50-1). It should be noted that the above-mentioned FEP processing executing message area (60-
0, 60-1), message area under host processing (61-
0, 61-1), processing executed message area (62-0, 6)
2-1) and handover information area (63-0, 63-
1) is a takeover management area (202-0, 202-
Provided in 1).

FIG. 19 is a detailed circuit diagram of FEP (4). Since the active system (30-0) and the standby system (30-1) have the same configuration, the standby system (30-1) is simplified in FIG. Also, in the active system (30-0), (5 **
-0,6 **-0) is (5 **-
1, 6 **-1).

The processors (31-0, 31-1) are, for example, 68000 microprocessors. The internal registers of the processor (31-0, 31-1) are data registers DR0 to DR7 (500-0 to 507-0,500).
-1 to 507-1), address registers AR0 to AR6
(510-0 to 516-0, 510-1 to 516-
1), stack pointer AR7 (520-0, 520-
1), status register SR (521-0, 521-
1), program counter PC (522-0, 522-
It consists of 1).

The signal lines of the processors (31-0, 31-1) are the data lines D0-D7 (540-0, 540-).
1), address lines A1 to A23 (541-0, 541-
1), interrupt line (processors L0-2) (543-0
545-0, 543-1 to 545-1) and W / R lines (546-0, 546-1). W / R line (5
46-0, 546-1) is a read cycle when "H" and a write cycle when "L".

The IOP (33-0, 33-1) includes an IO processor (570-0, 570-1) and a buffer (57).
1-0,571-1), ROM (572-0,572-)
1) and RAM (573-0, 573-1). The buffer (571-0, 571-1) has a telegram to be sent to the terminal (6) and a disk device (54-0, 5).
The write data to 4-1) is stored.

Further, timers (530-0, 530-
1), an address decoder (531-0, 531-1) and an interrupt encoder (532-0, 532-1) are provided.

FIG. 20 shows the working system (30-) of FEP (4).
It is a figure which shows the memory map of 0) and a standby system (30-1). The active system memory map (581-0) and the standby system memory map (581-1) are the same.

In the shared memory (50-0, 50-1), the addresses (000000/16 to 0FFFFF / 16) are assigned to 0 to α1 ...
0,200-1) α1 to α2 ……………… Standby system monitoring area (201-
0, 201-1) α2 to 0FFFFFF / 16 ... Handover management area (202-0,
202-1) is divided into three areas for use.

Memory (32-0) of active system (30-0)
The memory (32-1) of the standby system (30-1) stores the address (100000/16 to FFFFFF / 16) in 100000/16 to β ... OS area (583-0, 58).
3-1) β to γ ……………… Program area (585-0,58
5-1) γ to FFFFFF / 16 ... Reserved area (586-0, 58
It is used by dividing it into three areas of 6-1).

FIG. 21 is a detailed circuit diagram of the bus extenders (34-0, 34-1) of FEP (4). Address lines A20-A23 of the active processor (31-0)
If (541-0) are all "L", the shared memory (50-
0, 50-1) and otherwise access the active memory (32-0). The same applies to the standby processor (31-1).

Control signal (55) of the active bidirectional driver
5-0), the address lines A20 to A23 (541-0) of the active processor (31-0) are all "L", and W
When the / R line (546-0) is "H", the shared memory (50
-0, 50-1) is read, and when it is "L", writing to the shared memory (50-0, 50-1) is performed. Control signal for the standby bidirectional driver (555-1)
Is also the same.

Next, referring to FIGS. 22 to 25, the FEP
The register used in (4) will be described. These registers are provided in the active system monitoring areas (200-0, 200-1) of the shared memory (50-0, 50-1). FIG. 22 shows system status registers (256-0, 256-1), which are the FEP working system (30-0) and the FEP standby system (30
-1) shows the current state. Bit 4 indicates whether or not it is in the active state. Bit 3 indicates whether or not it is in the semi-active state. Bit 2 indicates whether it is in the standby state. Bit 1
Indicates whether it is in a repaired state. Bit 0 indicates whether it is in the offline state. Bits 7-5 are unused. FIG. 23 shows an alive register (257-0, 25
7-1), and the active system (30-0) and the standby system (30-).
In 1), the alive messages are exchanged with each other and used to monitor whether they are normal. Only bit 0 is used, if it is "1", the alive message has been sent,
If it is “0”, it means that the alive message has not been transmitted.

FIG. 24 shows an interrupt register (258-0,
258-1) and indicates whether an interrupt has occurred. Bit 6 (level 6) interrupt represents an emergency fault interrupt. Bit 4 (level 4) interrupt represents a fault interrupt. Bit 2 (level 2) interrupt represents a timer interrupt. The higher the number of levels, the higher the priority. Bits 7, 5, 3, 1, 0 are not used.
In addition, the failure mentioned here is a system failure.

FIG. 25 shows an alive register (259-0, 259-1) for the host, which is used to monitor whether the host (1) is normal. Only bit 0 is used, if it is "1", the alive message has been sent,
If it is “0”, it means that the alive message has not been transmitted.

FIG. 26 shows the working system (30-) of FEP (4).
It is a figure which shows the control circuit of the timer interruption of 0). The timer (530-0) uses the clock (550-0) and alive.
It has an e-message counter (551). The clock (550-0) increments the counter value of the alive message counter (551) by “+1” every 10 ms. For example, if the interrupt occurs after 1 second, the counter value is "10.
When it increases by 0 ", an interrupt is generated in the processor (31-0). The timer interrupt control circuit of the standby system (30-1) is also the same.

FIG. 27 is a detailed circuit diagram of the line adapter (35-0, 35-1) of FEP (4). The line adapters (35-0, 35-1) are connected to the processor (590-
0,590-1), memory (591-0,591-)
1), a buffer (592-0, 592-1) and a line controller (593-0, 593-1).

In the buffer (592-0, 592-1), a queue (40-0, 40-1) for receiving a message,
A transmission queue (41-0, 41-1) is provided. The message receiving queue (40-0, 40-1) stores the message received from the terminal (6). The transmission queue (41-0, 41-1) stores a message to be transmitted to the terminal (6). Line control unit (593-0, 593-1)
In the line specific section (594-0,
594-1) is provided.

FIG. 28 is a detailed circuit diagram of the FEP (4) LAN adapter (36-0, 36-1). The LAN adapter (36-0, 36-1) is a processor (600
-0,600-1), memory (601-0,601-)
1), buffers (602-0, 602-1) and LA
The N control unit (602-0, 602-1) is used. The buffers (602-0, 602-1) include a message reception queue (42-0, 42-1) and a transmission queue (4).
3-0, 43-1). The message receiving queue (42-0, 42-1) stores the message received from the host (1). Transmission queue (43-0, 43-
The electronic message transmitted to the host (1) is stored in 1).

FIG. 29 is a diagram showing the transfer mode registers (44-0, 44-1) of the FEP (4). The transfer mode registers (44-0, 44-1) are registers that indicate whether or not the FEP (4) collectively transfers electronic messages to the host (1). Only bit 0 is used, "1" means batch transfer mode, and "0" means normal transfer mode. Normally, only the transfer mode register (44-0) of the active system (30-0) is used and the transfer mode register (44-1) of the standby system (30-1) is not used.

FIG. 30 is a detailed circuit diagram of the line switching device (52) of the FEP (4). Conflict prevention circuit (55)
Allows the active system (30-0) to transmit and receive, and the standby system (30-1) can only receive.

Next, referring to FIGS. 31 to 34, the FEP
The software configurations of (4) and the host (1) will be described. FIG. 31 is a diagram showing the software configuration of the active system (30-0) of FEP (4). Working system (30-0)
Receives an interrupt (700) and analyzes the interrupt type (701). The emergency fault interrupt (702) is level 6,
Fault interrupt (703) is level 4, timer interrupt (7
04) is executed at level 2.

In the emergency failure interrupt (702), the shared memory recovery processing (715) is executed in order to cope with the redundant failure of the shared memory (50-0, 50-1).
In the shared memory recovery process (715), the contents of the shared memory (50-0, 50-1) are copied to the disk device (54-
0, 54-1) to the active memory (32-0).

In the fault interrupt (703), a standby system disconnection process (711), a standby system connection process (712), and an execution host fault notification process (713) are executed. The standby system disconnection processing (711) sets the standby system (30-1) to the offline state (153) when a failure occurs in the standby system (30-1). After that, the processing is continued only in the active system (30-0). In the standby system connection processing (712), the standby system (30-1) that has recovered from the failure is placed in a standby state, and returns to the duplex operation. The host failure notification process (713) is executed from the executing host (1-0) alive even after a certain period of time has elapsed.
When the message is not received, the failure of the executing host (1-1) is notified to the spare host (1-1).

In the timer interrupt (704), the standby system (3
0-1) alive message transmission processing (721) for failure detection, alive message reception confirmation processing (722) for this, and execution host (1-0)
Alive message transmission processing (723) for detecting the failure of the above, an alive message reception confirmation processing (724) for this, and a shared memory backup processing (725) are executed. The standby-system alive message transmission processing (721) periodically transmits an alive message to the standby system (30-1). Standby system aliv
The e-message reception confirmation process (722) is performed by the active system (3
0-0) is the last alive from the standby system (30-1)
It is checked whether an alive message is received within a fixed time after receiving the message. Host aliv
The e-message transmission process (723) is periodically ali.
The ve message is transmitted to the execution host (1-0). Host alive message reception confirmation processing (724)
Checks whether the next alive message has been received within a fixed time after receiving the last alive message from the execution host (1-0). The shared memory backup process (725) is performed by the shared memory (50-0,
The contents of the shared memory (50-0, 50-1) are periodically stored in the disk device (54-0, 54-1) in order to prepare for the redundant failure of (50-1).

When the interrupt processing is completed, the active system (30-
0) executes a message processing (730). Message processing (7
30) uses the writing process to the disk device (50-0, 50-1) as a checkpoint, and stores the checkpoint data (81) for each checkpoint in the shared memory (50).
-0,50-1) takeover information area (63-0,6)
It is stored in 3-1). When the message processing (730) is completed, the time stamp (72) of the message is added to the processed message area (6
2-0, 62-1).

FIG. 32 shows the standby system (30-
It is a figure which shows the structure of the software of 1). Standby system (3
0-1) is an interrupt (75) like the active system (30-0).
0) is received. The interrupt type analysis process (751) analyzes the fault interrupt (752) or the timer interrupt (753). In the fault interrupt (752), checkpoint data (81) in the takeover information area (63-0)
Referring to, the takeover process of the active system (30-0) (76
Execute 1).

In the timer interrupt (753), the active system al
Ive message transmission process (771), active system ali
The ve message reception confirmation process (772), the host transfer message check process (773), and the end message check process (774) are executed. The active-system alive message transmission process (771) periodically transmits an active message to the active system (30-0). Working system ali
The reception confirmation process (772) of the ve message checks whether or not the next alive message is received within a fixed time after receiving the last alive message from the active system (30-0). In the host transfer message check processing (773), the active system (30-0) uses the shared memory (5
0-0,50-1) Host processing in progress message area (6
The time stamp (72) written in 1-0, 61-1) is read out, and the corresponding telegram (73) is sent to the standby system (30-1) L
Transmission queue (43- of the AN adapter (36-1)
Store in 1). End message check processing (774)
Indicates that the active system (30-0) is a shared memory (50-0, 50
-1) Process executed message area (62-0, 62-1)
The time stamp (72) written in is read, and the corresponding message is received by the reception queue (40-1) of the line adapter (35-1) of the standby system (30-1) and the LAN adapter (36-).
It is removed from the transmission queue (43-1) of 1).

FIG. 33 shows the software configuration of the execution host (1-0). Execution host (1-0)
Receives an interrupt (800) and analyzes the interrupt type (801). Interrupts include a fault interrupt (802) and a timer interrupt (803).

In the fault interrupt (802), the spare host (1-1) is disconnected (811) and the spare host (1) is disconnected.
The connection process (812), the congestion process (813) and the congestion release process (814) of -1) are executed. In the spare host disconnection process (811), when a failure occurs in the spare host (1-1), the spare host (1-1) is disconnected, and the process is continued only by the execution host (1-0). When the spare host (1-1) recovers from the failure, the spare host connection processing (812) returns to the duplex operation with the executing host (1-0). The congestion process (813) causes the FEP (4) to suspend the transmission of the electronic message. Congestion release processing (814) is FE
P (4) restarts the transmission of the electronic message.

In the timer interrupt (802), reception confirmation processing of the spare host alive message (821), transmission processing of the spare host alive message (822), F
Reception confirmation processing of the EPalive message (823),
Transmission processing of spare host alive message (824)
And host and FEP timer coincidence control processing (82
Execute 5). The standby host alive message reception confirmation processing (821) checks whether or not the next alive message is received within a fixed time after receiving the final alive message from the standby host (1-1). Transmission processing of spare host alive message (8
22) periodically sends an alive message to the backup host (1-1). The reception confirmation processing (823) of the FEPalive message receives the next a message within a fixed time after receiving the final alive message from the FEP (4).
Check if you receive a live message.
The transmission process (824) of the FEPalive message is
Periodically send an alive message to FEP (4). Host and FEP timer match control processing (825)
Matches the time stamp timers (51) of all FEPs (4). In addition, the timer (18- of the execution host (1-0)
0) and the timer (18-1) of the spare host (1-1) are matched. When these processes are completed, the message process (83
0) is restarted.

FIG. 34 is a diagram showing the software configuration of the spare host (1-1). Spare host (1-1)
Receives an interrupt (850) and analyzes the interrupt type (851). Interrupts include a fault interrupt (852) and a timer interrupt (853).

In the fault interrupt (852), the takeover process (861) of the executing host is executed with reference to the takeover information of the disk device (2-0, 2-1).

In the timer interrupt (853), execution host alive message reception confirmation processing (871) and execution host alive message transmission processing (872).
To execute. The execution host alive message reception confirmation processing (871) checks whether the next alive message is received within a fixed time after receiving the final alive message from the execution host (1-0). Execution host alive message transmission processing (87
2) periodically transfers an alive message to the execution host (1-1).

FIG. 35 is a diagram showing an outline of message processing (830) in the execution host (1-0). Message processing (83
In 0), a telegram is received from FEP (4). This state is called a reception state (261). Next, the disk device (2
Read the required data from -0, 2-1). This state is called a read state (262). Then, the electronic message processing is executed. After that, the processing result is stored in the disk device (2-0, 2
Write in -1). This state is called a writing state (263). Finally, the terminal (6) response is returned. At this time, a state where no ACK is received from the terminal (6) is called a transmitting state (264), and a state where an ACK is received is called a transmitted state (265).

FIG. 36 is a diagram showing a message management table (260). The message management table (260) is the same as the above 5
The state of one message is managed by bits 4, 3, 2, 1, 0. Bits 7-5 are not used.

Next, five operation examples will be described. <Operation Example 1: Processing when Execution Host (1-0) Fails> FIG. 37 shows the host (1), FEP (4), and terminal (6) when a failure occurs in the execution host (1-0). It is a figure which shows the outline of the processing procedure of. The terminal (6) sends a message (71) to the FEP (4) (process 900). The FEP (4) transfers the message (73) to the execution host (1-0) (process 90).
1). The execution host (1-0) periodically sends an alive message to the backup host (1-1) (process 9).
03) cannot be sent if a failure occurs (Processing 90)
2). Therefore, the spare host (1-1) detects a failure of the execution host (1-0) (process 904), and all F
The EP (4) is notified of the failure occurrence (process 905).

Upon receiving the notification of failure occurrence, the FEP (4) starts holding electronic messages including the electronic messages that the execution host (1-0) could not receive (process 906). The spare host (1-1) refers to the journal and checkpoint data of the executing host (1-0) and executes the takeover process (process 907). When the transfer process is completed, F
EP (4) is notified of the completion of the takeover process (process 908).

Upon receiving the notification of the completion of the takeover process, the FEP (4) collectively transfers the held electronic messages to the spare host (1-1) (process 909). Upon receiving the telegrams from all the FEPs (4), the spare host (1-1) refers to the time stamps (72) of the telegrams and executes the processes in the order of time (process 910).

Next, detailed procedures of the execution host (1-0) and the spare host (1-1) will be described.

FIG. 38 is a diagram showing in detail the processing procedure of the execution host (1-0). The electronic message is received and the electronic message process is executed (process 1000). The checkpoint data indicating the telegram management table (260), I / O management information, and task information is recorded in the disk device (2) at regular intervals. Further, at the time of I / O issuance, a journal showing the history of I / O is recorded in the disk device (2) (process 100).
1). When a failure occurs, the process stops (process 100).
2).

FIG. 39 is a diagram showing in detail the processing procedure of the spare host (1-1). A failure of the executing host (1-0) is detected by exchanging alive messages (Process 1
010). The exchange of the alive message with the execution host (1-0) is interrupted (process 1011). All FEPs (4) that the execution host (1-0) has failed
(Step 1012). The FEP (4) sets the transfer mode to the batch transfer mode, and interrupts the message transfer to the host (1) (process 1013). File recovery processing is performed (step 1014). That is, the execution host (1-
Recover the file with the journal of 0). Communication state recovery processing is performed (step 1015). That is,
Restore communication status. Notify all the FEPs (4) that the execution host takeover processing has ended (processing 10).
16). The FEP (4) collectively transfers the message to the spare host (1-1), and transits from the collective transfer mode to the normal transfer mode (process 1018). Messages are collectively received from all FEPs (4) (process 1018). The messages received in a batch are processed in the order of time stamps (Process 1
019).

FIG. 40 is a diagram showing the concept of a failure detection method of the execution host (1-0) by an alive message. The execution host (1-0) is alive, for example, every one second.
e-message to spare host (1-1) and FEP
Send to (4). Spare host (1-1) and FEP
In (4), if the next alive message is not received within, for example, 2 seconds after the last alive message is received, it is determined that a failure has occurred in the execution host (1-0).

FIG. 41 is a flow chart showing the process of transmitting the spare host alive message by the executing host (1-0). When the processing for transmitting the spare host alive message (822) is activated by the timer interrupt every one second, the alive register (2) of the spare host (1-1) is activated.
0-1) is changed from "00/16" to "01/16" (Processing 10)
30).

FIG. 42 is a flow chart showing the reception confirmation processing of the execution host alive message performed by the spare host (1-1). From execution host (1-0) to final a
When the receiving confirmation process (871) of the executing host alive message is activated by a timer interrupt two seconds after receiving the live message, the alive register (2
It is determined whether 0-1) is "01/16" (process 103).
1). If the alive register (20-1) is "01/16", the execution host (1-0) determines that it is normal, and alive
The e register (20-1) is returned from "01/16" to "00/16" (process 1032). On the other hand, the alive register (2
0-1) is not "01/16", execution host (1-
It is determined that a failure has occurred in 0) (process 1033). Similarly, the FEP (4) also detects a failure of the execution host (1-0).

FIG. 43 is a diagram showing the concept of file recovery processing and communication state recovery processing performed by the spare host (1-1). The execution host (1-0) is a memory MS
The task (11-0), the I / O management information, and the message management table are written as checkpoint data (25) in the disk device (2-0, 2-1) at regular intervals (process 1020). .. The spare host (1-1) is
The history of the message management table (87) is referred to, and the status of the message in the message management table is made to match that at the time of failure (Process 1
021). Then, the checkpoint data (25) is read from the disk device (2-0, 2-1) and written in the memory MS (11-1) (process 1022). Finally, the journal (26) is referenced, and if there is an unupdated file in the file, it is updated to match the time when the failure occurred (Process 1
023). As a result, the file status and communication status are restored to the point when the failure occurred.

FIG. 44 is a diagram showing a collective message of FEP (4). Collective message is L of FEP working system (30-0)
Transmission queue (43-) of the AN adapter (36-0)
0). The FEP (4) transfers the collective electronic message by designating the start address (85) and the length (86).

FIG. 45 is a diagram showing a collective message of the spare host (1-1). Bulk telegram is a backup host (1-1)
It is stored in the LAN controller HLNC (15-1), and a reception queue is provided for each FEP (4).
The spare host (1-1) uses the time stamp (72-**) of the message.
Execute in order from the smallest message.

FIG. 46 shows the time stamp (72). The time stamp (72) is in units of 10 ms. The messages are executed in the order of time stamps, but the order can be kept within about 1 second,
The lower 7 bits of the time stamp (72) are masked and only the upper 9 bits are referred to. Therefore, 1.28 seconds (= 10 ms ×
The telegrams will be executed in order with an error of 7 bits).

Next, the working system (30-0) of FEP (4)
The processing procedure of the standby system (30-1) will be described. FIG. 47 is a diagram showing a detailed processing procedure of the active system (30-0). A message is taken out from the reception queue (40-0) of the line adapter (35-0) (process 1050).
Determine whether it is a message to be transferred to the host (1) (Process 1
051). In the case of a message transferred to the host (1), LAN
The data is stored in the transmission queue (43-0) of the adapter (36-0) (process 1052). LAN adapter (36-
0) refers to the mode register to determine whether it is the batch transfer mode (process 1060), stores it in the transmission queue (43-0) if it is the batch transfer mode (process 1061), and if it is the normal transfer mode, the host ( Transfer the message to 1) (Process 1)
062).

In the case of a message processed by FEP (4), it is determined whether the standby system (30-1) is in the standby state (process 105).
3). If the standby system (30-1) is in a standby state, it is in a redundant operation. Therefore, the writing process to the disk device (54-0, 54-1) is set as a checkpoint, and the checkpoint data is shared by the checkpoint data for each checkpoint ( 50-
0,50-1) takeover information area (63-0,63)
-1) is stored (process 1055). When the processing of the message is completed, the time stamp of the message is shared memory (50-0, 5
0-1) process executed message area (62-0, 62-
It is stored in 1) (process 1056). Standby system (30-1)
Is not in the standby state, it means that the operation is not the duplex operation, and thus the processings 1055 and 1056 are skipped (processing 105).
4).

FIG. 48 shows the takeover information writing process 1 described above.
It is a detailed flowchart figure of 055. Processor (3
1-0) saves the values of the address register AR0 (510-0) and the data register DR0 (500-0) in the memory (32-0) (process 1070). AR0
The start address of the checkpoint data is set in (510-0), and the data length of the checkpoint data is set in the data register DR0 (500-0) (process 10).
71).

Checkpoint data is stored in the shared memory (5
0-0, 50-1) takeover information area (63-0,
6-1) write 1 byte to data register DR0
The content of (500-0) is set to "-1" (process 107).
2). It is determined whether the content of the data register DR0 (500-0) is "0" (whether all the checkpoint data has been written in the takeover information area) (process 1073).
If the content of the data register DR0 (500-0) is not "0", the process returns to the processing 1074, and if "0", the address register AR0 (510- is read from the memory (32-0).
0) and the value of the data register DR0 (500-0) are recovered (process 1075).

Data registers DR0 to DR7 (500-
0, 507-0), address registers AR0 to AR6
(510-0 to 516-0), stack pointer AR7
(520-0), status register SR (521-
0), the contents of the program counter PC (522-0) are stored in the takeover information area (63-0, 63-1) (process 1076).

FIG. 49 shows the standby system (30-
It is a flowchart figure which shows the detailed process procedure of 1).
The takeover information area (62-0, 62-1) of the shared memory (50-0, 50-1) is periodically scanned and the time stamp of the electronic message is read (process 1080). The read time stamp is notified to the LAN adapter (36-1), and the LAN adapter (36-1) sends the corresponding message to the transmission queue (4
It is stored in 3-1) (process 1081). The read time stamp is notified to the line adapter (35-1), and the line adapter (35-1) sends the corresponding message to the reception queue (40-
1) is removed (process 1082).

As described above, a failure occurs in the executing host (1-0), and the FEP is in the process of taking over to the spare host (1-1).
Since (4) holds a message to be transferred to the host (1), and the execution host (1-0) manages the status of the message being executed, there is no duplication or omission of the message. It is possible to prevent disconnection of the session between the host (1) and the FEP (4).

<Operation Example 2: Processing when FEP Working System (30-0) Fails> FIG. 50 shows the host (1), FEP (4) when a failure occurs in the FEP working system (30-0). It is a figure which shows the outline of a processing procedure of a terminal (6). Terminal (6)
Sends a message (71) to FEP (4) (Processing 90)
0). The FEP active system (30-0) transfers a message to the host (1) (process 901). FEP working system (30-
When a failure occurs in 0) (processing 910), the FEP standby system (30-1) detects the failure and notifies the host (1) (processing 912).

FIG. 51 is a flow chart showing the process of taking over the FEP standby system (30-1) when a failure occurs in the FEP working system (30-0). When a failure in the active system (30-0) is detected by an alive message (Processing 1
200) and notifies the occurrence of a failure to the host (1) (process 1)
201).

By setting the system status register of the active system (30-0), the active system (30-0) is brought into the offline state (process 1202). By setting the system status register of the standby system (30-1), the standby system (30-1)
To the active state (process 1203). Alive message transmission processing and reception confirmation processing are interrupted (processing 120).
4).

The shared memory (50-0, 50-1) is read out, the telegram during the process execution is searched (process 1205), and it is determined whether the process is executed up to the checkpoint (process 1206). If it has been executed up to the checkpoint, the process restarts from the checkpoint (process 1207).
If not executed up to the checkpoint, the process is performed from the beginning (process 1208).

The time stamp of the processed message is notified to the line adapter (35-1) and LAN adapter (36-1), and the line adapter (35-1) and LAN adapter (36) are notified.
-1) is a queue (40-) for receiving the corresponding message.
1), remove from the transmission queue (43-1) (process 1209).

FIG. 52 is a detailed flowchart of the process (process 1207) for restarting the process from the checkpoint. Data registers DR0 to DR7 (500-0 to 507-) stored in the takeover information area (63-0, 63-1) of the shared memory (50-0, 50-1)
0), address registers AR0-AR6 (510-0-
516-0), stack pointer AR7 (520-
0), status register SR (521-0), and program counter PC (522-0) contents in the standby system (30
The registers are set in the processor (31-1) (-1) (process 1520). The processor (31-1) of the standby system (30-1) executes the disk device (5
The writing process (checkpoint) to 4-0, 54-1) is restarted (process 1221). As a result of the above, FE
Even if a failure occurs in the P active system (30-0), the standby system (3
0-1) takes over, so host (1) and FEP (4)
It is possible to prevent disconnection of the session.

FIG. 53 is a flow chart showing details of the process of transmitting an alive message. The transmission process of the alive message is started by a timer interrupt every one second, and the other alive register is changed from “0/16” to “1 /
16 "(process 1230).

54 and 55 are flow charts showing the details of the receiving confirmation processing of the alive message.
The reception confirmation process of the alive message in FIG.
Activated by receiving an IVE message,
Return the ve register from “1/16” to “0/16” (Process 1
231), the alive message counter is returned to "0" (process 1232). The reception confirmation process of the alive message in FIG. 55 is activated by a timer interrupt of 10 ms, and increments the alive message counter by “+1” (process 1233). alive message counter is "20"
When it becomes 0 or more (processing 1234), the active system (30-
It is determined that a failure has occurred in 0) (process 1235). a
If the live message counter is less than "200", the processing 1235 is skipped.

FIG. 56 shows the old active system (30
-0a) is a flow chart until the recovery from the failure and the duplex operation with the FEP new active system (30-1a) which is the old standby system that has taken over the processing. Old working system (30-0
When a) recovers from the failure, the repair completion is indicated by the new active system (3
0-1a) (process 1240).

The new active system (30-1a) is the old active system (3-1).
The repair completion notification (0-0a) is received (process 124).
6). Then, the checkpoint data is transferred to the shared information area (63-0) of the shared memory (50-0, 50-1).
0, 63-1) (processing 1247).

The old active system (30-0a) changes the system state register from the offline state to the repair state (process 124).
1). Start receiving a message from the terminal (6) (Process 1
242). The old working system (30-0a) reads the shared memory (50-0, 50-1) every one second, and if the time stamps do not match, the old working system (30-1a) is still synchronized with the new working system (30-1a). It is determined that there is not, and when the time stamps match, it is determined that the electronic message is received in synchronization (process 1243). If it is determined that the message is received in synchronization, the old working system (30-0
In a), the system status register is changed from the repair status to the standby status (processing 1245), and the duplex operation is started.

<Operation Example 3: Processing at Congestion of Execution Host>
When the message from the terminal (6) is congested, the queues of the FEP (4) and the host (1) are full and cannot be processed. An operation example at this time will be described. FIG. 57 shows
It is a figure which shows the outline of the communication processing procedure of the congestion state among the execution host (1-0), FEP (4), and terminal (6). The terminal (6) sends a message to the FEP (4) (process 900).
The FEP (4) transfers the electronic message to the host (1) (process 901).

When the host (1) detects a congestion state (step 930), the executing host (1-0) determines that all FEPs have been executed.
The congestion state is notified to (4) (process 931). FEP
When (4) receives the congestion state, FEP (4) stops the transfer of the electronic message and starts holding the electronic message (process 932).

The execution host (1-0) processes the electronic message stored in the queue without receiving the electronic message. Then, the number of messages stored in the queue decreases, and the congestion state disappears. When the execution host (1-0) detects the congestion release (process 935), it notifies all the FEPs (4) of the congestion release (process 936).

Upon receiving the congestion release notification, all the FEPs (4) collectively store the held electronic messages in the host (1).
(Process 937). The execution host (1-0) is
When the electronic messages are received from all the FEPs (4), the time stamps of the electronic messages are referred to and the processes are executed in the order of the time (process 9).
38).

FIG. 58 shows the execution host (1-0) and the FEP.
(4) is a flowchart showing a processing procedure for detecting a congestion state. Execution host (1-0) is FEP (4)
When the message is received from, the received message counter is incremented by "+1" (process 1400). When the count value of the reception message counter becomes equal to or larger than the congestion reference value (process 1401), it is determined to be in the congestion state (process 1402), and all the FEPs (4) are notified that the congestion state has been reached (process 1403). If the count value of the reception message counter is less than the congestion reference value (Processing 14
01), the above processing 1402 and 1403 are skipped.

When the FEP (4) receives the congestion notification,
The transfer mode register is set to the batch transfer mode (process 1404). After that, the FEP (4) suspends the transfer to the execution host (1-0) until the congestion state is released, and the input message from the terminal (6) is sent to the LAN adapter (36-0).
It is held in the transmission queue (43-0).

FIG. 59 shows the execution host (1-0) and FEP.
(4) is a flowchart showing a processing procedure for detecting a congestion release state. When the execution host (1-0) processes the telegram of the LAN controller HLNC, the execution host (1-0) decrements the reception telegram counter by "-1" (process 1410). If the count value of the received message counter is less than or equal to the congestion release reference value (process 1411), it is determined that the congestion state is released (process 1412),
All the FEPs (4) are notified that the congestion state has been released (process 1413). While the count value of the reception message counter is larger than the congestion cancellation reference value, the above processing 141
Steps 2 and 1413 are skipped (process 1411).

Upon receiving the congestion release notification, the FEP (4) sets the transfer mode register to the normal transfer mode (process 1414). Then, the held electronic message is transferred to the execution host (1-0).

<Operation Example 4: Host (1) and FEP (4)
Matching control process of timers between> Since the electronic message is managed by the time stamp (72), it is necessary to match the time of the time stamp timer (51) in all the FEPs (4). The match control processing of the timer will be described with reference to FIGS. 60 to 61.

FIG. 60 is a flow chart showing the time transmission processing of the execution host (1-0). Execution host (1
-0) reads the time from the timer (18-0) and transmits the time to all the FEPs (4) at regular intervals (process 960). Further, since the execution host (1-0) and the spare host (1-1) have the same time, the time is also transmitted to the spare host (1-1) (process 961).

FIG. 61 shows the FEP (4) and the spare host (1
It is a flowchart figure which shows the collation process of the timer in -1). The FEP (4) and the spare host (1-1) determine whether the time difference Δ between the execution host (1-0) and the host (1-0) is t21 or more (process 1600). If the difference Δ is t21 or more, FEP
(4) and the spare host (1-1) are determined to have a timer failure (step 1601), the execution host (1-0) is notified of the timer failure (step 1602), and the time stamp is stopped from being attached to the message. (Process 1603).

When the difference Δ is less than t21, it is determined whether the difference Δ is t22 or more (process 1604). When the difference Δ is less than t21 and greater than t22, the timers of the FEP (4) and the spare host (1-1) are set to the time of the executing host (1-0) (process 16).
05). When the difference Δ is less than t22, it is determined that the timers of the FEP (4) and the spare host (1-1) are correct (process 16).
06).

<Operation Example 5: Processing at the time of double failure of FEP shared memory> FEP (4) shared memory (50-0, 5)
When a double failure occurs in 0-1), FEP (4) leads to system down. Therefore, the FEP (4) periodically backs up the contents of the shared memory (50-0, 50-1) to the disk device (54-0, 54-1), and also when the I / O is issued. Is stored in the disk device (54-0, 54-1) so that the system does not go down even if a double failure occurs in the shared memory (50-0, 50-1). 62 to 63
The processing procedure will be described using.

FIG. 62 shows a shared memory (50-0, 50-
It is a flowchart figure of the backup process of 1). This process is activated periodically. Shared memory (50-0,
The head address and the length of 50-1) are set, and the storage area of the disk device (54-0, 54-1) is set (process 1700). Shared memory (50-0, 50-1)
From the disk device (54-0, 54-1),
The length is set to "-1" (process 1701). By referring to the length, it is determined whether the copying of the shared memory (50-0, 50-1) is completed (process 1702). The above processing 1701 is repeated until the copying of the shared memory (50-0, 50-1) is completed (until the length becomes “0”). Through the above processing, the shared memory (50-0, 50-
The contents of 1) can be backed up to the disk device (54-0, 54-1). Although the journal is taken in the disk device (54-0, 54-1) at the time of issuing I / O, even if the area is full, the shared memory (50-0, 50-) is used.
Perform the backup process of 1).

FIG. 63 shows a shared memory (50-0, 50-
It is a flowchart figure of the double failure detection process of 1). F
The EP active system (30-0) has a shared memory (50-0, 5
0-1) is accessed (process 1710) and it is determined whether there is an ACK from the shared memory (50-0, 50-1) (process 1711). Shared memory (50-0, 50-1)
From the shared memory (50-0, 50-
In 1), it is determined to be normal (process 1712). If there is no ACK from the shared memory (50-0, 50-1), it is determined that a double failure has occurred in the shared memory (50-0, 50-1) and an interrupt (interrupt level 6) is generated. (Process 17
13).

FIG. 64 shows the working system (30-) of FEP (4).
It is a flowchart figure of the recovery process at the time of the double failure of the shared memory (50-0, 50-1) which is performed by 0). Working system (3
0-0) is a shared memory (50) in the execution host (1-0).
-0, 50-1) double failure occurrence is notified (processing 172
0), the exchange of the alive message with the standby system (30-1) is interrupted (process 1721).

When the double failure is resolved, the backed up contents are read from the disk device (54-0, 54-1) and stored in the reserve area (586-0) of the active memory (32-0). Shared memory for writing (50-0, 5
The recovery process of 0-1) is performed (process 1722). At this time, the contents written in the active memory (32-0) are updated by referring to the FEP journal showing the I / O history, and the contents are restored to the contents at the time of occurrence of the shared memory double failure (processing. 1723). Then, the FEP (4) refers to the active memory (32-0) to restart the electronic message processing (processing 1724).

FIG. 65 shows a shared memory (50-0, 50-
It is a detailed flowchart figure of recovery processing (the above-mentioned processing 1722) of 1). Shared memory (50-0, 50-
1) set the start address of the disk device (54-
0, 54-1) is set (processing 173).
0). The contents are copied from the disk device (54-0, 54-1) to the shared memory (50-0, 50-1) and the length is set to "-1" (process 1731). By referring to the length, it is determined whether copying of the disk device (54-0, 54-1) is completed. The above processing 1731 is repeated until the copying is completed (processing 1732). By the above processing, the contents of the disk device (54-0, 54-1) can be recovered to the shared memory (50-0, 50-1).

As a result, even if a double failure occurs in the shared memory, the contents of the shared memory (50-0, 50-1) can be referred to from the active memory (32-0). It is possible to continue.

Note that the FEP (4) is the execution host (1-
0), the failure of the executing host (1-0) is detected by not receiving the alive message within a predetermined time,
The spare host (1-1) is notified of the failure of the execution host (1-0), and the spare host (1-1) is notified of the failure of the execution host (1-0) to another FEP (4). You can

[0127]

According to the terminal uninterrupted online system of the present invention, even if a failure occurs in the executing host, the backup host can take over the processing without interrupting the session with the terminal. Further, even if a failure occurs in the FEP, it is possible to prevent the loss of the message from the terminal and the message transferred to the host.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a terminal uninterrupted online system according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of a host computer.

FIG. 3 is a configuration diagram of FEP.

FIG. 4 is a schematic diagram of processing according to the present invention.

FIG. 5 is a procedure diagram of processing according to the present invention.

FIG. 6 is a format diagram of a message received from a terminal.

FIG. 7 is a format diagram of a telegram between a host and FEP.

FIG. 8 is a format diagram of a transmission message to a terminal.

FIG. 9 is a schematic diagram showing a spare host alive register of an execution host.

FIG. 10 is a schematic diagram showing an execution host alive register of a spare host.

FIG. 11 is a schematic diagram showing an FEP alive register of the execution host.

FIG. 12 is a schematic diagram showing an FEP alive register of a spare host.

FIG. 13 is a schematic diagram showing a received message counter.

FIG. 14 is a schematic diagram showing a congestion reference value register.

FIG. 15 is a schematic diagram showing a congestion release reference value register.

FIG. 16 is a state transition diagram of FEP.

FIG. 17 is a mode transition diagram of an FEP shared memory.

FIG. 18 is an explanatory diagram showing an exclusive control system of a shared memory of FEP.

FIG. 19 is a detailed circuit diagram of a FEP processor, memory, IOP, and bus extender.

FIG. 20 is a memory map diagram of an active system and a standby system of FEP.

FIG. 21 is a detailed circuit diagram of a FEP bus extender.

FIG. 22 is a schematic diagram showing a system status register of FEP.

FIG. 23 is a schematic diagram showing an alive register of FEP.

FIG. 24 is a schematic diagram showing an interrupt register of FEP.

FIG. 25 is a schematic diagram showing an alive register for execution host of FEP.

FIG. 26 is a circuit diagram showing a control circuit for FEP timer interrupt.

FIG. 27 is a detailed circuit diagram of an FEP line adapter.

FIG. 28 is a detailed circuit diagram of a FEP LAN adapter.

FIG. 29 is a schematic diagram showing a mode register of FEP.

FIG. 30 is a detailed circuit diagram of a line switching device of FEP.

FIG. 31 is a configuration diagram of active-system software of FEP.

FIG. 32 is a block diagram of software of an FEP standby system.

FIG. 33 is a configuration diagram of software of an execution host.

FIG. 34 is a block diagram of software of a spare host.

FIG. 35 is a schematic diagram of message processing in the host.

FIG. 36 is a schematic diagram showing a message management table.

FIG. 37 is an explanatory diagram of a communication processing procedure of the host, the FEP, and the terminal when the execution host fails.

FIG. 38 is a flowchart showing the processing procedure of the execution host.

FIG. 39 is a flowchart showing the processing procedure of the backup host.

FIG. 40 is an explanatory diagram of a failure detection method using an alive message from the execution host.

FIG. 41 is a flowchart of a process of transmitting a backup host alive message from the executing host.

[Fig. 42] Fig. 42 is a flowchart of the reception confirmation process of the execution host alive message of the backup host.

FIG. 43 is an explanatory diagram showing a file recovery process and a communication state recovery process of the host.

FIG. 44 is a schematic diagram showing a collective electronic message of FEP.

FIG. 45 is a schematic diagram showing a collective message of the spare host.

FIG. 46 is a schematic diagram showing a time stamp.

FIG. 47 is a flowchart showing a detailed processing procedure of an FEP working system.

48 is a detailed flowchart of the process 1055 of FIG. 47.

FIG. 49 is a flowchart showing a detailed processing procedure of the FEP standby system.

FIG. 50: Execution host and FE at the time of FEP active system failure
It is explanatory drawing which shows the communication processing procedure of P and a terminal.

[Fig. 51] Fig. 51 is a flowchart of takeover processing of the FEP standby system.

52 is a detailed flowchart of the process 1207 of FIG. 52.

[Fig. 53] Fig. 53 is a detailed flowchart of the process of transmitting an alive message.

FIG. 54 is a detailed flowchart of the reception confirmation processing of an alive message.

FIG. 55 is another detailed flowchart of the reception confirmation processing of the alive message.

[Fig. 56] Fig. 56 is a flowchart of a fault recovery process of the old active system.

FIG. 57 is an explanatory diagram showing a communication processing procedure of the execution host, the FEP, and the terminal in the congestion state.

FIG. 58 is a flowchart showing a processing procedure for detecting a congestion state of an execution host and FEP.

[Fig. 59] Fig. 59 is a flowchart showing a processing procedure for detecting a congestion release state of an execution host and FEP.

FIG. 60 is an explanatory diagram showing a time transfer procedure.

FIG. 61 is a flowchart showing the procedure of FEP / spare host timer matching processing.

[Fig. 62] Fig. 62 is a flowchart of a shared memory backup process.

FIG. 63 is a flowchart of a shared memory double failure detection process;

[Fig. 64] Fig. 64 is a flowchart of a recovery process when a shared memory has a double failure.

FIG. 65 is a flow chart diagram of recovery processing of a shared memory.

[Explanation of symbols]

1 ... Host computer, 1-0 ... Execution host, 1-1
... spare host, 2 ... disk device shared by host, 3 ... high-speed LAN, 4 ... FEP, 5 ... line, 6 ... terminal, 18-0 ... execution host timer, 18-1 ... spare host timer, 20-0 ... Alive register of execution host, 20-1 ... Alive register of spare host, 21-0 ... Alive register for FEP of execution host, 21-1 ... Alive register for FEP of spare host, 22-0 ... Reception message of execution host Counter, 22-1 ... Reception message counter of spare host, 23-0 ... Congestion reference value register of execution host, 23-1 ... Congestion reference value register of spare host, 24-0 ... Congestion release reference value register of execution host, 24-1 ... Congestion release reference value register of spare host, 30-0 ... FEP working system, 30-1 ... FEP spare system, 31-0 ... Present Working processor, 31-1 ... Standby processor, 35-0 ... Working line adapter, 35
-1 ... Standby line adapter, 36-0 ... Working LA
N adapter, 36-1, ... LAN adapter for standby system, 40
-0 ... Working line adapter reception queue, 40-1 ... Standby line adapter reception queue, 41-0 ... Working line adapter transmission queue, 41-1 ... Standby system Line adapter transmission queue, 42-0 ... active LAN adapter reception queue, 42-1 ... standby LAN adapter reception queue, 43-0 ... active LAN adapter transmission queue Credit queue, 43-1 ... Transmission queue of standby LAN adapter, 50-0, 50-1 ... FEP shared memory, 51 ... Time stamp timer 52 ... Line switching device, 54-0, 54-1 ... FEP disk device, 60-0, 60-1 ... FEP processing executing message area 61-0, 61-1 ... Host processing executing message area 62-0, 62-1 ... Process executed message area 63-0 , 63- ... received message from the takeover information area 70 ... terminal, 71 ... message body, 72 ... time stamp, 73 ... execution host and message between the active FEP, 74 ...
Message body, 75 ... Transmission message, 76 ... Message body, 87 ... History of message management table.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor, Satoshi Shinya, 1099, Ozenji, Aso-ku, Kawasaki, Kanagawa, Ltd. System Development Laboratory, Hitachi, Ltd. (72) Toshiyuki Kinoshita, 1099, Ozenji, Aso-ku, Kawasaki, Kanagawa Hitachi, Ltd. System Development Laboratory (72) Inventor Hiroshi Oguro 1 Horiyamashita, Hinoyama, Hadano, Kanagawa Pref., Kanagawa Factory, Hitate Co., Ltd. (72) Atsushi Ugagami, 1 Horiyamashita, Hadano, Kanagawa Inside the Kanagawa Plant (72) Inventor Yuuo Yoshino 1 Horiyamashita, Hadano City, Kanagawa Prefecture Hitate Manufacturing Co., Ltd.Kanagawa Plant (72) Inventor Takeshi Oga 1 Horiyamashita, Hadano City, Kanagawa Prefecture 72) Inventor Satoshi Takemura 1 Horiyamashita, Hadano, Kanagawa, Japan In computer electronics (72) Inventor Yoshinori Yoshinaga 504-2 Shinano-cho, Totsuka-ku, Yokohama, Kanagawa Pref., Electronic Services Co., Ltd. (72) Hiroyuki Toseda 504-2 Shinano-cho, Totsuka-ku, Yokohama, Kanagawa Service Co., Ltd. (72) Inventor Norio Morioka 504-2 Shinano-cho, Totsuka-ku, Yokohama, Kanagawa Prefecture

Claims (14)

[Claims] 1. A terminal, a front-end processor, and a high-speed LA for a host configured by a hot standby system in which an execution host and a spare host share a disk device.
In the online system connected via N, the host manages the status of all telegrams, the front-end processor has a dual configuration of the active system and the standby system, and the active system and the standby system are the lines to the terminals. It is equipped with a line adapter to connect to the terminal and a LAN adapter to connect to a high-speed LAN, and the line adapter is provided with a storage device for holding a message received from the terminal. When the message is received from the terminal, the terminal is used as an active system and a standby. Connect to both line adapters of the system, store the received telegram in those storage devices,
The N adapter is provided with a storage device for holding a transmission message to the executing host, and a message to be transferred to the host is retained in the storage devices of both the active and standby LAN adapters while the host is stopped. An uninterrupted online system for terminals. 2. The terminal uninterrupted online system according to claim 1, wherein the executing host and the spare host exchange alive messages at predetermined time intervals, and the spare host:
A terminal uninterrupted online system characterized by detecting a failure of an execution host by not receiving an alive message from the execution host within a predetermined time and notifying the front-end processor of the execution host failure. 3. The terminal uninterrupted online system according to claim 1 or 2, wherein the execution host and the front-end processor exchange alive messages at predetermined time intervals, and the front-end processor sends a predetermined time from the execution host. The failure of the execution host is detected by not receiving the alive message within that time, the failure of the execution host is notified to the backup host, and the backup host notifies another front-end processor of the failure of the execution host. Terminal uninterrupted online system. 4. The terminal uninterrupted online system according to any one of claims 1 to 3, wherein the execution host has a counter for counting the number of electronic messages held, and the count number is a predetermined congestion reference value. A terminal non-interruptive online system characterized by notifying the front end processor of the congestion state when the above is reached. 5. The terminal uninterrupted online system according to any one of claims 1 to 4, wherein the front-end processor, when receiving a message from the terminal, provides a time stamp on the message as an identifier of the message. A terminal uninterrupted online system characterized by giving. 6. The terminal uninterrupted online system according to claim 1, wherein the front-end processor is notified of a failure of the execution host, detects a failure of the execution host, or notifies of a congestion state. Upon receiving the message, the transfer of the message to the host is stopped, and the message body and its time stamp are held in the LAN adapter. 7. The terminal uninterrupted online system according to claim 6, wherein the front-end processor receives the notification of the takeover of the execution host by the spare host or the notification of the release of the congestion state from the storage of the LAN adapter. An uninterrupted online system for terminals, which transfers the electronic message stored in the device and its time stamp to the host in a batch. 8. The uninterrupted terminal online system according to claim 7, wherein the host executes the electronic messages collectively transferred from the front-end processor in the order of time stamps. 9. The terminal uninterrupted online system according to claim 1, wherein the front-end processor has a duplicated shared memory, and the shared memory includes a message from the terminal. A terminal-uninterrupted online system, which stores a time stamp of a message whose processing is completed by the host or front-end processor and a message of which transfer is completed to the host. 10. The terminal uninterrupted online system according to claim 9, wherein the standby system of the front-end processor keeps a time stamp of a telegram indicating that the front-end processor and the host have completed processing at a predetermined time in the shared memory. A non-disruptive online system for terminals, which is read from the terminal and the corresponding message is removed from the reception queue of the line adapter of the standby system. 11. The terminal uninterrupted online system according to claim 9 or 10, wherein the standby system of the front-end processor reads a time stamp indicating completion of transfer to the host from the shared memory at predetermined time intervals. The corresponding message from the storage device of the standby line adapter to the LAN.
An uninterrupted terminal online system characterized by transferring to a storage device of an adapter. 12. The terminal uninterrupted online system according to any one of claims 9 to 11, wherein the front-end processor includes a disk device, and stores the contents of the shared memory in the disk device at predetermined time intervals. and,
A terminal uninterrupted online system characterized by storing an I / O history in a disk device when an I / O is issued. 13. The terminal uninterrupted online system according to any one of claims 1 to 12, wherein the execution host sets the state of the message to a receiving state, a reading state, a writing state, a transmitting state, or a transmitted state. A terminal-uninterrupted online system characterized by at least dividing and managing the status of those messages as checkpoint data. 14. The terminal uninterrupted online system according to claim 1, wherein the execution host, the spare host, and the plurality of front-end processors each have a clock, and the execution host is the spare host and the plurality of fronts. A terminal uninterruptible online system, characterized in that a time value is sent to an end processor every predetermined time, and a standby host and a plurality of front end processors adjust their own clocks according to the received time value.