JPH0522489A - Fault data output prevention system - Google Patents

Abstract

PURPOSE:To prevent a fault data from being outputted from a facsimile terminal equipment without clearing a data reception buffer. CONSTITUTION:When a data of n-lines is sent from a host device, a common control section 1 stores the data to an n-line use data reception buffer circuit 2. In this case, a data inverting circuit (B) is brought into the initial state and a noninverting 2-way buffer 12 is selected. Then the common control section 1 gives a command to n-line control sections 3-6 to allow facsimile equipments 8-11 to send a data and when the transmission is finished and the use of the data reception buffer 2 is finished, the data inverting circuit is switched to the inverting 2-way buffer 13. Thus, the line control sections 3-6 of the same line read the data used once again through the data reception buffer 2 in which the data used at once is stored and even when the data is sent to the facsimile terminal equipments 8-11, nothing is outputted from the facsimile terminal equipments 8-11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a system for preventing abnormal data output in a multiplex communication device equipped with a facsimile.

[0002]

2. Description of the Related Art Conventionally, in this type of abnormal data output prevention system, there is some abnormality in the device, and a certain line control unit erroneously transmits the already output data, or if another line has been used. Even when the data of the above is transmitted, the common control unit will open the data receiving buffer for the line when the data receiving buffer for the line has been used so that abnormal data will not be output to the facsimile terminal. The process of clearing was done.

[0003]

Since the data reception buffer of the image signal of the facsimile usually has a certain size, in the above-mentioned conventional abnormal data output prevention system, the data reception buffer is cleared in order to clear the data reception buffer. There is a problem that the required time decreases the processing speed of the entire apparatus.

It is an object of the present invention to prevent abnormal data from being output from a facsimile terminal without clearing the data reception buffer.

[0005]

In order to achieve the above-mentioned object, the present invention has a line-compatible data reception buffer,
From the common control unit, a common control unit for transmitting a facsimile MMR signal received from a host to the line control unit via the data reception buffer and controlling the line control unit to output data to a facsimile terminal. In a multiplex communication device consisting of n line control units for transmitting passed data to a facsimile terminal according to the instruction, instead of clearing the used data reception buffer, the common control unit and the line control unit are used. And a data inversion circuit is provided between the data reception buffer and the data reception buffer, and the data inversion circuit is alternately switched between inversion and non-inversion every time the data reception buffer is used once. Even when used data is passed, the data is prevented from being output to the facsimile terminal.

[0006]

Next, the present invention will be described with reference to the drawings.

FIG. 1A is a block diagram of a multiplex communication apparatus having a facsimile according to an embodiment of the present invention.
FIG. 6 is a detailed diagram of a data inversion circuit provided between the common control unit 1 and the line control units 3 to 6.

In FIG. 1 (A), a multiplex communication apparatus provided with a facsimile receives a MMR facsimile signal from a higher order in a data reception buffer 2 divided for each line by an address, and the data is received by a line control unit. 3-6
To the facsimile terminals 8 to 11 by controlling the line controllers 3 to 6 to output data to the facsimile terminals 8 to 11, and a line control for transmitting data to the facsimile terminals 8 to 11 according to an instruction from the common controller 1. It is composed of parts 3 to 6.

FIG. 1B shows a common controller 1 and a line controller 3.
A data inverting circuit provided between the non-inverting bidirectional buffer 12 and the inverting bidirectional buffer 1.
It is composed of three. The non-inverting bidirectional buffer 12 and the inverting bidirectional buffer 13 have a selection signal 1 from the common control unit 1.
4 select exclusively.

When data of n lines is sent from the host, the common control section 1 stores the data in the data reception buffer 2 for n lines. At this time, in the data inverting circuit, the non-inverting bidirectional buffer 12 is selected as the initial state. After that, the common control unit 1 changes the line control unit 3 of n lines.
6 to instruct the facsimile terminals 8 to 11 to transmit data, and when the transmission is completed and the data receiving buffer 2 is completely used, the data inverting circuit is switched to the inverting bidirectional buffer 13.

As described above, the processing for alternately switching between inversion and non-inversion of the data inverting circuit every time the data receiving buffer 2 to be used is used once is performed even when the data receiving buffer 2 of all lines is used. To do. This gives 1
The data receiving buffer 2 in which the used data is stored is read by the line control units 3 to 6 of the same line again, or read by the line control units of other lines and transmitted to the facsimile terminals 8 to 11. Even if it does, since it is the data obtained by inverting the normal data, the facsimile terminal side detects a decoding error, and nothing is output from the facsimile terminals 8-11.

[0012]

As described above, according to the present invention, the processing speed of the apparatus is reduced by alternately switching the inversion and non-inversion of the data inversion circuit after each use of the data reception buffer. Even if the used data is erroneously sent to the facsimile terminal, the output from the facsimile terminal can be prevented.

[Brief description of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention.

[Explanation of symbols]

 1 common control unit 2 data receiving buffer 3 to 6 line control unit 8 to 11 facsimile terminal 12 non-reversing bidirectional buffer 13 reversing bidirectional buffer

Claims (1)

Claim: What is claimed is: 1. A data reception buffer corresponding to a line, wherein a MMR signal of a facsimile received from a host is transmitted to the line control unit via the data reception buffer, and the line control unit is controlled. It is used in a multiplex communication device comprising a common control unit for controlling and outputting data to a facsimile terminal, and n line control units for transmitting the data passed from the common control unit to the facsimile terminal according to the instruction. Instead of clearing the completed data receiving buffer, a data inverting circuit is provided between the common control unit and the line control unit, and the data inverting circuit is inverted after each use of the data receiving buffer. By alternately switching between non-inversion and facsimile, even if used data is accidentally passed to a line control unit, the data will be faxed. An abnormal data output prevention method characterized in that it is prevented from being output to the terminal.