JPH03280655A - Error data output preventing system - Google Patents

Error data output preventing system

Info

Publication number
JPH03280655A
JPH03280655A JP2078870A JP7887090A JPH03280655A JP H03280655 A JPH03280655 A JP H03280655A JP 2078870 A JP2078870 A JP 2078870A JP 7887090 A JP7887090 A JP 7887090A JP H03280655 A JPH03280655 A JP H03280655A
Authority
JP
Japan
Prior art keywords
data
facsimile
control unit
line control
common control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2078870A
Other languages
Japanese (ja)
Inventor
Keiichi Yokota
圭一 横田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2078870A priority Critical patent/JPH03280655A/en
Publication of JPH03280655A publication Critical patent/JPH03280655A/en
Pending legal-status Critical Current

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  • Facsimiles In General (AREA)
  • Storing Facsimile Image Data (AREA)
  • Facsimile Transmission Control (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To prevent an output from a facsimile equipment when a used data is sent in error to the facsimile equipment by selecting a 2-way buffer receiving a facsimile picture signal inversely/noninversely every time one communication is finished. CONSTITUTION:A multiplex communication equipment with a facsimile equipment consists of a common control section 1 and n-set of line control sections 3-6 sending a data given from the common control section 1 to facsimile terminal equipments 8-11 by its command. Then a data inversion circuit is provided between the common control section 1 and the line control sections 3-6 in place of clearing a data reception buffer whose operation is finished and inversion/ noninversion is switched alternately when one operation of the data reception buffer is finished. Thus, if a used data should be given in error to the line control sections 3-6, the output of the data to the facsimile terminal equipments is prevented.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、ファクシミリとの多重通信装置における異常
データの出力防止方式に間する。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for preventing the output of abnormal data in a multiplex communication device with a facsimile.

従来の技術 従来、この種の異常データ出力防止方式は、装置に何ら
かの異常があり、ある回線制御部が出力済みのデータを
過って再度送信するか、或は他の回線の使用済みのデー
タを送信した場合でも、ファクシミリ端末に異常データ
が出力されてしまうことがないように、バッファが使用
済みになった時点で共通制御部がそのバックをクリアす
るという処理を行っていた。
Conventionally, this type of abnormal data output prevention method has been proposed in the past, when there is some kind of abnormality in the device and a certain line control unit mistakenly retransmits the data that has already been output, or when the used data on another line is In order to prevent abnormal data from being output to the facsimile terminal even when a fax is sent, the common control unit clears the buffer when it is used up.

発明が解決しようとする課題 しかしながら、ファクシミリの画信号のバッファは、通
常ある程度の大きさを持っているために、上述した従来
の異常データ出力防止方式では、バッファをクリアする
ために要する時間が装置全体の処理速度を低下させると
言う欠点があった。
Problems to be Solved by the Invention However, since the facsimile image signal buffer usually has a certain size, the conventional abnormal data output prevention method described above does not take much time to clear the buffer. This had the disadvantage of slowing down the overall processing speed.

本発明は従来の上記実情に鑑みてなされたものであり、
従って本発明の目的は、従来の技術に内在する上記欠点
を解消し、万一ある回線Maf部に過って使用済みのデ
ータが渡った場合にもそのデータがファクシミリ端末に
出力されることを未然に防止することを可能とした新規
な異常データ出力防止方式を提供することにある。
The present invention has been made in view of the above-mentioned conventional situation,
Therefore, an object of the present invention is to eliminate the above-mentioned drawbacks inherent in the conventional technology, and to ensure that even if used data is accidentally transferred to a certain line Maf section, the data can be output to a facsimile terminal. It is an object of the present invention to provide a novel method for preventing abnormal data output, which makes it possible to prevent abnormal data output from occurring.

課題を解決するための手段 上記目的を達成するために、本発明に係る異常データ出
力防止方式は、回線対応のデータ受信バッファを持ち、
上位から受信したファクシミリのMH/MR信号をその
データ受信バッファを介して回線制御部に送信し、回線
制御部を制御してファクシミリ端末にデータを出力させ
る共通制御部と、この共通制御部から渡されたデータを
その指示によりファクシミリ端末に送信するn個の回線
制御部とからなるファクシミリとの多重通信装置におい
て、使用し終わった前記データ受信バッファをクリアす
るかわりに、前記共通制御部と前記回線制御部の間にデ
ータ反転回路を設け、前記データ受信バッファの1回の
使用が終わるごとに反転と非反転を交互に切り替えるよ
うにしたことを特徴としている。
Means for Solving the Problems In order to achieve the above object, the abnormal data output prevention method according to the present invention has a line-compatible data reception buffer,
A common control unit that transmits facsimile MH/MR signals received from a higher level to a line control unit via its data reception buffer, controls the line control unit to output data to a facsimile terminal, and a common control unit that transmits data from this common control unit. In a multiplex communication device with a facsimile machine, which is composed of n line control units that transmit received data to a facsimile terminal according to its instructions, instead of clearing the data reception buffer that has been used, the common control unit and the line The present invention is characterized in that a data inversion circuit is provided between the control sections, and the data reception buffer is alternately switched between inversion and non-inversion every time one use of the data reception buffer is completed.

実施例 次に、本発明をその好ましい一実施例について図面を参
照して具体的に説明する。
Embodiment Next, a preferred embodiment of the present invention will be specifically explained with reference to the drawings.

第1図は本発明の一実施例を示しファクシミリとの多重
通信装置のブロック構成図、第2図は回線対応のデータ
受信バッファと回線制御部の間に設けた反転回路の詳細
図である。
FIG. 1 shows an embodiment of the present invention, and is a block diagram of a multiplex communication device with a facsimile, and FIG. 2 is a detailed diagram of an inverting circuit provided between a line-compatible data reception buffer and a line control section.

第1図において、ファクシミリとの多重通信装置は、上
位からMHあるいはMRのファクシミリ信号をアドレス
により回線ごとに分割されているデータ受信バッファ2
に受信し、そのデータを回線制御部3〜6に渡し、回線
制御部3〜6を制御してファクシミリ端末8〜11と通
信させる共通制御部1と、共通制御部1からの指示によ
りファクシミリ端末8〜11と通信する回線制御部3〜
6から構成されている。
In FIG. 1, a multiplex communication device with a facsimile receives a MH or MR facsimile signal from a higher level into a data receiving buffer 2 which is divided for each line based on addresses.
a common control unit 1 which receives the data from the facsimile terminals 8 to 11, passes the data to the line control units 3 to 6, and controls the line control units 3 to 6 to communicate with the facsimile terminals 8 to 11; Line control unit 3 to communicate with 8 to 11
It consists of 6.

第2図はデータ反転回路のブロック構成図であり、この
データ反転回路は共通制御部1又はデータ受信バッファ
と回線制御部3〜6との間、あるいは回線制御部3〜6
内にそれぞれ設けられ、共通制御部1からの選択信号1
4により、排他的に選択される非反転双方向バッファ1
2と反転双方向バッファ13で構成されている。
FIG. 2 is a block configuration diagram of a data inversion circuit, and this data inversion circuit is installed between the common control unit 1 or the data reception buffer and line control units 3 to 6, or between the line control units 3 to 6.
The selection signal 1 from the common control unit 1
4, a non-inverting bidirectional buffer 1 exclusively selected by
2 and an inverted bidirectional buffer 13.

上位からn回線のデータが送られてきた場合には、共通
制御部1はn回線用データ受信バッファ2にそのデータ
を格納する。このときデータ反転回路は初期状態として
非反転双方向バッファ12が選択されている。その後n
回線の制御部に指示してファクシミリ端末にデータを送
信させ、その通信が終了し、データ受信バッファ2を使
用し終わった時点で反転双方向バッファ13の選択に切
り替える。
When data for n lines is sent from the upper level, the common control unit 1 stores the data in the data reception buffer 2 for n lines. At this time, the non-inverting bidirectional buffer 12 is selected as the initial state of the data inverting circuit. then n
The control section of the line is instructed to transmit data to the facsimile terminal, and when the communication is completed and the data reception buffer 2 is used, the selection is switched to the inverted bidirectional buffer 13.

このように使用するバッファの選択を1回の通信が終了
する毎に交互に切り替える処理をすべての回線のデータ
受信バッファ使用時にも行う。これにより1度使用され
たデータが格納されているデータ受信バッファを過って
同じ回線の制御部が再度、あるいは他の回線の制御部が
読み取りファクシミリ端末に送信してしまったとしても
、正常なデータを反転したデータとなっているためにフ
ァクシミリ端末側でデコードエラーを検出することとな
り、ファクシミリ端末には何も出力されない 発明の詳細 な説明したように、本発明によれば、ファクシミリの画
信号のバッファに接続された双方向バッファを1回の通
信が終了するごとに反転/非反転と切り替えることによ
り、装置の処理速度を低下させる事無く、過って使用済
みのデータがファクシミリ端末に送信された場合でも端
末での出力を防ぐことが出来る。
This process of alternately switching the selection of the buffer to be used every time one communication is completed is also performed when the data reception buffers of all lines are used. As a result, even if the control unit of the same line reads the data once and sends it to the facsimile terminal by the control unit of the same line by mistake, or if the data is read by the control unit of another line and sent to the facsimile terminal. Since the data is inverted, a decoding error is detected on the facsimile terminal side, and nothing is output to the facsimile terminal.As described in detail, according to the present invention, the facsimile image signal By switching the bidirectional buffer connected to the buffer between inverting and non-inverting each time one communication is completed, data that has been used by mistake can be sent to the facsimile terminal without reducing the processing speed of the device. You can prevent output to the terminal even if the

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る異常データ出力防止方式の一実施
例を示すブロック構成図、第2図は反転回路の詳細図で
ある。 1・・・共通制御部、2・・・画信号バッファ部、3.
4.5.6・・・回線制御部、7川システムバス8.9
.10.11・・・ファクシミリ端末、12・・・非反
転双方向バッファ、13・・・反転双方向バッファ、1
4・・非反転双方向バッファ/′反転双方向ノ(・ソフ
ァ選択信号
FIG. 1 is a block diagram showing an embodiment of the abnormal data output prevention method according to the present invention, and FIG. 2 is a detailed diagram of an inverting circuit. 1... Common control section, 2... Image signal buffer section, 3.
4.5.6...Line control section, 7 river system bus 8.9
.. 10.11...Facsimile terminal, 12...Non-inverting bidirectional buffer, 13...Inverting bidirectional buffer, 1
4. Non-inverting bidirectional buffer/'inverting bidirectional buffer (-sofa selection signal

Claims (1)

【特許請求の範囲】[Claims] 回線対応のデータ受信バッファを持ち、上位から受信し
たファクシミリのMH/MR信号をその前記データ受信
バッファを介して回線制御部に送信し、該回線制御部を
制御してファクシミリ端末にデータを出力させる共通制
御部と、該共通制御部から渡されたデータをその指示に
よりファクシミリ端末に送信するn個の回線制御部とか
らなるファクシミリとの多重通信装置において、使用し
終わつた前記データ受信バッファをクリアするかわりに
、前記共通制御部と前記回線制御部の間にデータ反転回
路を設け、前記データ受信バッファの1回の使用が終わ
るごとに反転と非反転を交互に切り替えるようにしたこ
とを特徴とする異常データ出力防止方式。
It has a data reception buffer compatible with the line, and transmits the facsimile MH/MR signal received from the upper level to the line control unit via the data reception buffer, and controls the line control unit to output data to the facsimile terminal. In a multiplex communication device with a facsimile consisting of a common control unit and n line control units that transmit data passed from the common control unit to a facsimile terminal according to instructions thereof, the data reception buffer that has been used is cleared. Instead, a data inverting circuit is provided between the common control section and the line control section, and the data inverting mode is alternately switched between inverting and non-inverting each time the data receiving buffer is used once. Abnormal data output prevention method.
JP2078870A 1990-03-29 1990-03-29 Error data output preventing system Pending JPH03280655A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2078870A JPH03280655A (en) 1990-03-29 1990-03-29 Error data output preventing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2078870A JPH03280655A (en) 1990-03-29 1990-03-29 Error data output preventing system

Publications (1)

Publication Number Publication Date
JPH03280655A true JPH03280655A (en) 1991-12-11

Family

ID=13673862

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2078870A Pending JPH03280655A (en) 1990-03-29 1990-03-29 Error data output preventing system

Country Status (1)

Country Link
JP (1) JPH03280655A (en)

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